7636 lines
295 KiB
C
7636 lines
295 KiB
C
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/* Generated automatically by the program `gencodes'
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from the machine description file `md'. */
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#ifndef GCC_INSN_CODES_H
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#define GCC_INSN_CODES_H
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enum insn_code {
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CODE_FOR_nothing = 0,
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CODE_FOR_x86_sahf_1 = 41,
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CODE_FOR_insvhi_1 = 114,
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CODE_FOR_insvsi_1 = 115,
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CODE_FOR_insvdi_1 = 116,
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CODE_FOR_zero_extendqidi2 = 146,
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CODE_FOR_zero_extendhidi2 = 147,
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CODE_FOR_zero_extendqisi2_and = 148,
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CODE_FOR_zero_extendhisi2_and = 149,
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CODE_FOR_zero_extendqihi2_and = 152,
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CODE_FOR_extendsidi2_1 = 155,
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CODE_FOR_extendqidi2 = 156,
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CODE_FOR_extendhidi2 = 157,
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CODE_FOR_extendhisi2 = 158,
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CODE_FOR_extendqisi2 = 160,
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CODE_FOR_extendqihi2 = 162,
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CODE_FOR_truncdfsf2 = 168,
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CODE_FOR_truncxfsf2 = 169,
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CODE_FOR_truncxfdf2 = 170,
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CODE_FOR_fix_trunchfsi2 = 173,
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CODE_FOR_fixuns_trunchfsi2 = 174,
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CODE_FOR_fix_trunchfdi2 = 175,
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CODE_FOR_fixuns_trunchfdi2 = 176,
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CODE_FOR_fixuns_truncsfdi2 = 177,
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CODE_FOR_fixuns_truncdfdi2 = 178,
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CODE_FOR_fixuns_truncsfsi2_avx512f = 179,
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CODE_FOR_fixuns_truncdfsi2_avx512f = 180,
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CODE_FOR_fix_truncsfsi_sse = 186,
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CODE_FOR_fix_truncsfdi_sse = 187,
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CODE_FOR_fix_truncdfsi_sse = 188,
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CODE_FOR_fix_truncdfdi_sse = 189,
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CODE_FOR_fix_trunchi_i387_fisttp = 190,
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CODE_FOR_fix_truncsi_i387_fisttp = 191,
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CODE_FOR_fix_truncdi_i387_fisttp = 192,
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CODE_FOR_fix_truncdi_i387 = 196,
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CODE_FOR_fix_trunchi_i387 = 197,
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CODE_FOR_fix_truncsi_i387 = 198,
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CODE_FOR_x86_fnstcw_1 = 199,
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CODE_FOR_floathisf2 = 200,
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CODE_FOR_floathidf2 = 201,
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CODE_FOR_floathixf2 = 202,
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CODE_FOR_floatsixf2 = 203,
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CODE_FOR_floatdixf2 = 204,
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CODE_FOR_floatsihf2 = 209,
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CODE_FOR_floatunssihf2 = 210,
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CODE_FOR_floatdihf2 = 211,
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CODE_FOR_floatunsdihf2 = 212,
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CODE_FOR_floatdisf2_i387_with_xmm = 215,
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CODE_FOR_floatdidf2_i387_with_xmm = 216,
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CODE_FOR_floatdixf2_i387_with_xmm = 217,
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CODE_FOR_floatunssisf2_i387_with_xmm = 222,
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CODE_FOR_floatunssidf2_i387_with_xmm = 223,
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CODE_FOR_floatunssixf2_i387_with_xmm = 224,
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CODE_FOR_addsi_1_zext = 231,
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CODE_FOR_addvqi4_1 = 264,
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CODE_FOR_addvhi4_1 = 265,
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CODE_FOR_addvsi4_1 = 266,
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CODE_FOR_addvdi4_1 = 267,
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CODE_FOR_subvqi4_1 = 319,
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CODE_FOR_subvhi4_1 = 320,
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CODE_FOR_subvsi4_1 = 321,
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CODE_FOR_subvdi4_1 = 322,
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CODE_FOR_addqi3_carry = 343,
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CODE_FOR_addhi3_carry = 344,
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CODE_FOR_addsi3_carry = 345,
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CODE_FOR_adddi3_carry = 346,
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CODE_FOR_addcarrysi = 358,
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CODE_FOR_addcarrydi = 359,
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CODE_FOR_subqi3_carry = 362,
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CODE_FOR_subhi3_carry = 363,
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CODE_FOR_subsi3_carry = 364,
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CODE_FOR_subdi3_carry = 365,
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CODE_FOR_subsi3_carry_ccc = 377,
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CODE_FOR_subdi3_carry_ccc = 378,
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CODE_FOR_subsi3_carry_ccgz = 381,
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CODE_FOR_subdi3_carry_ccgz = 382,
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CODE_FOR_subborrowsi = 383,
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CODE_FOR_subborrowdi = 384,
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CODE_FOR_smulsi3_highpart = 467,
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CODE_FOR_umulsi3_highpart = 468,
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CODE_FOR_smuldi3_highpart = 469,
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CODE_FOR_umuldi3_highpart = 470,
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CODE_FOR_divmodsi4_1 = 479,
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CODE_FOR_divmoddi4_1 = 480,
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CODE_FOR_udivmodsi4_1 = 481,
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CODE_FOR_udivmoddi4_1 = 482,
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CODE_FOR_divmodsi4_zext_1 = 483,
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CODE_FOR_udivmodsi4_zext_1 = 484,
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CODE_FOR_divmodsi4_zext_2 = 485,
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CODE_FOR_udivmodsi4_zext_2 = 486,
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CODE_FOR_divmodhiqi3 = 512,
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CODE_FOR_udivmodhiqi3 = 513,
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CODE_FOR_x86_64_shld = 700,
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CODE_FOR_x86_shld = 703,
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CODE_FOR_x86_64_shrd = 752,
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CODE_FOR_x86_shrd = 755,
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CODE_FOR_ashrsi3_cvt = 758,
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CODE_FOR_ashrdi3_cvt = 759,
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CODE_FOR_ix86_rotldi3_doubleword = 821,
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CODE_FOR_ix86_rotlti3_doubleword = 822,
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CODE_FOR_ix86_rotrdi3_doubleword = 823,
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CODE_FOR_ix86_rotrti3_doubleword = 824,
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CODE_FOR_setcc_sf_sse = 888,
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CODE_FOR_setcc_df_sse = 889,
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CODE_FOR_setcc_hf_mask = 890,
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CODE_FOR_jump = 892,
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CODE_FOR_blockage = 919,
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CODE_FOR_prologue_use = 921,
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CODE_FOR_simple_return_internal = 922,
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CODE_FOR_interrupt_return = 923,
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CODE_FOR_simple_return_internal_long = 924,
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CODE_FOR_simple_return_pop_internal = 925,
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CODE_FOR_nop = 928,
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CODE_FOR_nops = 929,
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CODE_FOR_pad = 930,
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CODE_FOR_set_got_rex64 = 933,
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CODE_FOR_set_rip_rex64 = 934,
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CODE_FOR_set_got_offset_rex64 = 935,
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CODE_FOR_eh_return_internal = 936,
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CODE_FOR_split_stack_return = 939,
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CODE_FOR_ffssi2_no_cmove = 940,
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CODE_FOR_ctzsi2 = 947,
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CODE_FOR_ctzdi2 = 948,
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CODE_FOR_bsr_rex64 = 953,
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CODE_FOR_bsr_rex64_1 = 954,
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CODE_FOR_bsr_rex64_1_zext = 955,
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CODE_FOR_bsr = 956,
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CODE_FOR_bsr_1 = 957,
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CODE_FOR_bsr_zext_1 = 958,
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CODE_FOR_clzsi2_lzcnt = 961,
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CODE_FOR_clzdi2_lzcnt = 962,
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CODE_FOR_tzcnt_si = 968,
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CODE_FOR_lzcnt_si = 969,
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CODE_FOR_tzcnt_di = 970,
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CODE_FOR_lzcnt_di = 971,
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CODE_FOR_tzcnt_hi = 976,
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CODE_FOR_lzcnt_hi = 977,
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CODE_FOR_bmi_bextr_si = 978,
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CODE_FOR_bmi_bextr_di = 979,
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CODE_FOR_bmi2_pdep_si3 = 1006,
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CODE_FOR_bmi2_pdep_di3 = 1007,
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CODE_FOR_bmi2_pext_si3 = 1008,
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CODE_FOR_bmi2_pext_di3 = 1009,
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CODE_FOR_tbm_bextri_si = 1010,
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CODE_FOR_tbm_bextri_di = 1011,
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CODE_FOR_popcountsi2 = 1030,
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CODE_FOR_popcountdi2 = 1031,
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CODE_FOR_popcounthi2 = 1037,
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CODE_FOR_bswaphi_lowpart = 1043,
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CODE_FOR_parityhi2_cmp = 1044,
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CODE_FOR_parityqi2_cmp = 1045,
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CODE_FOR_tls_initial_exec_64_sun = CODE_FOR_nothing,
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CODE_FOR_rcphf2 = 1078,
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CODE_FOR_truncxfsf2_i387_noop_unspec = 1103,
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CODE_FOR_truncxfdf2_i387_noop_unspec = 1104,
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CODE_FOR_sqrtxf2 = 1105,
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CODE_FOR_rsqrthf2 = 1107,
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CODE_FOR_sqrthf2 = 1108,
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CODE_FOR_x86_fnstsw_1 = 1111,
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CODE_FOR_fpremxf4_i387 = 1112,
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CODE_FOR_fprem1xf4_i387 = 1113,
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CODE_FOR_sinxf2 = 1114,
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CODE_FOR_cosxf2 = 1115,
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CODE_FOR_sincosxf3 = 1116,
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CODE_FOR_fptanxf4_i387 = 1117,
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CODE_FOR_atan2xf3 = 1118,
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CODE_FOR_fyl2xxf3_i387 = 1119,
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CODE_FOR_fyl2xp1xf3_i387 = 1120,
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CODE_FOR_fxtractxf3_i387 = 1121,
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CODE_FOR_fscalexf4_i387 = 1123,
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CODE_FOR_avx512f_scalefsf2 = 1124,
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CODE_FOR_avx512f_scalefdf2 = 1125,
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CODE_FOR_sse4_1_roundhf2 = 1126,
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CODE_FOR_sse4_1_roundsf2 = 1127,
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CODE_FOR_sse4_1_rounddf2 = 1128,
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CODE_FOR_rintxf2 = 1129,
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CODE_FOR_lrintxfdi2 = 1130,
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CODE_FOR_lrintxfhi2 = 1131,
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CODE_FOR_lrintxfsi2 = 1132,
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CODE_FOR_frndintxf2_roundeven = 1133,
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CODE_FOR_frndintxf2_floor = 1134,
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CODE_FOR_frndintxf2_ceil = 1135,
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CODE_FOR_frndintxf2_trunc = 1136,
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CODE_FOR_frndintxf2_roundeven_i387 = 1137,
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CODE_FOR_frndintxf2_floor_i387 = 1138,
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CODE_FOR_frndintxf2_ceil_i387 = 1139,
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CODE_FOR_frndintxf2_trunc_i387 = 1140,
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CODE_FOR_fistdi2_floor = 1147,
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CODE_FOR_fistdi2_ceil = 1148,
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CODE_FOR_fisthi2_floor = 1149,
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CODE_FOR_fisthi2_ceil = 1150,
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CODE_FOR_fistsi2_floor = 1151,
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CODE_FOR_fistsi2_ceil = 1152,
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CODE_FOR_fxamsf2_i387 = 1153,
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CODE_FOR_fxamdf2_i387 = 1154,
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CODE_FOR_fxamxf2_i387 = 1155,
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CODE_FOR_movmsk_df = 1156,
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CODE_FOR_cld = 1157,
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CODE_FOR_movhf_mask = 1205,
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CODE_FOR_smaxsf3 = 1211,
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CODE_FOR_sminsf3 = 1212,
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CODE_FOR_smaxdf3 = 1213,
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CODE_FOR_smindf3 = 1214,
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CODE_FOR_smaxhf3 = 1215,
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CODE_FOR_sminhf3 = 1216,
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CODE_FOR_pro_epilogue_adjust_stack_add_si = 1247,
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CODE_FOR_pro_epilogue_adjust_stack_add_di = 1248,
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CODE_FOR_pro_epilogue_adjust_stack_sub_si = 1249,
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CODE_FOR_pro_epilogue_adjust_stack_sub_di = 1250,
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CODE_FOR_allocate_stack_worker_probe_si = 1251,
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CODE_FOR_allocate_stack_worker_probe_di = 1252,
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CODE_FOR_probe_stack_1_si = 1253,
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CODE_FOR_probe_stack_1_di = 1254,
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CODE_FOR_adjust_stack_and_probe_si = 1255,
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CODE_FOR_adjust_stack_and_probe_di = 1256,
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CODE_FOR_probe_stack_range_si = 1257,
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CODE_FOR_probe_stack_range_di = 1258,
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CODE_FOR_trap = 1259,
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CODE_FOR_ud2 = 1260,
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CODE_FOR_stack_protect_set_1_si = 1264,
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CODE_FOR_stack_protect_set_1_di = 1265,
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CODE_FOR_stack_protect_test_1_si = 1269,
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CODE_FOR_stack_protect_test_1_di = 1270,
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CODE_FOR_sse4_2_crc32qi = 1271,
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CODE_FOR_sse4_2_crc32hi = 1272,
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CODE_FOR_sse4_2_crc32si = 1273,
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CODE_FOR_sse4_2_crc32di = 1274,
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CODE_FOR_rdpmc = 1275,
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CODE_FOR_rdpmc_rex64 = 1276,
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CODE_FOR_rdtsc = 1277,
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CODE_FOR_rdtsc_rex64 = 1278,
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CODE_FOR_rdtscp = 1279,
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CODE_FOR_rdtscp_rex64 = 1280,
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CODE_FOR_fxsave = 1281,
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CODE_FOR_fxsave64 = 1282,
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CODE_FOR_fxrstor = 1283,
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CODE_FOR_fxrstor64 = 1284,
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CODE_FOR_xsave = 1285,
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CODE_FOR_xsaveopt = 1286,
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CODE_FOR_xsavec = 1287,
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CODE_FOR_xsaves = 1288,
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CODE_FOR_xsave_rex64 = 1289,
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CODE_FOR_xsaveopt_rex64 = 1290,
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CODE_FOR_xsavec_rex64 = 1291,
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CODE_FOR_xsaves_rex64 = 1292,
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CODE_FOR_xsave64 = 1293,
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CODE_FOR_xsaveopt64 = 1294,
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CODE_FOR_xsavec64 = 1295,
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CODE_FOR_xsaves64 = 1296,
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CODE_FOR_xrstor = 1297,
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CODE_FOR_xrstors = 1298,
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CODE_FOR_xrstor_rex64 = 1299,
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CODE_FOR_xrstors_rex64 = 1300,
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CODE_FOR_xrstor64 = 1301,
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CODE_FOR_xrstors64 = 1302,
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CODE_FOR_xsetbv = 1303,
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CODE_FOR_xsetbv_rex64 = 1304,
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CODE_FOR_xgetbv = 1305,
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CODE_FOR_xgetbv_rex64 = 1306,
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CODE_FOR_fnstenv = 1307,
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CODE_FOR_fldenv = 1308,
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CODE_FOR_fnstsw = 1309,
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CODE_FOR_fnclex = 1310,
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CODE_FOR_lwp_llwpcbsi = 1311,
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CODE_FOR_lwp_llwpcbdi = 1312,
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CODE_FOR_lwp_slwpcbsi = 1313,
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CODE_FOR_lwp_slwpcbdi = 1314,
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CODE_FOR_lwp_lwpvalsi = 1315,
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CODE_FOR_lwp_lwpvaldi = 1316,
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CODE_FOR_lwp_lwpinssi = 1317,
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CODE_FOR_lwp_lwpinsdi = 1318,
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CODE_FOR_rdfsbasesi = 1319,
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CODE_FOR_rdgsbasesi = 1320,
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CODE_FOR_rdfsbasedi = 1321,
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CODE_FOR_rdgsbasedi = 1322,
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CODE_FOR_wrfsbasesi = 1323,
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CODE_FOR_wrgsbasesi = 1324,
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CODE_FOR_wrfsbasedi = 1325,
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CODE_FOR_wrgsbasedi = 1326,
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CODE_FOR_ptwritesi = 1327,
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CODE_FOR_ptwritedi = 1328,
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CODE_FOR_rdrandhi = 1329,
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CODE_FOR_rdrandsi = 1330,
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CODE_FOR_rdranddi = 1331,
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CODE_FOR_rdseedhi = 1332,
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CODE_FOR_rdseedsi = 1333,
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CODE_FOR_rdseeddi = 1334,
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CODE_FOR_rdsspsi = 1336,
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CODE_FOR_rdsspdi = 1337,
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CODE_FOR_incsspsi = 1338,
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CODE_FOR_incsspdi = 1339,
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CODE_FOR_saveprevssp = 1340,
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CODE_FOR_rstorssp = 1341,
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CODE_FOR_wrsssi = 1342,
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CODE_FOR_wrssdi = 1343,
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CODE_FOR_wrusssi = 1344,
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CODE_FOR_wrussdi = 1345,
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CODE_FOR_setssbsy = 1346,
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CODE_FOR_clrssbsy = 1347,
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CODE_FOR_nop_endbr = 1348,
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CODE_FOR_xbegin_1 = 1349,
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CODE_FOR_xend = 1350,
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CODE_FOR_xabort = 1351,
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CODE_FOR_xtest_1 = 1352,
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CODE_FOR_clwb = 1353,
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CODE_FOR_clflushopt = 1354,
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CODE_FOR_mwaitx = 1355,
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CODE_FOR_monitorx_si = 1356,
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CODE_FOR_monitorx_di = 1357,
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CODE_FOR_clzero_si = 1358,
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CODE_FOR_clzero_di = 1359,
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CODE_FOR_rdpid = 1362,
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CODE_FOR_rdpid_rex64 = 1363,
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CODE_FOR_wbinvd = 1364,
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CODE_FOR_wbnoinvd = 1365,
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CODE_FOR_movdirisi = 1366,
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CODE_FOR_movdiridi = 1367,
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CODE_FOR_movdir64b_si = 1368,
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CODE_FOR_movdir64b_di = 1369,
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CODE_FOR_xsusldtrk = 1370,
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CODE_FOR_xresldtrk = 1371,
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CODE_FOR_enqcmd_si = 1372,
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CODE_FOR_enqcmds_si = 1373,
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CODE_FOR_enqcmd_di = 1374,
|
||
|
CODE_FOR_enqcmds_di = 1375,
|
||
|
CODE_FOR_clui = 1376,
|
||
|
CODE_FOR_stui = 1377,
|
||
|
CODE_FOR_testui = 1378,
|
||
|
CODE_FOR_senduipi = 1379,
|
||
|
CODE_FOR_umwait = 1380,
|
||
|
CODE_FOR_umwait_rex64 = 1381,
|
||
|
CODE_FOR_umonitor_si = 1382,
|
||
|
CODE_FOR_umonitor_di = 1383,
|
||
|
CODE_FOR_tpause = 1384,
|
||
|
CODE_FOR_tpause_rex64 = 1385,
|
||
|
CODE_FOR_cldemote = 1386,
|
||
|
CODE_FOR_speculation_barrier = 1387,
|
||
|
CODE_FOR_serialize = 1388,
|
||
|
CODE_FOR_patchable_area = 1389,
|
||
|
CODE_FOR_hreset = 1390,
|
||
|
CODE_FOR_sse_movntq = 1407,
|
||
|
CODE_FOR_mmx_ieee_maxv2sf3 = 1416,
|
||
|
CODE_FOR_mmx_ieee_minv2sf3 = 1417,
|
||
|
CODE_FOR_mmx_rcpv2sf2 = 1418,
|
||
|
CODE_FOR_mmx_rcpit1v2sf3 = 1419,
|
||
|
CODE_FOR_mmx_rcpit2v2sf3 = 1420,
|
||
|
CODE_FOR_sqrtv2sf2 = 1421,
|
||
|
CODE_FOR_mmx_rsqrtv2sf2 = 1422,
|
||
|
CODE_FOR_mmx_rsqit1v2sf3 = 1423,
|
||
|
CODE_FOR_mmx_hsubv2sf3 = 1426,
|
||
|
CODE_FOR_vec_addsubv2sf3 = 1429,
|
||
|
CODE_FOR_mmx_gtv2sf3 = 1431,
|
||
|
CODE_FOR_mmx_gev2sf3 = 1432,
|
||
|
CODE_FOR_mmx_blendvps = 1435,
|
||
|
CODE_FOR_andv2sf3 = 1437,
|
||
|
CODE_FOR_iorv2sf3 = 1438,
|
||
|
CODE_FOR_xorv2sf3 = 1439,
|
||
|
CODE_FOR_fmav2sf4 = 1440,
|
||
|
CODE_FOR_fmsv2sf4 = 1441,
|
||
|
CODE_FOR_fnmav2sf4 = 1442,
|
||
|
CODE_FOR_fnmsv2sf4 = 1443,
|
||
|
CODE_FOR_mmx_fix_truncv2sfv2si2 = 1444,
|
||
|
CODE_FOR_fixuns_truncv2sfv2si2 = 1445,
|
||
|
CODE_FOR_mmx_floatv2siv2sf2 = 1446,
|
||
|
CODE_FOR_floatunsv2siv2sf2 = 1447,
|
||
|
CODE_FOR_mmx_pf2iw = 1448,
|
||
|
CODE_FOR_mmx_pi2fw = 1449,
|
||
|
CODE_FOR_mmx_pswapdv2sf2 = 1450,
|
||
|
CODE_FOR_addv4hf3 = 1460,
|
||
|
CODE_FOR_subv4hf3 = 1461,
|
||
|
CODE_FOR_mulv4hf3 = 1462,
|
||
|
CODE_FOR_divv4hf3 = 1463,
|
||
|
CODE_FOR_addv2hf3 = 1464,
|
||
|
CODE_FOR_subv2hf3 = 1465,
|
||
|
CODE_FOR_mulv2hf3 = 1466,
|
||
|
CODE_FOR_divv2hf3 = 1467,
|
||
|
CODE_FOR_negv2qi2 = 1468,
|
||
|
CODE_FOR_addv4qi3 = 1477,
|
||
|
CODE_FOR_subv4qi3 = 1478,
|
||
|
CODE_FOR_addv2hi3 = 1479,
|
||
|
CODE_FOR_subv2hi3 = 1480,
|
||
|
CODE_FOR_addv2qi3 = 1481,
|
||
|
CODE_FOR_subv2qi3 = 1482,
|
||
|
CODE_FOR_mulv2hi3 = 1504,
|
||
|
CODE_FOR_smulv2hi3_highpart = 1507,
|
||
|
CODE_FOR_umulv2hi3_highpart = 1508,
|
||
|
CODE_FOR_smaxv8qi3 = 1512,
|
||
|
CODE_FOR_sminv8qi3 = 1513,
|
||
|
CODE_FOR_smaxv2si3 = 1514,
|
||
|
CODE_FOR_sminv2si3 = 1515,
|
||
|
CODE_FOR_smaxv4qi3 = 1518,
|
||
|
CODE_FOR_sminv4qi3 = 1519,
|
||
|
CODE_FOR_smaxv2qi3 = 1520,
|
||
|
CODE_FOR_sminv2qi3 = 1521,
|
||
|
CODE_FOR_smaxv2hi3 = 1522,
|
||
|
CODE_FOR_sminv2hi3 = 1523,
|
||
|
CODE_FOR_umaxv4hi3 = 1524,
|
||
|
CODE_FOR_uminv4hi3 = 1525,
|
||
|
CODE_FOR_umaxv2si3 = 1526,
|
||
|
CODE_FOR_uminv2si3 = 1527,
|
||
|
CODE_FOR_umaxv4qi3 = 1530,
|
||
|
CODE_FOR_uminv4qi3 = 1531,
|
||
|
CODE_FOR_umaxv2qi3 = 1532,
|
||
|
CODE_FOR_uminv2qi3 = 1533,
|
||
|
CODE_FOR_umaxv2hi3 = 1534,
|
||
|
CODE_FOR_uminv2hi3 = 1535,
|
||
|
CODE_FOR_ssse3_absv8qi2 = 1536,
|
||
|
CODE_FOR_ssse3_absv4hi2 = 1537,
|
||
|
CODE_FOR_ssse3_absv2si2 = 1538,
|
||
|
CODE_FOR_absv4qi2 = 1539,
|
||
|
CODE_FOR_absv2qi2 = 1540,
|
||
|
CODE_FOR_absv2hi2 = 1541,
|
||
|
CODE_FOR_mmx_ashrv4hi3 = 1542,
|
||
|
CODE_FOR_mmx_ashrv2si3 = 1543,
|
||
|
CODE_FOR_mmx_ashlv4hi3 = 1544,
|
||
|
CODE_FOR_mmx_lshrv4hi3 = 1545,
|
||
|
CODE_FOR_mmx_ashlv2si3 = 1546,
|
||
|
CODE_FOR_mmx_lshrv2si3 = 1547,
|
||
|
CODE_FOR_mmx_ashlv1di3 = 1548,
|
||
|
CODE_FOR_mmx_lshrv1di3 = 1549,
|
||
|
CODE_FOR_mmx_ashlv1si3 = 1550,
|
||
|
CODE_FOR_mmx_lshrv1si3 = 1551,
|
||
|
CODE_FOR_ashlv2hi3 = 1552,
|
||
|
CODE_FOR_lshrv2hi3 = 1553,
|
||
|
CODE_FOR_ashrv2hi3 = 1554,
|
||
|
CODE_FOR_ashlv2qi3 = 1555,
|
||
|
CODE_FOR_lshrv2qi3 = 1556,
|
||
|
CODE_FOR_ashrv2qi3 = 1557,
|
||
|
CODE_FOR_mmx_gtv8qi3 = 1564,
|
||
|
CODE_FOR_mmx_gtv4hi3 = 1565,
|
||
|
CODE_FOR_mmx_gtv2si3 = 1566,
|
||
|
CODE_FOR_mmx_pblendvb_v8qi = 1582,
|
||
|
CODE_FOR_mmx_pblendvb_v4qi = 1583,
|
||
|
CODE_FOR_mmx_pblendvb_v2qi = 1584,
|
||
|
CODE_FOR_mmx_pblendvb_v2hi = 1585,
|
||
|
CODE_FOR_mmx_ppermv64 = 1593,
|
||
|
CODE_FOR_mmx_ppermv32 = 1594,
|
||
|
CODE_FOR_one_cmplv4qi2 = 1595,
|
||
|
CODE_FOR_one_cmplv2qi2 = 1596,
|
||
|
CODE_FOR_one_cmplv2hi2 = 1597,
|
||
|
CODE_FOR_mmx_andnotv8qi3 = 1598,
|
||
|
CODE_FOR_mmx_andnotv4hi3 = 1599,
|
||
|
CODE_FOR_mmx_andnotv2si3 = 1600,
|
||
|
CODE_FOR_andv4qi3 = 1613,
|
||
|
CODE_FOR_iorv4qi3 = 1614,
|
||
|
CODE_FOR_xorv4qi3 = 1615,
|
||
|
CODE_FOR_andv2qi3 = 1616,
|
||
|
CODE_FOR_iorv2qi3 = 1617,
|
||
|
CODE_FOR_xorv2qi3 = 1618,
|
||
|
CODE_FOR_andv2hi3 = 1619,
|
||
|
CODE_FOR_iorv2hi3 = 1620,
|
||
|
CODE_FOR_xorv2hi3 = 1621,
|
||
|
CODE_FOR_mmx_packsswb = 1622,
|
||
|
CODE_FOR_mmx_packuswb = 1623,
|
||
|
CODE_FOR_mmx_packssdw = 1624,
|
||
|
CODE_FOR_mmx_packusdw = 1625,
|
||
|
CODE_FOR_mmx_punpckhbw = 1626,
|
||
|
CODE_FOR_mmx_punpckhbw_low = 1627,
|
||
|
CODE_FOR_mmx_punpcklbw = 1628,
|
||
|
CODE_FOR_mmx_punpcklbw_low = 1629,
|
||
|
CODE_FOR_mmx_punpckhwd = 1630,
|
||
|
CODE_FOR_mmx_punpcklwd = 1631,
|
||
|
CODE_FOR_mmx_punpckhdq = 1632,
|
||
|
CODE_FOR_mmx_punpckldq = 1633,
|
||
|
CODE_FOR_sse4_1_sign_extendv4qiv4hi2 = 1634,
|
||
|
CODE_FOR_sse4_1_zero_extendv4qiv4hi2 = 1635,
|
||
|
CODE_FOR_sse4_1_sign_extendv2hiv2si2 = 1636,
|
||
|
CODE_FOR_sse4_1_zero_extendv2hiv2si2 = 1637,
|
||
|
CODE_FOR_sse4_1_sign_extendv2qiv2hi2 = 1638,
|
||
|
CODE_FOR_sse4_1_zero_extendv2qiv2hi2 = 1639,
|
||
|
CODE_FOR_mmx_pshufbv8qi3 = 1650,
|
||
|
CODE_FOR_mmx_pshufbv4qi3 = 1651,
|
||
|
CODE_FOR_mmx_pshufw_1 = 1652,
|
||
|
CODE_FOR_mmx_pswapdv2si2 = 1656,
|
||
|
CODE_FOR_uavgv4qi3_ceil = 1680,
|
||
|
CODE_FOR_uavgv2qi3_ceil = 1681,
|
||
|
CODE_FOR_uavgv2hi3_ceil = 1682,
|
||
|
CODE_FOR_mmx_psadbw = 1683,
|
||
|
CODE_FOR_mmx_pmovmskb = 1684,
|
||
|
CODE_FOR_movv64qi_internal = 1689,
|
||
|
CODE_FOR_movv32qi_internal = 1690,
|
||
|
CODE_FOR_movv16qi_internal = 1691,
|
||
|
CODE_FOR_movv32hi_internal = 1692,
|
||
|
CODE_FOR_movv16hi_internal = 1693,
|
||
|
CODE_FOR_movv8hi_internal = 1694,
|
||
|
CODE_FOR_movv16si_internal = 1695,
|
||
|
CODE_FOR_movv8si_internal = 1696,
|
||
|
CODE_FOR_movv4si_internal = 1697,
|
||
|
CODE_FOR_movv8di_internal = 1698,
|
||
|
CODE_FOR_movv4di_internal = 1699,
|
||
|
CODE_FOR_movv2di_internal = 1700,
|
||
|
CODE_FOR_movv4ti_internal = 1701,
|
||
|
CODE_FOR_movv2ti_internal = 1702,
|
||
|
CODE_FOR_movv1ti_internal = 1703,
|
||
|
CODE_FOR_movv32hf_internal = 1704,
|
||
|
CODE_FOR_movv16hf_internal = 1705,
|
||
|
CODE_FOR_movv8hf_internal = 1706,
|
||
|
CODE_FOR_movv16sf_internal = 1707,
|
||
|
CODE_FOR_movv8sf_internal = 1708,
|
||
|
CODE_FOR_movv4sf_internal = 1709,
|
||
|
CODE_FOR_movv8df_internal = 1710,
|
||
|
CODE_FOR_movv4df_internal = 1711,
|
||
|
CODE_FOR_movv2df_internal = 1712,
|
||
|
CODE_FOR_avx512f_movhf_mask = 1749,
|
||
|
CODE_FOR_avx512f_movsf_mask = 1750,
|
||
|
CODE_FOR_avx512f_movdf_mask = 1751,
|
||
|
CODE_FOR_avx512f_storehf_mask = 1755,
|
||
|
CODE_FOR_avx512f_storesf_mask = 1756,
|
||
|
CODE_FOR_avx512f_storedf_mask = 1757,
|
||
|
CODE_FOR_avx512f_blendmv16si = 1758,
|
||
|
CODE_FOR_avx512vl_blendmv8si = 1759,
|
||
|
CODE_FOR_avx512vl_blendmv4si = 1760,
|
||
|
CODE_FOR_avx512f_blendmv8di = 1761,
|
||
|
CODE_FOR_avx512vl_blendmv4di = 1762,
|
||
|
CODE_FOR_avx512vl_blendmv2di = 1763,
|
||
|
CODE_FOR_avx512f_blendmv16sf = 1764,
|
||
|
CODE_FOR_avx512vl_blendmv8sf = 1765,
|
||
|
CODE_FOR_avx512vl_blendmv4sf = 1766,
|
||
|
CODE_FOR_avx512f_blendmv8df = 1767,
|
||
|
CODE_FOR_avx512vl_blendmv4df = 1768,
|
||
|
CODE_FOR_avx512vl_blendmv2df = 1769,
|
||
|
CODE_FOR_avx512bw_blendmv64qi = 1770,
|
||
|
CODE_FOR_avx512vl_blendmv16qi = 1771,
|
||
|
CODE_FOR_avx512vl_blendmv32qi = 1772,
|
||
|
CODE_FOR_avx512bw_blendmv32hi = 1773,
|
||
|
CODE_FOR_avx512vl_blendmv16hi = 1774,
|
||
|
CODE_FOR_avx512vl_blendmv8hi = 1775,
|
||
|
CODE_FOR_avx512bw_blendmv32hf = 1776,
|
||
|
CODE_FOR_avx512vl_blendmv16hf = 1777,
|
||
|
CODE_FOR_avx512fp16_blendmv8hf = 1778,
|
||
|
CODE_FOR_avx512f_storev16si_mask = 1779,
|
||
|
CODE_FOR_avx512vl_storev8si_mask = 1780,
|
||
|
CODE_FOR_avx512vl_storev4si_mask = 1781,
|
||
|
CODE_FOR_avx512f_storev8di_mask = 1782,
|
||
|
CODE_FOR_avx512vl_storev4di_mask = 1783,
|
||
|
CODE_FOR_avx512vl_storev2di_mask = 1784,
|
||
|
CODE_FOR_avx512f_storev16sf_mask = 1785,
|
||
|
CODE_FOR_avx512vl_storev8sf_mask = 1786,
|
||
|
CODE_FOR_avx512vl_storev4sf_mask = 1787,
|
||
|
CODE_FOR_avx512f_storev8df_mask = 1788,
|
||
|
CODE_FOR_avx512vl_storev4df_mask = 1789,
|
||
|
CODE_FOR_avx512vl_storev2df_mask = 1790,
|
||
|
CODE_FOR_avx512bw_storev64qi_mask = 1791,
|
||
|
CODE_FOR_avx512vl_storev16qi_mask = 1792,
|
||
|
CODE_FOR_avx512vl_storev32qi_mask = 1793,
|
||
|
CODE_FOR_avx512bw_storev32hi_mask = 1794,
|
||
|
CODE_FOR_avx512vl_storev16hi_mask = 1795,
|
||
|
CODE_FOR_avx512vl_storev8hi_mask = 1796,
|
||
|
CODE_FOR_avx512bw_storev32hf_mask = 1797,
|
||
|
CODE_FOR_avx512vl_storev16hf_mask = 1798,
|
||
|
CODE_FOR_avx512fp16_storev8hf_mask = 1799,
|
||
|
CODE_FOR_movdi_to_sse = 1802,
|
||
|
CODE_FOR_avx_lddqu256 = 1803,
|
||
|
CODE_FOR_sse3_lddqu = 1804,
|
||
|
CODE_FOR_sse2_movntisi = 1805,
|
||
|
CODE_FOR_sse2_movntidi = 1806,
|
||
|
CODE_FOR_avx512f_movntv16sf = 1807,
|
||
|
CODE_FOR_avx_movntv8sf = 1808,
|
||
|
CODE_FOR_sse_movntv4sf = 1809,
|
||
|
CODE_FOR_avx512f_movntv8df = 1810,
|
||
|
CODE_FOR_avx_movntv4df = 1811,
|
||
|
CODE_FOR_sse2_movntv2df = 1812,
|
||
|
CODE_FOR_avx512f_movntv8di = 1813,
|
||
|
CODE_FOR_avx_movntv4di = 1814,
|
||
|
CODE_FOR_sse2_movntv2di = 1815,
|
||
|
CODE_FOR_kandqi = 1816,
|
||
|
CODE_FOR_kiorqi = 1817,
|
||
|
CODE_FOR_kxorqi = 1818,
|
||
|
CODE_FOR_kandhi = 1819,
|
||
|
CODE_FOR_kiorhi = 1820,
|
||
|
CODE_FOR_kxorhi = 1821,
|
||
|
CODE_FOR_kandsi = 1822,
|
||
|
CODE_FOR_kiorsi = 1823,
|
||
|
CODE_FOR_kxorsi = 1824,
|
||
|
CODE_FOR_kanddi = 1825,
|
||
|
CODE_FOR_kiordi = 1826,
|
||
|
CODE_FOR_kxordi = 1827,
|
||
|
CODE_FOR_kandnqi = 1828,
|
||
|
CODE_FOR_kandnhi = 1829,
|
||
|
CODE_FOR_kandnsi = 1830,
|
||
|
CODE_FOR_kandndi = 1831,
|
||
|
CODE_FOR_kxnorqi = 1832,
|
||
|
CODE_FOR_kxnorhi = 1833,
|
||
|
CODE_FOR_kxnorsi = 1834,
|
||
|
CODE_FOR_kxnordi = 1835,
|
||
|
CODE_FOR_knotqi = 1836,
|
||
|
CODE_FOR_knothi = 1837,
|
||
|
CODE_FOR_knotsi = 1838,
|
||
|
CODE_FOR_knotdi = 1839,
|
||
|
CODE_FOR_kaddqi = 1841,
|
||
|
CODE_FOR_kaddhi = 1842,
|
||
|
CODE_FOR_kaddsi = 1843,
|
||
|
CODE_FOR_kadddi = 1844,
|
||
|
CODE_FOR_kashiftqi = 1845,
|
||
|
CODE_FOR_klshiftrtqi = 1846,
|
||
|
CODE_FOR_kashifthi = 1847,
|
||
|
CODE_FOR_klshiftrthi = 1848,
|
||
|
CODE_FOR_kashiftsi = 1849,
|
||
|
CODE_FOR_klshiftrtsi = 1850,
|
||
|
CODE_FOR_kashiftdi = 1851,
|
||
|
CODE_FOR_klshiftrtdi = 1852,
|
||
|
CODE_FOR_ktestqi = 1853,
|
||
|
CODE_FOR_ktesthi = 1854,
|
||
|
CODE_FOR_ktestsi = 1855,
|
||
|
CODE_FOR_ktestdi = 1856,
|
||
|
CODE_FOR_kortestqi = 1857,
|
||
|
CODE_FOR_kortesthi = 1858,
|
||
|
CODE_FOR_kortestsi = 1859,
|
||
|
CODE_FOR_kortestdi = 1860,
|
||
|
CODE_FOR_kunpckhi = 1861,
|
||
|
CODE_FOR_kunpcksi = 1862,
|
||
|
CODE_FOR_kunpckdi = 1863,
|
||
|
CODE_FOR_avx512fp16_vmaddv8hf3 = 1966,
|
||
|
CODE_FOR_avx512fp16_vmaddv8hf3_round = 1967,
|
||
|
CODE_FOR_avx512fp16_vmaddv8hf3_mask = 1968,
|
||
|
CODE_FOR_avx512fp16_vmaddv8hf3_mask_round = 1969,
|
||
|
CODE_FOR_avx512fp16_vmsubv8hf3 = 1970,
|
||
|
CODE_FOR_avx512fp16_vmsubv8hf3_round = 1971,
|
||
|
CODE_FOR_avx512fp16_vmsubv8hf3_mask = 1972,
|
||
|
CODE_FOR_avx512fp16_vmsubv8hf3_mask_round = 1973,
|
||
|
CODE_FOR_sse_vmaddv4sf3 = 1974,
|
||
|
CODE_FOR_sse_vmaddv4sf3_round = 1975,
|
||
|
CODE_FOR_sse_vmaddv4sf3_mask = 1976,
|
||
|
CODE_FOR_sse_vmaddv4sf3_mask_round = 1977,
|
||
|
CODE_FOR_sse_vmsubv4sf3 = 1978,
|
||
|
CODE_FOR_sse_vmsubv4sf3_round = 1979,
|
||
|
CODE_FOR_sse_vmsubv4sf3_mask = 1980,
|
||
|
CODE_FOR_sse_vmsubv4sf3_mask_round = 1981,
|
||
|
CODE_FOR_sse2_vmaddv2df3 = 1982,
|
||
|
CODE_FOR_sse2_vmaddv2df3_round = 1983,
|
||
|
CODE_FOR_sse2_vmaddv2df3_mask = 1984,
|
||
|
CODE_FOR_sse2_vmaddv2df3_mask_round = 1985,
|
||
|
CODE_FOR_sse2_vmsubv2df3 = 1986,
|
||
|
CODE_FOR_sse2_vmsubv2df3_round = 1987,
|
||
|
CODE_FOR_sse2_vmsubv2df3_mask = 1988,
|
||
|
CODE_FOR_sse2_vmsubv2df3_mask_round = 1989,
|
||
|
CODE_FOR_avx512fp16_vmmulv8hf3 = 2032,
|
||
|
CODE_FOR_avx512fp16_vmmulv8hf3_round = 2033,
|
||
|
CODE_FOR_avx512fp16_vmmulv8hf3_mask = 2034,
|
||
|
CODE_FOR_avx512fp16_vmmulv8hf3_mask_round = 2035,
|
||
|
CODE_FOR_avx512fp16_vmdivv8hf3 = 2036,
|
||
|
CODE_FOR_avx512fp16_vmdivv8hf3_round = 2037,
|
||
|
CODE_FOR_avx512fp16_vmdivv8hf3_mask = 2038,
|
||
|
CODE_FOR_avx512fp16_vmdivv8hf3_mask_round = 2039,
|
||
|
CODE_FOR_sse_vmmulv4sf3 = 2040,
|
||
|
CODE_FOR_sse_vmmulv4sf3_round = 2041,
|
||
|
CODE_FOR_sse_vmmulv4sf3_mask = 2042,
|
||
|
CODE_FOR_sse_vmmulv4sf3_mask_round = 2043,
|
||
|
CODE_FOR_sse_vmdivv4sf3 = 2044,
|
||
|
CODE_FOR_sse_vmdivv4sf3_round = 2045,
|
||
|
CODE_FOR_sse_vmdivv4sf3_mask = 2046,
|
||
|
CODE_FOR_sse_vmdivv4sf3_mask_round = 2047,
|
||
|
CODE_FOR_sse2_vmmulv2df3 = 2048,
|
||
|
CODE_FOR_sse2_vmmulv2df3_round = 2049,
|
||
|
CODE_FOR_sse2_vmmulv2df3_mask = 2050,
|
||
|
CODE_FOR_sse2_vmmulv2df3_mask_round = 2051,
|
||
|
CODE_FOR_sse2_vmdivv2df3 = 2052,
|
||
|
CODE_FOR_sse2_vmdivv2df3_round = 2053,
|
||
|
CODE_FOR_sse2_vmdivv2df3_mask = 2054,
|
||
|
CODE_FOR_sse2_vmdivv2df3_mask_round = 2055,
|
||
|
CODE_FOR_avx512fp16_divv32hf3 = 2056,
|
||
|
CODE_FOR_avx512fp16_divv32hf3_round = 2057,
|
||
|
CODE_FOR_avx512fp16_divv32hf3_mask = 2058,
|
||
|
CODE_FOR_avx512fp16_divv32hf3_mask_round = 2059,
|
||
|
CODE_FOR_avx512fp16_divv16hf3 = 2060,
|
||
|
CODE_FOR_avx512fp16_divv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_divv16hf3_mask = 2061,
|
||
|
CODE_FOR_avx512fp16_divv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_divv8hf3 = 2062,
|
||
|
CODE_FOR_avx512fp16_divv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_divv8hf3_mask = 2063,
|
||
|
CODE_FOR_avx512fp16_divv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_divv16sf3 = 2064,
|
||
|
CODE_FOR_avx512f_divv16sf3_round = 2065,
|
||
|
CODE_FOR_avx512f_divv16sf3_mask = 2066,
|
||
|
CODE_FOR_avx512f_divv16sf3_mask_round = 2067,
|
||
|
CODE_FOR_avx_divv8sf3 = 2068,
|
||
|
CODE_FOR_avx_divv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_divv8sf3_mask = 2069,
|
||
|
CODE_FOR_avx_divv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse_divv4sf3 = 2070,
|
||
|
CODE_FOR_sse_divv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse_divv4sf3_mask = 2071,
|
||
|
CODE_FOR_sse_divv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_divv8df3 = 2072,
|
||
|
CODE_FOR_avx512f_divv8df3_round = 2073,
|
||
|
CODE_FOR_avx512f_divv8df3_mask = 2074,
|
||
|
CODE_FOR_avx512f_divv8df3_mask_round = 2075,
|
||
|
CODE_FOR_avx_divv4df3 = 2076,
|
||
|
CODE_FOR_avx_divv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_divv4df3_mask = 2077,
|
||
|
CODE_FOR_avx_divv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse2_divv2df3 = 2078,
|
||
|
CODE_FOR_sse2_divv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse2_divv2df3_mask = 2079,
|
||
|
CODE_FOR_sse2_divv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_rcpv8sf2 = 2080,
|
||
|
CODE_FOR_sse_rcpv4sf2 = 2081,
|
||
|
CODE_FOR_sse_vmrcpv4sf2 = 2082,
|
||
|
CODE_FOR_avx512fp16_rcpv32hf2 = 2084,
|
||
|
CODE_FOR_avx512fp16_rcpv32hf2_mask = 2085,
|
||
|
CODE_FOR_avx512fp16_rcpv16hf2 = 2086,
|
||
|
CODE_FOR_avx512fp16_rcpv16hf2_mask = 2087,
|
||
|
CODE_FOR_avx512fp16_rcpv8hf2 = 2088,
|
||
|
CODE_FOR_avx512fp16_rcpv8hf2_mask = 2089,
|
||
|
CODE_FOR_avx512fp16_vmrcpv8hf2 = 2090,
|
||
|
CODE_FOR_avx512fp16_vmrcpv8hf2_mask = 2091,
|
||
|
CODE_FOR_rcp14v16sf_mask = 2094,
|
||
|
CODE_FOR_rcp14v8sf_mask = 2096,
|
||
|
CODE_FOR_rcp14v4sf_mask = 2098,
|
||
|
CODE_FOR_rcp14v8df_mask = 2100,
|
||
|
CODE_FOR_rcp14v4df_mask = 2102,
|
||
|
CODE_FOR_rcp14v2df_mask = 2104,
|
||
|
CODE_FOR_srcp14v4sf = 2105,
|
||
|
CODE_FOR_srcp14v2df = 2106,
|
||
|
CODE_FOR_srcp14v4sf_mask = 2107,
|
||
|
CODE_FOR_srcp14v2df_mask = 2108,
|
||
|
CODE_FOR_avx512fp16_sqrtv32hf2 = 2109,
|
||
|
CODE_FOR_avx512fp16_sqrtv32hf2_round = 2110,
|
||
|
CODE_FOR_avx512fp16_sqrtv32hf2_mask = 2111,
|
||
|
CODE_FOR_avx512fp16_sqrtv32hf2_mask_round = 2112,
|
||
|
CODE_FOR_avx512fp16_sqrtv16hf2 = 2113,
|
||
|
CODE_FOR_avx512fp16_sqrtv16hf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_sqrtv16hf2_mask = 2114,
|
||
|
CODE_FOR_avx512fp16_sqrtv16hf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_sqrtv8hf2 = 2115,
|
||
|
CODE_FOR_avx512fp16_sqrtv8hf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_sqrtv8hf2_mask = 2116,
|
||
|
CODE_FOR_avx512fp16_sqrtv8hf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_sqrtv16sf2 = 2117,
|
||
|
CODE_FOR_avx512f_sqrtv16sf2_round = 2118,
|
||
|
CODE_FOR_avx512f_sqrtv16sf2_mask = 2119,
|
||
|
CODE_FOR_avx512f_sqrtv16sf2_mask_round = 2120,
|
||
|
CODE_FOR_avx_sqrtv8sf2 = 2121,
|
||
|
CODE_FOR_avx_sqrtv8sf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_sqrtv8sf2_mask = 2122,
|
||
|
CODE_FOR_avx_sqrtv8sf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse_sqrtv4sf2 = 2123,
|
||
|
CODE_FOR_sse_sqrtv4sf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse_sqrtv4sf2_mask = 2124,
|
||
|
CODE_FOR_sse_sqrtv4sf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_sqrtv8df2 = 2125,
|
||
|
CODE_FOR_avx512f_sqrtv8df2_round = 2126,
|
||
|
CODE_FOR_avx512f_sqrtv8df2_mask = 2127,
|
||
|
CODE_FOR_avx512f_sqrtv8df2_mask_round = 2128,
|
||
|
CODE_FOR_avx_sqrtv4df2 = 2129,
|
||
|
CODE_FOR_avx_sqrtv4df2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_sqrtv4df2_mask = 2130,
|
||
|
CODE_FOR_avx_sqrtv4df2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse2_sqrtv2df2 = 2131,
|
||
|
CODE_FOR_sse2_sqrtv2df2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse2_sqrtv2df2_mask = 2132,
|
||
|
CODE_FOR_sse2_sqrtv2df2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_vmsqrtv8hf2 = 2133,
|
||
|
CODE_FOR_avx512fp16_vmsqrtv8hf2_round = 2134,
|
||
|
CODE_FOR_avx512fp16_vmsqrtv8hf2_mask = 2135,
|
||
|
CODE_FOR_avx512fp16_vmsqrtv8hf2_mask_round = 2136,
|
||
|
CODE_FOR_sse_vmsqrtv4sf2 = 2137,
|
||
|
CODE_FOR_sse_vmsqrtv4sf2_round = 2138,
|
||
|
CODE_FOR_sse_vmsqrtv4sf2_mask = 2139,
|
||
|
CODE_FOR_sse_vmsqrtv4sf2_mask_round = 2140,
|
||
|
CODE_FOR_sse2_vmsqrtv2df2 = 2141,
|
||
|
CODE_FOR_sse2_vmsqrtv2df2_round = 2142,
|
||
|
CODE_FOR_sse2_vmsqrtv2df2_mask = 2143,
|
||
|
CODE_FOR_sse2_vmsqrtv2df2_mask_round = 2144,
|
||
|
CODE_FOR_avx_rsqrtv8sf2 = 2157,
|
||
|
CODE_FOR_sse_rsqrtv4sf2 = 2158,
|
||
|
CODE_FOR_avx512fp16_rsqrtv32hf2 = 2159,
|
||
|
CODE_FOR_avx512fp16_rsqrtv32hf2_mask = 2160,
|
||
|
CODE_FOR_avx512fp16_rsqrtv16hf2 = 2161,
|
||
|
CODE_FOR_avx512fp16_rsqrtv16hf2_mask = 2162,
|
||
|
CODE_FOR_avx512fp16_rsqrtv8hf2 = 2163,
|
||
|
CODE_FOR_avx512fp16_rsqrtv8hf2_mask = 2164,
|
||
|
CODE_FOR_rsqrt14v16sf_mask = 2166,
|
||
|
CODE_FOR_rsqrt14v8sf_mask = 2168,
|
||
|
CODE_FOR_rsqrt14v4sf_mask = 2170,
|
||
|
CODE_FOR_rsqrt14v8df_mask = 2172,
|
||
|
CODE_FOR_rsqrt14v4df_mask = 2174,
|
||
|
CODE_FOR_rsqrt14v2df_mask = 2176,
|
||
|
CODE_FOR_rsqrt14v4sf = 2177,
|
||
|
CODE_FOR_rsqrt14v2df = 2178,
|
||
|
CODE_FOR_rsqrt14_v4sf_mask = 2179,
|
||
|
CODE_FOR_rsqrt14_v2df_mask = 2180,
|
||
|
CODE_FOR_sse_vmrsqrtv4sf2 = 2181,
|
||
|
CODE_FOR_avx512fp16_vmrsqrtv8hf2 = 2183,
|
||
|
CODE_FOR_avx512fp16_vmrsqrtv8hf2_mask = 2184,
|
||
|
CODE_FOR_ieee_maxv32hf3 = 2235,
|
||
|
CODE_FOR_ieee_maxv32hf3_round = 2236,
|
||
|
CODE_FOR_ieee_maxv32hf3_mask = 2237,
|
||
|
CODE_FOR_ieee_maxv32hf3_mask_round = 2238,
|
||
|
CODE_FOR_ieee_minv32hf3 = 2239,
|
||
|
CODE_FOR_ieee_minv32hf3_round = 2240,
|
||
|
CODE_FOR_ieee_minv32hf3_mask = 2241,
|
||
|
CODE_FOR_ieee_minv32hf3_mask_round = 2242,
|
||
|
CODE_FOR_ieee_maxv16hf3 = 2243,
|
||
|
CODE_FOR_ieee_maxv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv16hf3_mask = 2244,
|
||
|
CODE_FOR_ieee_maxv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv16hf3 = 2245,
|
||
|
CODE_FOR_ieee_minv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv16hf3_mask = 2246,
|
||
|
CODE_FOR_ieee_minv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv8hf3 = 2247,
|
||
|
CODE_FOR_ieee_maxv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv8hf3_mask = 2248,
|
||
|
CODE_FOR_ieee_maxv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv8hf3 = 2249,
|
||
|
CODE_FOR_ieee_minv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv8hf3_mask = 2250,
|
||
|
CODE_FOR_ieee_minv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv16sf3 = 2251,
|
||
|
CODE_FOR_ieee_maxv16sf3_round = 2252,
|
||
|
CODE_FOR_ieee_maxv16sf3_mask = 2253,
|
||
|
CODE_FOR_ieee_maxv16sf3_mask_round = 2254,
|
||
|
CODE_FOR_ieee_minv16sf3 = 2255,
|
||
|
CODE_FOR_ieee_minv16sf3_round = 2256,
|
||
|
CODE_FOR_ieee_minv16sf3_mask = 2257,
|
||
|
CODE_FOR_ieee_minv16sf3_mask_round = 2258,
|
||
|
CODE_FOR_ieee_maxv8sf3 = 2259,
|
||
|
CODE_FOR_ieee_maxv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv8sf3_mask = 2260,
|
||
|
CODE_FOR_ieee_maxv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv8sf3 = 2261,
|
||
|
CODE_FOR_ieee_minv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv8sf3_mask = 2262,
|
||
|
CODE_FOR_ieee_minv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv4sf3 = 2263,
|
||
|
CODE_FOR_ieee_maxv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv4sf3_mask = 2264,
|
||
|
CODE_FOR_ieee_maxv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv4sf3 = 2265,
|
||
|
CODE_FOR_ieee_minv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv4sf3_mask = 2266,
|
||
|
CODE_FOR_ieee_minv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv8df3 = 2267,
|
||
|
CODE_FOR_ieee_maxv8df3_round = 2268,
|
||
|
CODE_FOR_ieee_maxv8df3_mask = 2269,
|
||
|
CODE_FOR_ieee_maxv8df3_mask_round = 2270,
|
||
|
CODE_FOR_ieee_minv8df3 = 2271,
|
||
|
CODE_FOR_ieee_minv8df3_round = 2272,
|
||
|
CODE_FOR_ieee_minv8df3_mask = 2273,
|
||
|
CODE_FOR_ieee_minv8df3_mask_round = 2274,
|
||
|
CODE_FOR_ieee_maxv4df3 = 2275,
|
||
|
CODE_FOR_ieee_maxv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv4df3_mask = 2276,
|
||
|
CODE_FOR_ieee_maxv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv4df3 = 2277,
|
||
|
CODE_FOR_ieee_minv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv4df3_mask = 2278,
|
||
|
CODE_FOR_ieee_minv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv2df3 = 2279,
|
||
|
CODE_FOR_ieee_maxv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_maxv2df3_mask = 2280,
|
||
|
CODE_FOR_ieee_maxv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv2df3 = 2281,
|
||
|
CODE_FOR_ieee_minv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ieee_minv2df3_mask = 2282,
|
||
|
CODE_FOR_ieee_minv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_vmsmaxv8hf3 = 2289,
|
||
|
CODE_FOR_avx512fp16_vmsmaxv8hf3_mask = 2290,
|
||
|
CODE_FOR_avx512fp16_vmsmaxv8hf3_round = 2291,
|
||
|
CODE_FOR_avx512fp16_vmsmaxv8hf3_mask_round = 2292,
|
||
|
CODE_FOR_avx512fp16_vmsminv8hf3 = 2293,
|
||
|
CODE_FOR_avx512fp16_vmsminv8hf3_mask = 2294,
|
||
|
CODE_FOR_avx512fp16_vmsminv8hf3_round = 2295,
|
||
|
CODE_FOR_avx512fp16_vmsminv8hf3_mask_round = 2296,
|
||
|
CODE_FOR_sse_vmsmaxv4sf3 = 2297,
|
||
|
CODE_FOR_sse_vmsmaxv4sf3_mask = 2298,
|
||
|
CODE_FOR_sse_vmsmaxv4sf3_round = 2299,
|
||
|
CODE_FOR_sse_vmsmaxv4sf3_mask_round = 2300,
|
||
|
CODE_FOR_sse_vmsminv4sf3 = 2301,
|
||
|
CODE_FOR_sse_vmsminv4sf3_mask = 2302,
|
||
|
CODE_FOR_sse_vmsminv4sf3_round = 2303,
|
||
|
CODE_FOR_sse_vmsminv4sf3_mask_round = 2304,
|
||
|
CODE_FOR_sse2_vmsmaxv2df3 = 2305,
|
||
|
CODE_FOR_sse2_vmsmaxv2df3_mask = 2306,
|
||
|
CODE_FOR_sse2_vmsmaxv2df3_round = 2307,
|
||
|
CODE_FOR_sse2_vmsmaxv2df3_mask_round = 2308,
|
||
|
CODE_FOR_sse2_vmsminv2df3 = 2309,
|
||
|
CODE_FOR_sse2_vmsminv2df3_mask = 2310,
|
||
|
CODE_FOR_sse2_vmsminv2df3_round = 2311,
|
||
|
CODE_FOR_sse2_vmsminv2df3_mask_round = 2312,
|
||
|
CODE_FOR_vec_addsubv8sf3 = 2313,
|
||
|
CODE_FOR_vec_addsubv4sf3 = 2314,
|
||
|
CODE_FOR_vec_addsubv4df3 = 2315,
|
||
|
CODE_FOR_vec_addsubv2df3 = 2316,
|
||
|
CODE_FOR_avx_haddv4df3 = 2317,
|
||
|
CODE_FOR_avx_hsubv4df3 = 2318,
|
||
|
CODE_FOR_sse3_hsubv2df3 = 2320,
|
||
|
CODE_FOR_avx_haddv8sf3 = 2323,
|
||
|
CODE_FOR_avx_hsubv8sf3 = 2324,
|
||
|
CODE_FOR_sse3_haddv4sf3 = 2325,
|
||
|
CODE_FOR_sse3_hsubv4sf3 = 2326,
|
||
|
CODE_FOR_reducepv32hf_mask = 2329,
|
||
|
CODE_FOR_reducepv32hf_mask_round = 2330,
|
||
|
CODE_FOR_reducepv16hf_mask = 2333,
|
||
|
CODE_FOR_reducepv16hf_mask_round = 2334,
|
||
|
CODE_FOR_reducepv8hf_mask = 2337,
|
||
|
CODE_FOR_reducepv8hf_mask_round = 2338,
|
||
|
CODE_FOR_reducepv16sf_mask = 2341,
|
||
|
CODE_FOR_reducepv16sf_mask_round = 2342,
|
||
|
CODE_FOR_reducepv8sf_mask = 2345,
|
||
|
CODE_FOR_reducepv8sf_mask_round = 2346,
|
||
|
CODE_FOR_reducepv4sf_mask = 2349,
|
||
|
CODE_FOR_reducepv4sf_mask_round = 2350,
|
||
|
CODE_FOR_reducepv8df_mask = 2353,
|
||
|
CODE_FOR_reducepv8df_mask_round = 2354,
|
||
|
CODE_FOR_reducepv4df_mask = 2357,
|
||
|
CODE_FOR_reducepv4df_mask_round = 2358,
|
||
|
CODE_FOR_reducepv2df_mask = 2361,
|
||
|
CODE_FOR_reducepv2df_mask_round = 2362,
|
||
|
CODE_FOR_reducesv8hf = 2363,
|
||
|
CODE_FOR_reducesv8hf_mask = 2364,
|
||
|
CODE_FOR_reducesv8hf_round = 2365,
|
||
|
CODE_FOR_reducesv8hf_mask_round = 2366,
|
||
|
CODE_FOR_reducesv4sf = 2367,
|
||
|
CODE_FOR_reducesv4sf_mask = 2368,
|
||
|
CODE_FOR_reducesv4sf_round = 2369,
|
||
|
CODE_FOR_reducesv4sf_mask_round = 2370,
|
||
|
CODE_FOR_reducesv2df = 2371,
|
||
|
CODE_FOR_reducesv2df_mask = 2372,
|
||
|
CODE_FOR_reducesv2df_round = 2373,
|
||
|
CODE_FOR_reducesv2df_mask_round = 2374,
|
||
|
CODE_FOR_avx_cmpv8sf3 = 2375,
|
||
|
CODE_FOR_avx_cmpv4sf3 = 2376,
|
||
|
CODE_FOR_avx_cmpv4df3 = 2377,
|
||
|
CODE_FOR_avx_cmpv2df3 = 2378,
|
||
|
CODE_FOR_avx_vmcmpv4sf3 = 2407,
|
||
|
CODE_FOR_avx_vmcmpv2df3 = 2408,
|
||
|
CODE_FOR_avx_maskcmpv8sf3 = 2413,
|
||
|
CODE_FOR_sse_maskcmpv4sf3 = 2414,
|
||
|
CODE_FOR_avx_maskcmpv4df3 = 2415,
|
||
|
CODE_FOR_sse2_maskcmpv2df3 = 2416,
|
||
|
CODE_FOR_sse_vmmaskcmpv4sf3 = 2417,
|
||
|
CODE_FOR_sse2_vmmaskcmpv2df3 = 2418,
|
||
|
CODE_FOR_avx512f_cmpv16si3 = 2419,
|
||
|
CODE_FOR_avx512f_cmpv16si3_round = 2420,
|
||
|
CODE_FOR_avx512f_cmpv16si3_mask = 2421,
|
||
|
CODE_FOR_avx512f_cmpv16si3_mask_round = 2422,
|
||
|
CODE_FOR_avx512vl_cmpv8si3 = 2423,
|
||
|
CODE_FOR_avx512vl_cmpv8si3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv8si3_mask = 2424,
|
||
|
CODE_FOR_avx512vl_cmpv8si3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv4si3 = 2425,
|
||
|
CODE_FOR_avx512vl_cmpv4si3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv4si3_mask = 2426,
|
||
|
CODE_FOR_avx512vl_cmpv4si3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_cmpv8di3 = 2427,
|
||
|
CODE_FOR_avx512f_cmpv8di3_round = 2428,
|
||
|
CODE_FOR_avx512f_cmpv8di3_mask = 2429,
|
||
|
CODE_FOR_avx512f_cmpv8di3_mask_round = 2430,
|
||
|
CODE_FOR_avx512vl_cmpv4di3 = 2431,
|
||
|
CODE_FOR_avx512vl_cmpv4di3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv4di3_mask = 2432,
|
||
|
CODE_FOR_avx512vl_cmpv4di3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv2di3 = 2433,
|
||
|
CODE_FOR_avx512vl_cmpv2di3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv2di3_mask = 2434,
|
||
|
CODE_FOR_avx512vl_cmpv2di3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_cmpv32hf3 = 2435,
|
||
|
CODE_FOR_avx512bw_cmpv32hf3_round = 2436,
|
||
|
CODE_FOR_avx512bw_cmpv32hf3_mask = 2437,
|
||
|
CODE_FOR_avx512bw_cmpv32hf3_mask_round = 2438,
|
||
|
CODE_FOR_avx512vl_cmpv16hf3 = 2439,
|
||
|
CODE_FOR_avx512vl_cmpv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv16hf3_mask = 2440,
|
||
|
CODE_FOR_avx512vl_cmpv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_cmpv8hf3 = 2441,
|
||
|
CODE_FOR_avx512fp16_cmpv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_cmpv8hf3_mask = 2442,
|
||
|
CODE_FOR_avx512fp16_cmpv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_cmpv16sf3 = 2443,
|
||
|
CODE_FOR_avx512f_cmpv16sf3_round = 2444,
|
||
|
CODE_FOR_avx512f_cmpv16sf3_mask = 2445,
|
||
|
CODE_FOR_avx512f_cmpv16sf3_mask_round = 2446,
|
||
|
CODE_FOR_avx512vl_cmpv8sf3 = 2447,
|
||
|
CODE_FOR_avx512vl_cmpv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv8sf3_mask = 2448,
|
||
|
CODE_FOR_avx512vl_cmpv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv4sf3 = 2449,
|
||
|
CODE_FOR_avx512vl_cmpv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv4sf3_mask = 2450,
|
||
|
CODE_FOR_avx512vl_cmpv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_cmpv8df3 = 2451,
|
||
|
CODE_FOR_avx512f_cmpv8df3_round = 2452,
|
||
|
CODE_FOR_avx512f_cmpv8df3_mask = 2453,
|
||
|
CODE_FOR_avx512f_cmpv8df3_mask_round = 2454,
|
||
|
CODE_FOR_avx512vl_cmpv4df3 = 2455,
|
||
|
CODE_FOR_avx512vl_cmpv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv4df3_mask = 2456,
|
||
|
CODE_FOR_avx512vl_cmpv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv2df3 = 2457,
|
||
|
CODE_FOR_avx512vl_cmpv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_cmpv2df3_mask = 2458,
|
||
|
CODE_FOR_avx512vl_cmpv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_cmpv64qi3 = 2561,
|
||
|
CODE_FOR_avx512bw_cmpv64qi3_mask = 2562,
|
||
|
CODE_FOR_avx512vl_cmpv16qi3 = 2563,
|
||
|
CODE_FOR_avx512vl_cmpv16qi3_mask = 2564,
|
||
|
CODE_FOR_avx512vl_cmpv32qi3 = 2565,
|
||
|
CODE_FOR_avx512vl_cmpv32qi3_mask = 2566,
|
||
|
CODE_FOR_avx512bw_cmpv32hi3 = 2567,
|
||
|
CODE_FOR_avx512bw_cmpv32hi3_mask = 2568,
|
||
|
CODE_FOR_avx512vl_cmpv16hi3 = 2569,
|
||
|
CODE_FOR_avx512vl_cmpv16hi3_mask = 2570,
|
||
|
CODE_FOR_avx512vl_cmpv8hi3 = 2571,
|
||
|
CODE_FOR_avx512vl_cmpv8hi3_mask = 2572,
|
||
|
CODE_FOR_avx512bw_ucmpv64qi3 = 2645,
|
||
|
CODE_FOR_avx512bw_ucmpv64qi3_mask = 2646,
|
||
|
CODE_FOR_avx512vl_ucmpv16qi3 = 2647,
|
||
|
CODE_FOR_avx512vl_ucmpv16qi3_mask = 2648,
|
||
|
CODE_FOR_avx512vl_ucmpv32qi3 = 2649,
|
||
|
CODE_FOR_avx512vl_ucmpv32qi3_mask = 2650,
|
||
|
CODE_FOR_avx512bw_ucmpv32hi3 = 2651,
|
||
|
CODE_FOR_avx512bw_ucmpv32hi3_mask = 2652,
|
||
|
CODE_FOR_avx512vl_ucmpv16hi3 = 2653,
|
||
|
CODE_FOR_avx512vl_ucmpv16hi3_mask = 2654,
|
||
|
CODE_FOR_avx512vl_ucmpv8hi3 = 2655,
|
||
|
CODE_FOR_avx512vl_ucmpv8hi3_mask = 2656,
|
||
|
CODE_FOR_avx512f_ucmpv16si3 = 2717,
|
||
|
CODE_FOR_avx512f_ucmpv16si3_mask = 2718,
|
||
|
CODE_FOR_avx512vl_ucmpv8si3 = 2719,
|
||
|
CODE_FOR_avx512vl_ucmpv8si3_mask = 2720,
|
||
|
CODE_FOR_avx512vl_ucmpv4si3 = 2721,
|
||
|
CODE_FOR_avx512vl_ucmpv4si3_mask = 2722,
|
||
|
CODE_FOR_avx512f_ucmpv8di3 = 2723,
|
||
|
CODE_FOR_avx512f_ucmpv8di3_mask = 2724,
|
||
|
CODE_FOR_avx512vl_ucmpv4di3 = 2725,
|
||
|
CODE_FOR_avx512vl_ucmpv4di3_mask = 2726,
|
||
|
CODE_FOR_avx512vl_ucmpv2di3 = 2727,
|
||
|
CODE_FOR_avx512vl_ucmpv2di3_mask = 2728,
|
||
|
CODE_FOR_avx512f_vmcmpv8hf3 = 2783,
|
||
|
CODE_FOR_avx512f_vmcmpv8hf3_round = 2784,
|
||
|
CODE_FOR_avx512f_vmcmpv4sf3 = 2785,
|
||
|
CODE_FOR_avx512f_vmcmpv4sf3_round = 2786,
|
||
|
CODE_FOR_avx512f_vmcmpv2df3 = 2787,
|
||
|
CODE_FOR_avx512f_vmcmpv2df3_round = 2788,
|
||
|
CODE_FOR_avx512f_vmcmpv8hf3_mask = 2789,
|
||
|
CODE_FOR_avx512f_vmcmpv8hf3_mask_round = 2790,
|
||
|
CODE_FOR_avx512f_vmcmpv4sf3_mask = 2791,
|
||
|
CODE_FOR_avx512f_vmcmpv4sf3_mask_round = 2792,
|
||
|
CODE_FOR_avx512f_vmcmpv2df3_mask = 2793,
|
||
|
CODE_FOR_avx512f_vmcmpv2df3_mask_round = 2794,
|
||
|
CODE_FOR_avx512fp16_comi = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_comi_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_ucomi = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_ucomi_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse_comi = 2795,
|
||
|
CODE_FOR_sse_comi_round = 2796,
|
||
|
CODE_FOR_sse_ucomi = 2797,
|
||
|
CODE_FOR_sse_ucomi_round = 2798,
|
||
|
CODE_FOR_sse2_comi = 2799,
|
||
|
CODE_FOR_sse2_comi_round = 2800,
|
||
|
CODE_FOR_sse2_ucomi = 2801,
|
||
|
CODE_FOR_sse2_ucomi_round = 2802,
|
||
|
CODE_FOR_avx512fp16_andnotv16hf3 = 2803,
|
||
|
CODE_FOR_avx512fp16_andnotv16hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_andnotv8hf3 = 2804,
|
||
|
CODE_FOR_avx512fp16_andnotv8hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_andnotv8sf3 = 2805,
|
||
|
CODE_FOR_avx_andnotv8sf3_mask = 2806,
|
||
|
CODE_FOR_sse_andnotv4sf3 = 2807,
|
||
|
CODE_FOR_sse_andnotv4sf3_mask = 2808,
|
||
|
CODE_FOR_avx_andnotv4df3 = 2809,
|
||
|
CODE_FOR_avx_andnotv4df3_mask = 2810,
|
||
|
CODE_FOR_sse2_andnotv2df3 = 2811,
|
||
|
CODE_FOR_sse2_andnotv2df3_mask = 2812,
|
||
|
CODE_FOR_avx512fp16_andnotv32hf3 = 2813,
|
||
|
CODE_FOR_avx512fp16_andnotv32hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_andnotv16sf3 = 2814,
|
||
|
CODE_FOR_avx512f_andnotv16sf3_mask = 2815,
|
||
|
CODE_FOR_avx512f_andnotv8df3 = 2816,
|
||
|
CODE_FOR_avx512f_andnotv8df3_mask = 2817,
|
||
|
CODE_FOR_andsf3 = 2876,
|
||
|
CODE_FOR_iorsf3 = 2877,
|
||
|
CODE_FOR_xorsf3 = 2878,
|
||
|
CODE_FOR_anddf3 = 2879,
|
||
|
CODE_FOR_iordf3 = 2880,
|
||
|
CODE_FOR_xordf3 = 2881,
|
||
|
CODE_FOR_fma_fmadd_v32hf_maskz_1 = 2892,
|
||
|
CODE_FOR_fma_fmadd_v32hf_maskz_1_round = 2894,
|
||
|
CODE_FOR_fma_fmadd_v16hf_maskz_1 = 2896,
|
||
|
CODE_FOR_fma_fmadd_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmadd_v8hf_maskz_1 = 2898,
|
||
|
CODE_FOR_fma_fmadd_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmadd_v16sf_maskz_1 = 2902,
|
||
|
CODE_FOR_fma_fmadd_v16sf_maskz_1_round = 2904,
|
||
|
CODE_FOR_fma_fmadd_v8sf_maskz_1 = 2906,
|
||
|
CODE_FOR_fma_fmadd_v8sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmadd_v4sf_maskz_1 = 2908,
|
||
|
CODE_FOR_fma_fmadd_v4sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmadd_v8df_maskz_1 = 2911,
|
||
|
CODE_FOR_fma_fmadd_v8df_maskz_1_round = 2913,
|
||
|
CODE_FOR_fma_fmadd_v4df_maskz_1 = 2915,
|
||
|
CODE_FOR_fma_fmadd_v4df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmadd_v2df_maskz_1 = 2917,
|
||
|
CODE_FOR_fma_fmadd_v2df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fmadd_v32hf_mask = 2918,
|
||
|
CODE_FOR_avx512bw_fmadd_v32hf_mask_round = 2919,
|
||
|
CODE_FOR_avx512vl_fmadd_v16hf_mask = 2920,
|
||
|
CODE_FOR_avx512vl_fmadd_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fmadd_v8hf_mask = 2921,
|
||
|
CODE_FOR_avx512fp16_fmadd_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fmadd_v16sf_mask = 2922,
|
||
|
CODE_FOR_avx512f_fmadd_v16sf_mask_round = 2923,
|
||
|
CODE_FOR_avx512vl_fmadd_v8sf_mask = 2924,
|
||
|
CODE_FOR_avx512vl_fmadd_v8sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fmadd_v4sf_mask = 2925,
|
||
|
CODE_FOR_avx512vl_fmadd_v4sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fmadd_v8df_mask = 2926,
|
||
|
CODE_FOR_avx512f_fmadd_v8df_mask_round = 2927,
|
||
|
CODE_FOR_avx512vl_fmadd_v4df_mask = 2928,
|
||
|
CODE_FOR_avx512vl_fmadd_v4df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fmadd_v2df_mask = 2929,
|
||
|
CODE_FOR_avx512vl_fmadd_v2df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fmadd_v32hf_mask3 = 2930,
|
||
|
CODE_FOR_avx512bw_fmadd_v32hf_mask3_round = 2931,
|
||
|
CODE_FOR_avx512vl_fmadd_v16hf_mask3 = 2932,
|
||
|
CODE_FOR_avx512vl_fmadd_v16hf_mask3_round = 2933,
|
||
|
CODE_FOR_avx512fp16_fmadd_v8hf_mask3 = 2934,
|
||
|
CODE_FOR_avx512fp16_fmadd_v8hf_mask3_round = 2935,
|
||
|
CODE_FOR_avx512f_fmadd_v16sf_mask3 = 2936,
|
||
|
CODE_FOR_avx512f_fmadd_v16sf_mask3_round = 2937,
|
||
|
CODE_FOR_avx512vl_fmadd_v8sf_mask3 = 2938,
|
||
|
CODE_FOR_avx512vl_fmadd_v8sf_mask3_round = 2939,
|
||
|
CODE_FOR_avx512vl_fmadd_v4sf_mask3 = 2940,
|
||
|
CODE_FOR_avx512vl_fmadd_v4sf_mask3_round = 2941,
|
||
|
CODE_FOR_avx512f_fmadd_v8df_mask3 = 2942,
|
||
|
CODE_FOR_avx512f_fmadd_v8df_mask3_round = 2943,
|
||
|
CODE_FOR_avx512vl_fmadd_v4df_mask3 = 2944,
|
||
|
CODE_FOR_avx512vl_fmadd_v4df_mask3_round = 2945,
|
||
|
CODE_FOR_avx512vl_fmadd_v2df_mask3 = 2946,
|
||
|
CODE_FOR_avx512vl_fmadd_v2df_mask3_round = 2947,
|
||
|
CODE_FOR_fma_fmsub_v32hf_maskz_1 = 2955,
|
||
|
CODE_FOR_fma_fmsub_v32hf_maskz_1_round = 2957,
|
||
|
CODE_FOR_fma_fmsub_v16hf_maskz_1 = 2959,
|
||
|
CODE_FOR_fma_fmsub_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsub_v8hf_maskz_1 = 2961,
|
||
|
CODE_FOR_fma_fmsub_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsub_v16sf_maskz_1 = 2965,
|
||
|
CODE_FOR_fma_fmsub_v16sf_maskz_1_round = 2967,
|
||
|
CODE_FOR_fma_fmsub_v8sf_maskz_1 = 2969,
|
||
|
CODE_FOR_fma_fmsub_v8sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsub_v4sf_maskz_1 = 2971,
|
||
|
CODE_FOR_fma_fmsub_v4sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsub_v8df_maskz_1 = 2974,
|
||
|
CODE_FOR_fma_fmsub_v8df_maskz_1_round = 2976,
|
||
|
CODE_FOR_fma_fmsub_v4df_maskz_1 = 2978,
|
||
|
CODE_FOR_fma_fmsub_v4df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsub_v2df_maskz_1 = 2980,
|
||
|
CODE_FOR_fma_fmsub_v2df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fmsub_v32hf_mask = 2981,
|
||
|
CODE_FOR_avx512bw_fmsub_v32hf_mask_round = 2982,
|
||
|
CODE_FOR_avx512vl_fmsub_v16hf_mask = 2983,
|
||
|
CODE_FOR_avx512vl_fmsub_v16hf_mask_round = 2984,
|
||
|
CODE_FOR_avx512fp16_fmsub_v8hf_mask = 2985,
|
||
|
CODE_FOR_avx512fp16_fmsub_v8hf_mask_round = 2986,
|
||
|
CODE_FOR_avx512f_fmsub_v16sf_mask = 2987,
|
||
|
CODE_FOR_avx512f_fmsub_v16sf_mask_round = 2988,
|
||
|
CODE_FOR_avx512vl_fmsub_v8sf_mask = 2989,
|
||
|
CODE_FOR_avx512vl_fmsub_v8sf_mask_round = 2990,
|
||
|
CODE_FOR_avx512vl_fmsub_v4sf_mask = 2991,
|
||
|
CODE_FOR_avx512vl_fmsub_v4sf_mask_round = 2992,
|
||
|
CODE_FOR_avx512f_fmsub_v8df_mask = 2993,
|
||
|
CODE_FOR_avx512f_fmsub_v8df_mask_round = 2994,
|
||
|
CODE_FOR_avx512vl_fmsub_v4df_mask = 2995,
|
||
|
CODE_FOR_avx512vl_fmsub_v4df_mask_round = 2996,
|
||
|
CODE_FOR_avx512vl_fmsub_v2df_mask = 2997,
|
||
|
CODE_FOR_avx512vl_fmsub_v2df_mask_round = 2998,
|
||
|
CODE_FOR_avx512bw_fmsub_v32hf_mask3 = 2999,
|
||
|
CODE_FOR_avx512bw_fmsub_v32hf_mask3_round = 3000,
|
||
|
CODE_FOR_avx512vl_fmsub_v16hf_mask3 = 3001,
|
||
|
CODE_FOR_avx512vl_fmsub_v16hf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fmsub_v8hf_mask3 = 3002,
|
||
|
CODE_FOR_avx512fp16_fmsub_v8hf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fmsub_v16sf_mask3 = 3003,
|
||
|
CODE_FOR_avx512f_fmsub_v16sf_mask3_round = 3004,
|
||
|
CODE_FOR_avx512vl_fmsub_v8sf_mask3 = 3005,
|
||
|
CODE_FOR_avx512vl_fmsub_v8sf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fmsub_v4sf_mask3 = 3006,
|
||
|
CODE_FOR_avx512vl_fmsub_v4sf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fmsub_v8df_mask3 = 3007,
|
||
|
CODE_FOR_avx512f_fmsub_v8df_mask3_round = 3008,
|
||
|
CODE_FOR_avx512vl_fmsub_v4df_mask3 = 3009,
|
||
|
CODE_FOR_avx512vl_fmsub_v4df_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fmsub_v2df_mask3 = 3010,
|
||
|
CODE_FOR_avx512vl_fmsub_v2df_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmadd_v32hf_maskz_1 = 3018,
|
||
|
CODE_FOR_fma_fnmadd_v32hf_maskz_1_round = 3020,
|
||
|
CODE_FOR_fma_fnmadd_v16hf_maskz_1 = 3022,
|
||
|
CODE_FOR_fma_fnmadd_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmadd_v8hf_maskz_1 = 3024,
|
||
|
CODE_FOR_fma_fnmadd_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmadd_v16sf_maskz_1 = 3028,
|
||
|
CODE_FOR_fma_fnmadd_v16sf_maskz_1_round = 3030,
|
||
|
CODE_FOR_fma_fnmadd_v8sf_maskz_1 = 3032,
|
||
|
CODE_FOR_fma_fnmadd_v8sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmadd_v4sf_maskz_1 = 3034,
|
||
|
CODE_FOR_fma_fnmadd_v4sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmadd_v8df_maskz_1 = 3037,
|
||
|
CODE_FOR_fma_fnmadd_v8df_maskz_1_round = 3039,
|
||
|
CODE_FOR_fma_fnmadd_v4df_maskz_1 = 3041,
|
||
|
CODE_FOR_fma_fnmadd_v4df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmadd_v2df_maskz_1 = 3043,
|
||
|
CODE_FOR_fma_fnmadd_v2df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fnmadd_v32hf_mask = 3044,
|
||
|
CODE_FOR_avx512bw_fnmadd_v32hf_mask_round = 3045,
|
||
|
CODE_FOR_avx512vl_fnmadd_v16hf_mask = 3046,
|
||
|
CODE_FOR_avx512vl_fnmadd_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fnmadd_v8hf_mask = 3047,
|
||
|
CODE_FOR_avx512fp16_fnmadd_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fnmadd_v16sf_mask = 3048,
|
||
|
CODE_FOR_avx512f_fnmadd_v16sf_mask_round = 3049,
|
||
|
CODE_FOR_avx512vl_fnmadd_v8sf_mask = 3050,
|
||
|
CODE_FOR_avx512vl_fnmadd_v8sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4sf_mask = 3051,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fnmadd_v8df_mask = 3052,
|
||
|
CODE_FOR_avx512f_fnmadd_v8df_mask_round = 3053,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4df_mask = 3054,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fnmadd_v2df_mask = 3055,
|
||
|
CODE_FOR_avx512vl_fnmadd_v2df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fnmadd_v32hf_mask3 = 3056,
|
||
|
CODE_FOR_avx512bw_fnmadd_v32hf_mask3_round = 3057,
|
||
|
CODE_FOR_avx512vl_fnmadd_v16hf_mask3 = 3058,
|
||
|
CODE_FOR_avx512vl_fnmadd_v16hf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fnmadd_v8hf_mask3 = 3059,
|
||
|
CODE_FOR_avx512fp16_fnmadd_v8hf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fnmadd_v16sf_mask3 = 3060,
|
||
|
CODE_FOR_avx512f_fnmadd_v16sf_mask3_round = 3061,
|
||
|
CODE_FOR_avx512vl_fnmadd_v8sf_mask3 = 3062,
|
||
|
CODE_FOR_avx512vl_fnmadd_v8sf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4sf_mask3 = 3063,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4sf_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fnmadd_v8df_mask3 = 3064,
|
||
|
CODE_FOR_avx512f_fnmadd_v8df_mask3_round = 3065,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4df_mask3 = 3066,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4df_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fnmadd_v2df_mask3 = 3067,
|
||
|
CODE_FOR_avx512vl_fnmadd_v2df_mask3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmsub_v32hf_maskz_1 = 3089,
|
||
|
CODE_FOR_fma_fnmsub_v32hf_maskz_1_round = 3091,
|
||
|
CODE_FOR_fma_fnmsub_v16hf_maskz_1 = 3093,
|
||
|
CODE_FOR_fma_fnmsub_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmsub_v8hf_maskz_1 = 3095,
|
||
|
CODE_FOR_fma_fnmsub_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmsub_v16sf_maskz_1 = 3099,
|
||
|
CODE_FOR_fma_fnmsub_v16sf_maskz_1_round = 3101,
|
||
|
CODE_FOR_fma_fnmsub_v8sf_maskz_1 = 3103,
|
||
|
CODE_FOR_fma_fnmsub_v8sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmsub_v4sf_maskz_1 = 3105,
|
||
|
CODE_FOR_fma_fnmsub_v4sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmsub_v8df_maskz_1 = 3108,
|
||
|
CODE_FOR_fma_fnmsub_v8df_maskz_1_round = 3110,
|
||
|
CODE_FOR_fma_fnmsub_v4df_maskz_1 = 3112,
|
||
|
CODE_FOR_fma_fnmsub_v4df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fnmsub_v2df_maskz_1 = 3114,
|
||
|
CODE_FOR_fma_fnmsub_v2df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fnmsub_v32hf_mask = 3115,
|
||
|
CODE_FOR_avx512bw_fnmsub_v32hf_mask_round = 3116,
|
||
|
CODE_FOR_avx512vl_fnmsub_v16hf_mask = 3117,
|
||
|
CODE_FOR_avx512vl_fnmsub_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fnmsub_v8hf_mask = 3118,
|
||
|
CODE_FOR_avx512fp16_fnmsub_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fnmsub_v16sf_mask = 3119,
|
||
|
CODE_FOR_avx512f_fnmsub_v16sf_mask_round = 3120,
|
||
|
CODE_FOR_avx512vl_fnmsub_v8sf_mask = 3121,
|
||
|
CODE_FOR_avx512vl_fnmsub_v8sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4sf_mask = 3122,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512f_fnmsub_v8df_mask = 3123,
|
||
|
CODE_FOR_avx512f_fnmsub_v8df_mask_round = 3124,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4df_mask = 3125,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fnmsub_v2df_mask = 3126,
|
||
|
CODE_FOR_avx512vl_fnmsub_v2df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fnmsub_v32hf_mask3 = 3127,
|
||
|
CODE_FOR_avx512bw_fnmsub_v32hf_mask3_round = 3128,
|
||
|
CODE_FOR_avx512vl_fnmsub_v16hf_mask3 = 3129,
|
||
|
CODE_FOR_avx512vl_fnmsub_v16hf_mask3_round = 3130,
|
||
|
CODE_FOR_avx512fp16_fnmsub_v8hf_mask3 = 3131,
|
||
|
CODE_FOR_avx512fp16_fnmsub_v8hf_mask3_round = 3132,
|
||
|
CODE_FOR_avx512f_fnmsub_v16sf_mask3 = 3133,
|
||
|
CODE_FOR_avx512f_fnmsub_v16sf_mask3_round = 3134,
|
||
|
CODE_FOR_avx512vl_fnmsub_v8sf_mask3 = 3135,
|
||
|
CODE_FOR_avx512vl_fnmsub_v8sf_mask3_round = 3136,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4sf_mask3 = 3137,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4sf_mask3_round = 3138,
|
||
|
CODE_FOR_avx512f_fnmsub_v8df_mask3 = 3139,
|
||
|
CODE_FOR_avx512f_fnmsub_v8df_mask3_round = 3140,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4df_mask3 = 3141,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4df_mask3_round = 3142,
|
||
|
CODE_FOR_avx512vl_fnmsub_v2df_mask3 = 3143,
|
||
|
CODE_FOR_avx512vl_fnmsub_v2df_mask3_round = 3144,
|
||
|
CODE_FOR_fma_fmaddsub_v32hf_maskz_1 = 3150,
|
||
|
CODE_FOR_fma_fmaddsub_v32hf_maskz_1_round = 3152,
|
||
|
CODE_FOR_fma_fmaddsub_v16hf_maskz_1 = 3154,
|
||
|
CODE_FOR_fma_fmaddsub_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddsub_v8hf_maskz_1 = 3156,
|
||
|
CODE_FOR_fma_fmaddsub_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddsub_v16sf_maskz_1 = 3160,
|
||
|
CODE_FOR_fma_fmaddsub_v16sf_maskz_1_round = 3162,
|
||
|
CODE_FOR_fma_fmaddsub_v8sf_maskz_1 = 3164,
|
||
|
CODE_FOR_fma_fmaddsub_v8sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddsub_v4sf_maskz_1 = 3166,
|
||
|
CODE_FOR_fma_fmaddsub_v4sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddsub_v8df_maskz_1 = 3169,
|
||
|
CODE_FOR_fma_fmaddsub_v8df_maskz_1_round = 3171,
|
||
|
CODE_FOR_fma_fmaddsub_v4df_maskz_1 = 3173,
|
||
|
CODE_FOR_fma_fmaddsub_v4df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddsub_v2df_maskz_1 = 3175,
|
||
|
CODE_FOR_fma_fmaddsub_v2df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fmaddsub_v32hf_mask = 3176,
|
||
|
CODE_FOR_avx512bw_fmaddsub_v32hf_mask_round = 3177,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v16hf_mask = 3178,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v16hf_mask_round = 3179,
|
||
|
CODE_FOR_avx512fp16_fmaddsub_v8hf_mask = 3180,
|
||
|
CODE_FOR_avx512fp16_fmaddsub_v8hf_mask_round = 3181,
|
||
|
CODE_FOR_avx512f_fmaddsub_v16sf_mask = 3182,
|
||
|
CODE_FOR_avx512f_fmaddsub_v16sf_mask_round = 3183,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v8sf_mask = 3184,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v8sf_mask_round = 3185,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4sf_mask = 3186,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4sf_mask_round = 3187,
|
||
|
CODE_FOR_avx512f_fmaddsub_v8df_mask = 3188,
|
||
|
CODE_FOR_avx512f_fmaddsub_v8df_mask_round = 3189,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4df_mask = 3190,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4df_mask_round = 3191,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v2df_mask = 3192,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v2df_mask_round = 3193,
|
||
|
CODE_FOR_avx512bw_fmaddsub_v32hf_mask3 = 3194,
|
||
|
CODE_FOR_avx512bw_fmaddsub_v32hf_mask3_round = 3195,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v16hf_mask3 = 3196,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v16hf_mask3_round = 3197,
|
||
|
CODE_FOR_avx512fp16_fmaddsub_v8hf_mask3 = 3198,
|
||
|
CODE_FOR_avx512fp16_fmaddsub_v8hf_mask3_round = 3199,
|
||
|
CODE_FOR_avx512f_fmaddsub_v16sf_mask3 = 3200,
|
||
|
CODE_FOR_avx512f_fmaddsub_v16sf_mask3_round = 3201,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v8sf_mask3 = 3202,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v8sf_mask3_round = 3203,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4sf_mask3 = 3204,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4sf_mask3_round = 3205,
|
||
|
CODE_FOR_avx512f_fmaddsub_v8df_mask3 = 3206,
|
||
|
CODE_FOR_avx512f_fmaddsub_v8df_mask3_round = 3207,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4df_mask3 = 3208,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4df_mask3_round = 3209,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v2df_mask3 = 3210,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v2df_mask3_round = 3211,
|
||
|
CODE_FOR_fma_fmsubadd_v32hf_maskz_1 = 3217,
|
||
|
CODE_FOR_fma_fmsubadd_v32hf_maskz_1_round = 3219,
|
||
|
CODE_FOR_fma_fmsubadd_v16hf_maskz_1 = 3221,
|
||
|
CODE_FOR_fma_fmsubadd_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsubadd_v8hf_maskz_1 = 3223,
|
||
|
CODE_FOR_fma_fmsubadd_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsubadd_v16sf_maskz_1 = 3227,
|
||
|
CODE_FOR_fma_fmsubadd_v16sf_maskz_1_round = 3229,
|
||
|
CODE_FOR_fma_fmsubadd_v8sf_maskz_1 = 3231,
|
||
|
CODE_FOR_fma_fmsubadd_v8sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsubadd_v4sf_maskz_1 = 3233,
|
||
|
CODE_FOR_fma_fmsubadd_v4sf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsubadd_v8df_maskz_1 = 3236,
|
||
|
CODE_FOR_fma_fmsubadd_v8df_maskz_1_round = 3238,
|
||
|
CODE_FOR_fma_fmsubadd_v4df_maskz_1 = 3240,
|
||
|
CODE_FOR_fma_fmsubadd_v4df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmsubadd_v2df_maskz_1 = 3242,
|
||
|
CODE_FOR_fma_fmsubadd_v2df_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fmsubadd_v32hf_mask = 3243,
|
||
|
CODE_FOR_avx512bw_fmsubadd_v32hf_mask_round = 3244,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v16hf_mask = 3245,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v16hf_mask_round = 3246,
|
||
|
CODE_FOR_avx512fp16_fmsubadd_v8hf_mask = 3247,
|
||
|
CODE_FOR_avx512fp16_fmsubadd_v8hf_mask_round = 3248,
|
||
|
CODE_FOR_avx512f_fmsubadd_v16sf_mask = 3249,
|
||
|
CODE_FOR_avx512f_fmsubadd_v16sf_mask_round = 3250,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v8sf_mask = 3251,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v8sf_mask_round = 3252,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4sf_mask = 3253,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4sf_mask_round = 3254,
|
||
|
CODE_FOR_avx512f_fmsubadd_v8df_mask = 3255,
|
||
|
CODE_FOR_avx512f_fmsubadd_v8df_mask_round = 3256,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4df_mask = 3257,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4df_mask_round = 3258,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v2df_mask = 3259,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v2df_mask_round = 3260,
|
||
|
CODE_FOR_avx512bw_fmsubadd_v32hf_mask3 = 3261,
|
||
|
CODE_FOR_avx512bw_fmsubadd_v32hf_mask3_round = 3262,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v16hf_mask3 = 3263,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v16hf_mask3_round = 3264,
|
||
|
CODE_FOR_avx512fp16_fmsubadd_v8hf_mask3 = 3265,
|
||
|
CODE_FOR_avx512fp16_fmsubadd_v8hf_mask3_round = 3266,
|
||
|
CODE_FOR_avx512f_fmsubadd_v16sf_mask3 = 3267,
|
||
|
CODE_FOR_avx512f_fmsubadd_v16sf_mask3_round = 3268,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v8sf_mask3 = 3269,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v8sf_mask3_round = 3270,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4sf_mask3 = 3271,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4sf_mask3_round = 3272,
|
||
|
CODE_FOR_avx512f_fmsubadd_v8df_mask3 = 3273,
|
||
|
CODE_FOR_avx512f_fmsubadd_v8df_mask3_round = 3274,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4df_mask3 = 3275,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4df_mask3_round = 3276,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v2df_mask3 = 3277,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v2df_mask3_round = 3278,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_mask = 3303,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_mask_round = 3304,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_mask = 3305,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_mask_round = 3306,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_mask = 3307,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_mask_round = 3308,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_mask3 = 3309,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_mask3_round = 3310,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_mask3 = 3311,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_mask3_round = 3312,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_mask3 = 3313,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_mask3_round = 3314,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_maskz_1 = 3315,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_maskz_1_round = 3316,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_maskz_1 = 3317,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_maskz_1_round = 3318,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_maskz_1 = 3319,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_maskz_1_round = 3320,
|
||
|
CODE_FOR_avx512f_vmfmsub_v8hf_mask3 = 3327,
|
||
|
CODE_FOR_avx512f_vmfmsub_v8hf_mask3_round = 3328,
|
||
|
CODE_FOR_avx512f_vmfmsub_v4sf_mask3 = 3329,
|
||
|
CODE_FOR_avx512f_vmfmsub_v4sf_mask3_round = 3330,
|
||
|
CODE_FOR_avx512f_vmfmsub_v2df_mask3 = 3331,
|
||
|
CODE_FOR_avx512f_vmfmsub_v2df_mask3_round = 3332,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_mask = 3339,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_mask_round = 3340,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_mask = 3341,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_mask_round = 3342,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_mask = 3343,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_mask_round = 3344,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_mask3 = 3345,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_mask3_round = 3346,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_mask3 = 3347,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_mask3_round = 3348,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_mask3 = 3349,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_mask3_round = 3350,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_maskz_1 = 3351,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_maskz_1_round = 3352,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_maskz_1 = 3353,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_maskz_1_round = 3354,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_maskz_1 = 3355,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_maskz_1_round = 3356,
|
||
|
CODE_FOR_fma_fmaddc_v32hf = 3383,
|
||
|
CODE_FOR_fma_fmaddc_v32hf_round = 3384,
|
||
|
CODE_FOR_fma_fmaddc_v32hf_maskz_1 = 3385,
|
||
|
CODE_FOR_fma_fmaddc_v32hf_maskz_1_round = 3386,
|
||
|
CODE_FOR_fma_fcmaddc_v32hf = 3387,
|
||
|
CODE_FOR_fma_fcmaddc_v32hf_round = 3388,
|
||
|
CODE_FOR_fma_fcmaddc_v32hf_maskz_1 = 3389,
|
||
|
CODE_FOR_fma_fcmaddc_v32hf_maskz_1_round = 3390,
|
||
|
CODE_FOR_fma_fmaddc_v16hf = 3391,
|
||
|
CODE_FOR_fma_fmaddc_v16hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddc_v16hf_maskz_1 = 3392,
|
||
|
CODE_FOR_fma_fmaddc_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fcmaddc_v16hf = 3393,
|
||
|
CODE_FOR_fma_fcmaddc_v16hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fcmaddc_v16hf_maskz_1 = 3394,
|
||
|
CODE_FOR_fma_fcmaddc_v16hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddc_v8hf = 3395,
|
||
|
CODE_FOR_fma_fmaddc_v8hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fmaddc_v8hf_maskz_1 = 3396,
|
||
|
CODE_FOR_fma_fmaddc_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fcmaddc_v8hf = 3397,
|
||
|
CODE_FOR_fma_fcmaddc_v8hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_fcmaddc_v8hf_maskz_1 = 3398,
|
||
|
CODE_FOR_fma_fcmaddc_v8hf_maskz_1_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fma_v32hf_fadd_fmul = 3399,
|
||
|
CODE_FOR_fma_v16hf_fadd_fmul = 3400,
|
||
|
CODE_FOR_fma_v8hf_fadd_fmul = 3401,
|
||
|
CODE_FOR_fma_v32hf_fadd_fcmul = 3402,
|
||
|
CODE_FOR_fma_v16hf_fadd_fcmul = 3403,
|
||
|
CODE_FOR_fma_v8hf_fadd_fcmul = 3404,
|
||
|
CODE_FOR_fma_fmaddc_v32hf_fma_zero = 3405,
|
||
|
CODE_FOR_fma_fcmaddc_v32hf_fma_zero = 3406,
|
||
|
CODE_FOR_fma_fmaddc_v16hf_fma_zero = 3407,
|
||
|
CODE_FOR_fma_fcmaddc_v16hf_fma_zero = 3408,
|
||
|
CODE_FOR_fma_fmaddc_v8hf_fma_zero = 3409,
|
||
|
CODE_FOR_fma_fcmaddc_v8hf_fma_zero = 3410,
|
||
|
CODE_FOR_fma_fmaddc_v16sf_pair = 3411,
|
||
|
CODE_FOR_fma_fcmaddc_v16sf_pair = 3412,
|
||
|
CODE_FOR_fma_fmaddc_v8sf_pair = 3413,
|
||
|
CODE_FOR_fma_fcmaddc_v8sf_pair = 3414,
|
||
|
CODE_FOR_fma_fmaddc_v4sf_pair = 3415,
|
||
|
CODE_FOR_fma_fcmaddc_v4sf_pair = 3416,
|
||
|
CODE_FOR_fma_v32hf_fmaddc_bcst = 3417,
|
||
|
CODE_FOR_fma_v16hf_fmaddc_bcst = 3418,
|
||
|
CODE_FOR_fma_v8hf_fmaddc_bcst = 3419,
|
||
|
CODE_FOR_fma_v32hf_fcmaddc_bcst = 3420,
|
||
|
CODE_FOR_fma_v16hf_fcmaddc_bcst = 3421,
|
||
|
CODE_FOR_fma_v8hf_fcmaddc_bcst = 3422,
|
||
|
CODE_FOR_avx512bw_fmaddc_v32hf_mask = 3423,
|
||
|
CODE_FOR_avx512bw_fmaddc_v32hf_mask_round = 3424,
|
||
|
CODE_FOR_avx512bw_fcmaddc_v32hf_mask = 3425,
|
||
|
CODE_FOR_avx512bw_fcmaddc_v32hf_mask_round = 3426,
|
||
|
CODE_FOR_avx512vl_fmaddc_v16hf_mask = 3427,
|
||
|
CODE_FOR_avx512vl_fmaddc_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fcmaddc_v16hf_mask = 3428,
|
||
|
CODE_FOR_avx512vl_fcmaddc_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fmaddc_v8hf_mask = 3429,
|
||
|
CODE_FOR_avx512fp16_fmaddc_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fcmaddc_v8hf_mask = 3430,
|
||
|
CODE_FOR_avx512fp16_fcmaddc_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512bw_fmulc_v32hf = 3431,
|
||
|
CODE_FOR_avx512bw_fmulc_v32hf_mask = 3432,
|
||
|
CODE_FOR_avx512bw_fmulc_v32hf_round = 3433,
|
||
|
CODE_FOR_avx512bw_fmulc_v32hf_mask_round = 3434,
|
||
|
CODE_FOR_avx512bw_fcmulc_v32hf = 3435,
|
||
|
CODE_FOR_avx512bw_fcmulc_v32hf_mask = 3436,
|
||
|
CODE_FOR_avx512bw_fcmulc_v32hf_round = 3437,
|
||
|
CODE_FOR_avx512bw_fcmulc_v32hf_mask_round = 3438,
|
||
|
CODE_FOR_avx512vl_fmulc_v16hf = 3439,
|
||
|
CODE_FOR_avx512vl_fmulc_v16hf_mask = 3440,
|
||
|
CODE_FOR_avx512vl_fmulc_v16hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fmulc_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fcmulc_v16hf = 3441,
|
||
|
CODE_FOR_avx512vl_fcmulc_v16hf_mask = 3442,
|
||
|
CODE_FOR_avx512vl_fcmulc_v16hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512vl_fcmulc_v16hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fmulc_v8hf = 3443,
|
||
|
CODE_FOR_avx512fp16_fmulc_v8hf_mask = 3444,
|
||
|
CODE_FOR_avx512fp16_fmulc_v8hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fmulc_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fcmulc_v8hf = 3445,
|
||
|
CODE_FOR_avx512fp16_fcmulc_v8hf_mask = 3446,
|
||
|
CODE_FOR_avx512fp16_fcmulc_v8hf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fcmulc_v8hf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512fp16_fma_fmaddcsh_v8hf = 3447,
|
||
|
CODE_FOR_avx512fp16_fma_fmaddcsh_v8hf_maskz = 3448,
|
||
|
CODE_FOR_avx512fp16_fma_fmaddcsh_v8hf_round = 3449,
|
||
|
CODE_FOR_avx512fp16_fma_fmaddcsh_v8hf_maskz_round = 3450,
|
||
|
CODE_FOR_avx512fp16_fma_fcmaddcsh_v8hf = 3451,
|
||
|
CODE_FOR_avx512fp16_fma_fcmaddcsh_v8hf_maskz = 3452,
|
||
|
CODE_FOR_avx512fp16_fma_fcmaddcsh_v8hf_round = 3453,
|
||
|
CODE_FOR_avx512fp16_fma_fcmaddcsh_v8hf_maskz_round = 3454,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_mask = 3455,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_mask_round = 3456,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_mask = 3457,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_mask_round = 3458,
|
||
|
CODE_FOR_avx512fp16_fmulcsh_v8hf = 3459,
|
||
|
CODE_FOR_avx512fp16_fmulcsh_v8hf_round = 3460,
|
||
|
CODE_FOR_avx512fp16_fmulcsh_v8hf_mask = 3461,
|
||
|
CODE_FOR_avx512fp16_fmulcsh_v8hf_mask_round = 3462,
|
||
|
CODE_FOR_avx512fp16_fcmulcsh_v8hf = 3463,
|
||
|
CODE_FOR_avx512fp16_fcmulcsh_v8hf_round = 3464,
|
||
|
CODE_FOR_avx512fp16_fcmulcsh_v8hf_mask = 3465,
|
||
|
CODE_FOR_avx512fp16_fcmulcsh_v8hf_mask_round = 3466,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v32hi = 3467,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v32hi_round = 3468,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v32hi_mask = 3469,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v32hi_mask_round = 3470,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v32hi = 3471,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v32hi_round = 3472,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v32hi_mask = 3473,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v32hi_mask_round = 3474,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v16si = 3475,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v16si_round = 3476,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v16si_mask = 3477,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v16si_mask_round = 3478,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v16si = 3479,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v16si_round = 3480,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v16si_mask = 3481,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v16si_mask_round = 3482,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v8di = 3483,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v8di_round = 3484,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v8di_mask = 3485,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v8di_mask_round = 3486,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v8di = 3487,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v8di_round = 3488,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v8di_mask = 3489,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v8di_mask_round = 3490,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v16hi = 3491,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v16hi_round = 3492,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v16hi_mask = 3493,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v16hi_mask_round = 3494,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v16hi = 3495,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v16hi_round = 3496,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v16hi_mask = 3497,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v16hi_mask_round = 3498,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v8si = 3499,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v8si_round = 3500,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v8si_mask = 3501,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v8si_mask_round = 3502,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v8si = 3503,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v8si_round = 3504,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v8si_mask = 3505,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v8si_mask_round = 3506,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v4di = 3507,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v4di_round = 3508,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v4di_mask = 3509,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v4di_mask_round = 3510,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v4di = 3511,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v4di_round = 3512,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v4di_mask = 3513,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v4di_mask_round = 3514,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v8hi = 3515,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v8hi_round = 3516,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v8hi_mask = 3517,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uw_v8hi_mask_round = 3518,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v8hi = 3519,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v8hi_round = 3520,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v8hi_mask = 3521,
|
||
|
CODE_FOR_avx512fp16_vcvtph2w_v8hi_mask_round = 3522,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v4si = 3523,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v4si_round = 3524,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v4si_mask = 3525,
|
||
|
CODE_FOR_avx512fp16_vcvtph2udq_v4si_mask_round = 3526,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v4si = 3527,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v4si_round = 3528,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v4si_mask = 3529,
|
||
|
CODE_FOR_avx512fp16_vcvtph2dq_v4si_mask_round = 3530,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v2di = 3531,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v2di_round = 3532,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v2di_mask = 3533,
|
||
|
CODE_FOR_avx512fp16_vcvtph2uqq_v2di_mask_round = 3534,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v2di = 3535,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v2di_round = 3536,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v2di_mask = 3537,
|
||
|
CODE_FOR_avx512fp16_vcvtph2qq_v2di_mask_round = 3538,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v8hi = 3539,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v8hi_round = 3540,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v8hi_mask = 3541,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v8hi_mask_round = 3542,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v8hi = 3543,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v8hi_round = 3544,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v8hi_mask = 3545,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v8hi_mask_round = 3546,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v16hi = 3547,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v16hi_round = 3548,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v16hi_mask = 3549,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v16hi_mask_round = 3550,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v16hi = 3551,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v16hi_round = 3552,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v16hi_mask = 3553,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v16hi_mask_round = 3554,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v32hi = 3555,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v32hi_round = 3556,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v32hi_mask = 3557,
|
||
|
CODE_FOR_avx512fp16_vcvtw2ph_v32hi_mask_round = 3558,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v32hi = 3559,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v32hi_round = 3560,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v32hi_mask = 3561,
|
||
|
CODE_FOR_avx512fp16_vcvtuw2ph_v32hi_mask_round = 3562,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v8si = 3563,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v8si_round = 3564,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v8si_mask = 3565,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v8si_mask_round = 3566,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v8si = 3567,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v8si_round = 3568,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v8si_mask = 3569,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v8si_mask_round = 3570,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v16si = 3571,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v16si_round = 3572,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v16si_mask = 3573,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v16si_mask_round = 3574,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v16si = 3575,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v16si_round = 3576,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v16si_mask = 3577,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v16si_mask_round = 3578,
|
||
|
CODE_FOR_avx512fp16_vcvtqq2ph_v8di = 3579,
|
||
|
CODE_FOR_avx512fp16_vcvtqq2ph_v8di_round = 3580,
|
||
|
CODE_FOR_avx512fp16_vcvtqq2ph_v8di_mask = 3581,
|
||
|
CODE_FOR_avx512fp16_vcvtqq2ph_v8di_mask_round = 3582,
|
||
|
CODE_FOR_avx512fp16_vcvtuqq2ph_v8di = 3583,
|
||
|
CODE_FOR_avx512fp16_vcvtuqq2ph_v8di_round = 3584,
|
||
|
CODE_FOR_avx512fp16_vcvtuqq2ph_v8di_mask = 3585,
|
||
|
CODE_FOR_avx512fp16_vcvtuqq2ph_v8di_mask_round = 3586,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2usi = 3605,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2usi_round = 3606,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2si = 3607,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2si_round = 3608,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2usiq = 3609,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2usiq_round = 3610,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2siq = 3611,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2siq_round = 3612,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2usi_2 = 3613,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2si_2 = 3614,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2usiq_2 = 3615,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2siq_2 = 3616,
|
||
|
CODE_FOR_avx512fp16_vcvtsi2sh = 3617,
|
||
|
CODE_FOR_avx512fp16_vcvtsi2sh_round = 3618,
|
||
|
CODE_FOR_avx512fp16_vcvtusi2sh = 3619,
|
||
|
CODE_FOR_avx512fp16_vcvtusi2sh_round = 3620,
|
||
|
CODE_FOR_avx512fp16_vcvtsi2shq = 3621,
|
||
|
CODE_FOR_avx512fp16_vcvtsi2shq_round = 3622,
|
||
|
CODE_FOR_avx512fp16_vcvtusi2shq = 3623,
|
||
|
CODE_FOR_avx512fp16_vcvtusi2shq_round = 3624,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8hi2 = 3625,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8hi2_round = 3626,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8hi2_mask = 3627,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8hi2_mask_round = 3628,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8hi2 = 3629,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8hi2_round = 3630,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8hi2_mask = 3631,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8hi2_mask_round = 3632,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16hi2 = 3633,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16hi2_round = 3634,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16hi2_mask = 3635,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16hi2_mask_round = 3636,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16hi2 = 3637,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16hi2_round = 3638,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16hi2_mask = 3639,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16hi2_mask_round = 3640,
|
||
|
CODE_FOR_avx512fp16_fix_truncv32hi2 = 3641,
|
||
|
CODE_FOR_avx512fp16_fix_truncv32hi2_round = 3642,
|
||
|
CODE_FOR_avx512fp16_fix_truncv32hi2_mask = 3643,
|
||
|
CODE_FOR_avx512fp16_fix_truncv32hi2_mask_round = 3644,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv32hi2 = 3645,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv32hi2_round = 3646,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv32hi2_mask = 3647,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv32hi2_mask_round = 3648,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8si2 = 3649,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8si2_round = 3650,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8si2_mask = 3651,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8si2_mask_round = 3652,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8si2 = 3653,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8si2_round = 3654,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8si2_mask = 3655,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8si2_mask_round = 3656,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16si2 = 3657,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16si2_round = 3658,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16si2_mask = 3659,
|
||
|
CODE_FOR_avx512fp16_fix_truncv16si2_mask_round = 3660,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16si2 = 3661,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16si2_round = 3662,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16si2_mask = 3663,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv16si2_mask_round = 3664,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8di2 = 3665,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8di2_round = 3666,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8di2_mask = 3667,
|
||
|
CODE_FOR_avx512fp16_fix_truncv8di2_mask_round = 3668,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8di2 = 3669,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8di2_round = 3670,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8di2_mask = 3671,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv8di2_mask_round = 3672,
|
||
|
CODE_FOR_avx512fp16_fix_truncv4si2 = 3673,
|
||
|
CODE_FOR_avx512fp16_fix_truncv4si2_mask = 3674,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv4si2 = 3675,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv4si2_mask = 3676,
|
||
|
CODE_FOR_avx512fp16_fix_truncv4di2 = 3677,
|
||
|
CODE_FOR_avx512fp16_fix_truncv4di2_mask = 3678,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv4di2 = 3679,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv4di2_mask = 3680,
|
||
|
CODE_FOR_avx512fp16_fix_truncv2di2 = 3689,
|
||
|
CODE_FOR_avx512fp16_fix_truncv2di2_mask = 3690,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv2di2 = 3691,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncv2di2_mask = 3692,
|
||
|
CODE_FOR_avx512fp16_fix_truncsi2 = 3697,
|
||
|
CODE_FOR_avx512fp16_fix_truncsi2_round = 3698,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncsi2 = 3699,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncsi2_round = 3700,
|
||
|
CODE_FOR_avx512fp16_fix_truncdi2 = 3701,
|
||
|
CODE_FOR_avx512fp16_fix_truncdi2_round = 3702,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncdi2 = 3703,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncdi2_round = 3704,
|
||
|
CODE_FOR_avx512fp16_fix_truncsi2_mem = 3705,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncsi2_mem = 3706,
|
||
|
CODE_FOR_avx512fp16_fix_truncdi2_mem = 3707,
|
||
|
CODE_FOR_avx512fp16_fixuns_truncdi2_mem = 3708,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8df2 = 3709,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8df2_round = 3710,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8df2_mask = 3711,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8df2_mask_round = 3712,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv16sf2 = 3713,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv16sf2_round = 3714,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv16sf2_mask = 3715,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv16sf2_mask_round = 3716,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8sf2 = 3717,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8sf2_round = 3718,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8sf2_mask = 3719,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv8sf2_mask_round = 3720,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv4df2 = 3721,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv4df2_mask = 3722,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv4sf2 = 3723,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv4sf2_mask = 3724,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv2df2 = 3729,
|
||
|
CODE_FOR_avx512fp16_float_extend_phv2df2_mask = 3730,
|
||
|
CODE_FOR_avx512fp16_vcvtpd2ph_v8df = 3733,
|
||
|
CODE_FOR_avx512fp16_vcvtpd2ph_v8df_round = 3734,
|
||
|
CODE_FOR_avx512fp16_vcvtpd2ph_v8df_mask = 3735,
|
||
|
CODE_FOR_avx512fp16_vcvtpd2ph_v8df_mask_round = 3736,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v16sf = 3737,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v16sf_round = 3738,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v16sf_mask = 3739,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v16sf_mask_round = 3740,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v8sf = 3741,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v8sf_round = 3742,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v8sf_mask = 3743,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v8sf_mask_round = 3744,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2sd = 3754,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2sd_mask = 3755,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2sd_round = 3756,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2sd_mask_round = 3757,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2ss = 3758,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2ss_mask = 3759,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2ss_round = 3760,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2ss_mask_round = 3761,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2sd_mem = 3762,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2sd_mask_mem = 3763,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2ss_mem = 3764,
|
||
|
CODE_FOR_avx512fp16_vcvtsh2ss_mask_mem = 3765,
|
||
|
CODE_FOR_avx512fp16_vcvtsd2sh = 3766,
|
||
|
CODE_FOR_avx512fp16_vcvtsd2sh_round = 3767,
|
||
|
CODE_FOR_avx512fp16_vcvtsd2sh_mask = 3768,
|
||
|
CODE_FOR_avx512fp16_vcvtsd2sh_mask_round = 3769,
|
||
|
CODE_FOR_avx512fp16_vcvtss2sh = 3770,
|
||
|
CODE_FOR_avx512fp16_vcvtss2sh_round = 3771,
|
||
|
CODE_FOR_avx512fp16_vcvtss2sh_mask = 3772,
|
||
|
CODE_FOR_avx512fp16_vcvtss2sh_mask_round = 3773,
|
||
|
CODE_FOR_avx512fp16_vcvtss2sh_mem = 3774,
|
||
|
CODE_FOR_avx512fp16_vcvtss2sh_mask_mem = 3775,
|
||
|
CODE_FOR_avx512fp16_vcvtsd2sh_mem = 3776,
|
||
|
CODE_FOR_avx512fp16_vcvtsd2sh_mask_mem = 3777,
|
||
|
CODE_FOR_sse_cvtpi2ps = 3778,
|
||
|
CODE_FOR_sse_cvtps2pi = 3779,
|
||
|
CODE_FOR_sse_cvttps2pi = 3780,
|
||
|
CODE_FOR_sse_cvtsi2ss = 3781,
|
||
|
CODE_FOR_sse_cvtsi2ss_round = 3782,
|
||
|
CODE_FOR_sse_cvtsi2ssq = 3783,
|
||
|
CODE_FOR_sse_cvtsi2ssq_round = 3784,
|
||
|
CODE_FOR_sse_cvtss2si = 3785,
|
||
|
CODE_FOR_sse_cvtss2si_round = 3786,
|
||
|
CODE_FOR_sse_cvtss2siq = 3787,
|
||
|
CODE_FOR_sse_cvtss2siq_round = 3788,
|
||
|
CODE_FOR_sse_cvtss2si_2 = 3789,
|
||
|
CODE_FOR_sse_cvtss2siq_2 = 3790,
|
||
|
CODE_FOR_sse_cvttss2si = 3791,
|
||
|
CODE_FOR_sse_cvttss2si_round = 3792,
|
||
|
CODE_FOR_sse_cvttss2siq = 3793,
|
||
|
CODE_FOR_sse_cvttss2siq_round = 3794,
|
||
|
CODE_FOR_cvtusi2ss32 = 3795,
|
||
|
CODE_FOR_cvtusi2ss32_round = 3796,
|
||
|
CODE_FOR_cvtusi2sd32 = 3797,
|
||
|
CODE_FOR_cvtusi2sd32_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_cvtusi2ss64 = 3798,
|
||
|
CODE_FOR_cvtusi2ss64_round = 3799,
|
||
|
CODE_FOR_cvtusi2sd64 = 3800,
|
||
|
CODE_FOR_cvtusi2sd64_round = 3801,
|
||
|
CODE_FOR_floatv16siv16sf2 = 3802,
|
||
|
CODE_FOR_floatv16siv16sf2_round = 3803,
|
||
|
CODE_FOR_floatv16siv16sf2_mask = 3804,
|
||
|
CODE_FOR_floatv16siv16sf2_mask_round = 3805,
|
||
|
CODE_FOR_floatv8siv8sf2 = 3806,
|
||
|
CODE_FOR_floatv8siv8sf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_floatv8siv8sf2_mask = 3807,
|
||
|
CODE_FOR_floatv8siv8sf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_floatv4siv4sf2 = 3808,
|
||
|
CODE_FOR_floatv4siv4sf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_floatv4siv4sf2_mask = 3809,
|
||
|
CODE_FOR_floatv4siv4sf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ufloatv16siv16sf2 = 3810,
|
||
|
CODE_FOR_ufloatv16siv16sf2_round = 3811,
|
||
|
CODE_FOR_ufloatv16siv16sf2_mask = 3812,
|
||
|
CODE_FOR_ufloatv16siv16sf2_mask_round = 3813,
|
||
|
CODE_FOR_ufloatv8siv8sf2 = 3814,
|
||
|
CODE_FOR_ufloatv8siv8sf2_round = 3815,
|
||
|
CODE_FOR_ufloatv8siv8sf2_mask = 3816,
|
||
|
CODE_FOR_ufloatv8siv8sf2_mask_round = 3817,
|
||
|
CODE_FOR_ufloatv4siv4sf2 = 3818,
|
||
|
CODE_FOR_ufloatv4siv4sf2_round = 3819,
|
||
|
CODE_FOR_ufloatv4siv4sf2_mask = 3820,
|
||
|
CODE_FOR_ufloatv4siv4sf2_mask_round = 3821,
|
||
|
CODE_FOR_avx_fix_notruncv8sfv8si = 3822,
|
||
|
CODE_FOR_avx_fix_notruncv8sfv8si_mask = 3823,
|
||
|
CODE_FOR_sse2_fix_notruncv4sfv4si = 3824,
|
||
|
CODE_FOR_sse2_fix_notruncv4sfv4si_mask = 3825,
|
||
|
CODE_FOR_avx512f_fix_notruncv16sfv16si = 3826,
|
||
|
CODE_FOR_avx512f_fix_notruncv16sfv16si_round = 3827,
|
||
|
CODE_FOR_avx512f_fix_notruncv16sfv16si_mask = 3828,
|
||
|
CODE_FOR_avx512f_fix_notruncv16sfv16si_mask_round = 3829,
|
||
|
CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask = 3832,
|
||
|
CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask_round = 3833,
|
||
|
CODE_FOR_avx512vl_ufix_notruncv8sfv8si_mask = 3836,
|
||
|
CODE_FOR_avx512vl_ufix_notruncv8sfv8si_mask_round = 3837,
|
||
|
CODE_FOR_avx512vl_ufix_notruncv4sfv4si_mask = 3840,
|
||
|
CODE_FOR_avx512vl_ufix_notruncv4sfv4si_mask_round = 3841,
|
||
|
CODE_FOR_avx512dq_cvtps2qqv8di_mask = 3844,
|
||
|
CODE_FOR_avx512dq_cvtps2qqv8di_mask_round = 3845,
|
||
|
CODE_FOR_avx512dq_cvtps2qqv4di_mask = 3847,
|
||
|
CODE_FOR_avx512dq_cvtps2qqv4di_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_cvtps2qqv2di_mask = 3849,
|
||
|
CODE_FOR_avx512dq_cvtps2uqqv8di_mask = 3852,
|
||
|
CODE_FOR_avx512dq_cvtps2uqqv8di_mask_round = 3853,
|
||
|
CODE_FOR_avx512dq_cvtps2uqqv4di_mask = 3855,
|
||
|
CODE_FOR_avx512dq_cvtps2uqqv4di_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_cvtps2uqqv2di_mask = 3857,
|
||
|
CODE_FOR_fix_truncv16sfv16si2 = 3858,
|
||
|
CODE_FOR_fix_truncv16sfv16si2_round = 3859,
|
||
|
CODE_FOR_fix_truncv16sfv16si2_mask = 3860,
|
||
|
CODE_FOR_fix_truncv16sfv16si2_mask_round = 3861,
|
||
|
CODE_FOR_ufix_truncv16sfv16si2 = 3862,
|
||
|
CODE_FOR_ufix_truncv16sfv16si2_round = 3863,
|
||
|
CODE_FOR_ufix_truncv16sfv16si2_mask = 3864,
|
||
|
CODE_FOR_ufix_truncv16sfv16si2_mask_round = 3865,
|
||
|
CODE_FOR_fix_truncv8sfv8si2 = 3866,
|
||
|
CODE_FOR_fix_truncv8sfv8si2_mask = 3867,
|
||
|
CODE_FOR_fix_truncv4sfv4si2 = 3868,
|
||
|
CODE_FOR_fix_truncv4sfv4si2_mask = 3869,
|
||
|
CODE_FOR_sse2_cvtpi2pd = 3870,
|
||
|
CODE_FOR_floatunsv2siv2df2 = 3871,
|
||
|
CODE_FOR_sse2_cvtpd2pi = 3872,
|
||
|
CODE_FOR_sse2_cvttpd2pi = 3873,
|
||
|
CODE_FOR_fixuns_truncv2dfv2si2 = 3874,
|
||
|
CODE_FOR_sse2_cvtsi2sd = 3875,
|
||
|
CODE_FOR_sse2_cvtsi2sdq = 3876,
|
||
|
CODE_FOR_sse2_cvtsi2sdq_round = 3877,
|
||
|
CODE_FOR_avx512f_vcvtss2usi = 3878,
|
||
|
CODE_FOR_avx512f_vcvtss2usi_round = 3879,
|
||
|
CODE_FOR_avx512f_vcvtss2usiq = 3880,
|
||
|
CODE_FOR_avx512f_vcvtss2usiq_round = 3881,
|
||
|
CODE_FOR_avx512f_vcvttss2usi = 3882,
|
||
|
CODE_FOR_avx512f_vcvttss2usi_round = 3883,
|
||
|
CODE_FOR_avx512f_vcvttss2usiq = 3884,
|
||
|
CODE_FOR_avx512f_vcvttss2usiq_round = 3885,
|
||
|
CODE_FOR_avx512f_vcvtsd2usi = 3886,
|
||
|
CODE_FOR_avx512f_vcvtsd2usi_round = 3887,
|
||
|
CODE_FOR_avx512f_vcvtsd2usiq = 3888,
|
||
|
CODE_FOR_avx512f_vcvtsd2usiq_round = 3889,
|
||
|
CODE_FOR_avx512f_vcvttsd2usi = 3890,
|
||
|
CODE_FOR_avx512f_vcvttsd2usi_round = 3891,
|
||
|
CODE_FOR_avx512f_vcvttsd2usiq = 3892,
|
||
|
CODE_FOR_avx512f_vcvttsd2usiq_round = 3893,
|
||
|
CODE_FOR_sse2_cvtsd2si = 3894,
|
||
|
CODE_FOR_sse2_cvtsd2si_round = 3895,
|
||
|
CODE_FOR_sse2_cvtsd2siq = 3896,
|
||
|
CODE_FOR_sse2_cvtsd2siq_round = 3897,
|
||
|
CODE_FOR_sse2_cvtsd2si_2 = 3898,
|
||
|
CODE_FOR_sse2_cvtsd2siq_2 = 3899,
|
||
|
CODE_FOR_sse2_cvttsd2si = 3900,
|
||
|
CODE_FOR_sse2_cvttsd2si_round = 3901,
|
||
|
CODE_FOR_sse2_cvttsd2siq = 3902,
|
||
|
CODE_FOR_sse2_cvttsd2siq_round = 3903,
|
||
|
CODE_FOR_floatv8siv8df2 = 3904,
|
||
|
CODE_FOR_floatv8siv8df2_mask = 3905,
|
||
|
CODE_FOR_floatv4siv4df2 = 3906,
|
||
|
CODE_FOR_floatv4siv4df2_mask = 3907,
|
||
|
CODE_FOR_floatv8div8df2 = 3908,
|
||
|
CODE_FOR_floatv8div8df2_round = 3909,
|
||
|
CODE_FOR_floatv8div8df2_mask = 3910,
|
||
|
CODE_FOR_floatv8div8df2_mask_round = 3911,
|
||
|
CODE_FOR_floatunsv8div8df2 = 3912,
|
||
|
CODE_FOR_floatunsv8div8df2_round = 3913,
|
||
|
CODE_FOR_floatunsv8div8df2_mask = 3914,
|
||
|
CODE_FOR_floatunsv8div8df2_mask_round = 3915,
|
||
|
CODE_FOR_floatv4div4df2 = 3916,
|
||
|
CODE_FOR_floatv4div4df2_round = 3917,
|
||
|
CODE_FOR_floatv4div4df2_mask = 3918,
|
||
|
CODE_FOR_floatv4div4df2_mask_round = 3919,
|
||
|
CODE_FOR_floatunsv4div4df2 = 3920,
|
||
|
CODE_FOR_floatunsv4div4df2_round = 3921,
|
||
|
CODE_FOR_floatunsv4div4df2_mask = 3922,
|
||
|
CODE_FOR_floatunsv4div4df2_mask_round = 3923,
|
||
|
CODE_FOR_floatv2div2df2 = 3924,
|
||
|
CODE_FOR_floatv2div2df2_round = 3925,
|
||
|
CODE_FOR_floatv2div2df2_mask = 3926,
|
||
|
CODE_FOR_floatv2div2df2_mask_round = 3927,
|
||
|
CODE_FOR_floatunsv2div2df2 = 3928,
|
||
|
CODE_FOR_floatunsv2div2df2_round = 3929,
|
||
|
CODE_FOR_floatunsv2div2df2_mask = 3930,
|
||
|
CODE_FOR_floatunsv2div2df2_mask_round = 3931,
|
||
|
CODE_FOR_floatv8div8sf2 = 3932,
|
||
|
CODE_FOR_floatv8div8sf2_round = 3933,
|
||
|
CODE_FOR_floatv8div8sf2_mask = 3934,
|
||
|
CODE_FOR_floatv8div8sf2_mask_round = 3935,
|
||
|
CODE_FOR_floatunsv8div8sf2 = 3936,
|
||
|
CODE_FOR_floatunsv8div8sf2_round = 3937,
|
||
|
CODE_FOR_floatunsv8div8sf2_mask = 3938,
|
||
|
CODE_FOR_floatunsv8div8sf2_mask_round = 3939,
|
||
|
CODE_FOR_floatv4div4sf2 = 3940,
|
||
|
CODE_FOR_floatv4div4sf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_floatv4div4sf2_mask = 3941,
|
||
|
CODE_FOR_floatv4div4sf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_floatunsv4div4sf2 = 3942,
|
||
|
CODE_FOR_floatunsv4div4sf2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_floatunsv4div4sf2_mask = 3943,
|
||
|
CODE_FOR_floatunsv4div4sf2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ufloatv8siv8df2 = 3950,
|
||
|
CODE_FOR_ufloatv8siv8df2_mask = 3951,
|
||
|
CODE_FOR_ufloatv4siv4df2 = 3952,
|
||
|
CODE_FOR_ufloatv4siv4df2_mask = 3953,
|
||
|
CODE_FOR_ufloatv2siv2df2 = 3954,
|
||
|
CODE_FOR_ufloatv2siv2df2_mask = 3955,
|
||
|
CODE_FOR_avx512f_cvtdq2pd512_2 = 3956,
|
||
|
CODE_FOR_avx_cvtdq2pd256_2 = 3957,
|
||
|
CODE_FOR_sse2_cvtdq2pd = 3958,
|
||
|
CODE_FOR_sse2_cvtdq2pd_mask = 3959,
|
||
|
CODE_FOR_avx512f_cvtpd2dq512 = 3960,
|
||
|
CODE_FOR_avx512f_cvtpd2dq512_round = 3961,
|
||
|
CODE_FOR_avx512f_cvtpd2dq512_mask = 3962,
|
||
|
CODE_FOR_avx512f_cvtpd2dq512_mask_round = 3963,
|
||
|
CODE_FOR_avx_cvtpd2dq256 = 3964,
|
||
|
CODE_FOR_avx_cvtpd2dq256_mask = 3965,
|
||
|
CODE_FOR_sse2_cvtpd2dq = 3967,
|
||
|
CODE_FOR_sse2_cvtpd2dq_mask = 3968,
|
||
|
CODE_FOR_ufix_notruncv8dfv8si2 = 3970,
|
||
|
CODE_FOR_ufix_notruncv8dfv8si2_round = 3971,
|
||
|
CODE_FOR_ufix_notruncv8dfv8si2_mask = 3972,
|
||
|
CODE_FOR_ufix_notruncv8dfv8si2_mask_round = 3973,
|
||
|
CODE_FOR_ufix_notruncv4dfv4si2 = 3974,
|
||
|
CODE_FOR_ufix_notruncv4dfv4si2_round = 3975,
|
||
|
CODE_FOR_ufix_notruncv4dfv4si2_mask = 3976,
|
||
|
CODE_FOR_ufix_notruncv4dfv4si2_mask_round = 3977,
|
||
|
CODE_FOR_ufix_notruncv2dfv2si2 = 3978,
|
||
|
CODE_FOR_ufix_notruncv2dfv2si2_mask = 3979,
|
||
|
CODE_FOR_fix_truncv8dfv8si2 = 3981,
|
||
|
CODE_FOR_fix_truncv8dfv8si2_round = 3982,
|
||
|
CODE_FOR_fix_truncv8dfv8si2_mask = 3983,
|
||
|
CODE_FOR_fix_truncv8dfv8si2_mask_round = 3984,
|
||
|
CODE_FOR_fixuns_truncv8dfv8si2 = 3985,
|
||
|
CODE_FOR_fixuns_truncv8dfv8si2_round = 3986,
|
||
|
CODE_FOR_fixuns_truncv8dfv8si2_mask = 3987,
|
||
|
CODE_FOR_fixuns_truncv8dfv8si2_mask_round = 3988,
|
||
|
CODE_FOR_ufix_truncv2dfv2si2 = 3989,
|
||
|
CODE_FOR_ufix_truncv2dfv2si2_mask = 3990,
|
||
|
CODE_FOR_fix_truncv4dfv4si2 = 3992,
|
||
|
CODE_FOR_fix_truncv4dfv4si2_mask = 3993,
|
||
|
CODE_FOR_ufix_truncv4dfv4si2 = 3994,
|
||
|
CODE_FOR_ufix_truncv4dfv4si2_mask = 3995,
|
||
|
CODE_FOR_fix_truncv8dfv8di2 = 3996,
|
||
|
CODE_FOR_fix_truncv8dfv8di2_round = 3997,
|
||
|
CODE_FOR_fix_truncv8dfv8di2_mask = 3998,
|
||
|
CODE_FOR_fix_truncv8dfv8di2_mask_round = 3999,
|
||
|
CODE_FOR_fixuns_truncv8dfv8di2 = 4000,
|
||
|
CODE_FOR_fixuns_truncv8dfv8di2_round = 4001,
|
||
|
CODE_FOR_fixuns_truncv8dfv8di2_mask = 4002,
|
||
|
CODE_FOR_fixuns_truncv8dfv8di2_mask_round = 4003,
|
||
|
CODE_FOR_fix_truncv4dfv4di2 = 4004,
|
||
|
CODE_FOR_fix_truncv4dfv4di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_truncv4dfv4di2_mask = 4005,
|
||
|
CODE_FOR_fix_truncv4dfv4di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fixuns_truncv4dfv4di2 = 4006,
|
||
|
CODE_FOR_fixuns_truncv4dfv4di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fixuns_truncv4dfv4di2_mask = 4007,
|
||
|
CODE_FOR_fixuns_truncv4dfv4di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_truncv2dfv2di2 = 4008,
|
||
|
CODE_FOR_fix_truncv2dfv2di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_truncv2dfv2di2_mask = 4009,
|
||
|
CODE_FOR_fix_truncv2dfv2di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fixuns_truncv2dfv2di2 = 4010,
|
||
|
CODE_FOR_fixuns_truncv2dfv2di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fixuns_truncv2dfv2di2_mask = 4011,
|
||
|
CODE_FOR_fixuns_truncv2dfv2di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_notruncv8dfv8di2 = 4012,
|
||
|
CODE_FOR_fix_notruncv8dfv8di2_round = 4013,
|
||
|
CODE_FOR_fix_notruncv8dfv8di2_mask = 4014,
|
||
|
CODE_FOR_fix_notruncv8dfv8di2_mask_round = 4015,
|
||
|
CODE_FOR_fix_notruncv4dfv4di2 = 4016,
|
||
|
CODE_FOR_fix_notruncv4dfv4di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_notruncv4dfv4di2_mask = 4017,
|
||
|
CODE_FOR_fix_notruncv4dfv4di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_notruncv2dfv2di2 = 4018,
|
||
|
CODE_FOR_fix_notruncv2dfv2di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_notruncv2dfv2di2_mask = 4019,
|
||
|
CODE_FOR_fix_notruncv2dfv2di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ufix_notruncv8dfv8di2 = 4020,
|
||
|
CODE_FOR_ufix_notruncv8dfv8di2_round = 4021,
|
||
|
CODE_FOR_ufix_notruncv8dfv8di2_mask = 4022,
|
||
|
CODE_FOR_ufix_notruncv8dfv8di2_mask_round = 4023,
|
||
|
CODE_FOR_ufix_notruncv4dfv4di2 = 4024,
|
||
|
CODE_FOR_ufix_notruncv4dfv4di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ufix_notruncv4dfv4di2_mask = 4025,
|
||
|
CODE_FOR_ufix_notruncv4dfv4di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ufix_notruncv2dfv2di2 = 4026,
|
||
|
CODE_FOR_ufix_notruncv2dfv2di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_ufix_notruncv2dfv2di2_mask = 4027,
|
||
|
CODE_FOR_ufix_notruncv2dfv2di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_truncv8sfv8di2 = 4028,
|
||
|
CODE_FOR_fix_truncv8sfv8di2_round = 4029,
|
||
|
CODE_FOR_fix_truncv8sfv8di2_mask = 4030,
|
||
|
CODE_FOR_fix_truncv8sfv8di2_mask_round = 4031,
|
||
|
CODE_FOR_fixuns_truncv8sfv8di2 = 4032,
|
||
|
CODE_FOR_fixuns_truncv8sfv8di2_round = 4033,
|
||
|
CODE_FOR_fixuns_truncv8sfv8di2_mask = 4034,
|
||
|
CODE_FOR_fixuns_truncv8sfv8di2_mask_round = 4035,
|
||
|
CODE_FOR_fix_truncv4sfv4di2 = 4036,
|
||
|
CODE_FOR_fix_truncv4sfv4di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fix_truncv4sfv4di2_mask = 4037,
|
||
|
CODE_FOR_fix_truncv4sfv4di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fixuns_truncv4sfv4di2 = 4038,
|
||
|
CODE_FOR_fixuns_truncv4sfv4di2_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_fixuns_truncv4sfv4di2_mask = 4039,
|
||
|
CODE_FOR_fixuns_truncv4sfv4di2_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_fix_truncv2sfv2di2 = 4040,
|
||
|
CODE_FOR_avx512dq_fix_truncv2sfv2di2_mask = 4041,
|
||
|
CODE_FOR_avx512dq_fixuns_truncv2sfv2di2 = 4042,
|
||
|
CODE_FOR_avx512dq_fixuns_truncv2sfv2di2_mask = 4043,
|
||
|
CODE_FOR_ufix_truncv8sfv8si2 = 4044,
|
||
|
CODE_FOR_ufix_truncv8sfv8si2_mask = 4045,
|
||
|
CODE_FOR_ufix_truncv4sfv4si2 = 4046,
|
||
|
CODE_FOR_ufix_truncv4sfv4si2_mask = 4047,
|
||
|
CODE_FOR_sse2_cvttpd2dq = 4048,
|
||
|
CODE_FOR_sse2_cvttpd2dq_mask = 4049,
|
||
|
CODE_FOR_sse2_cvtsd2ss = 4051,
|
||
|
CODE_FOR_sse2_cvtsd2ss_round = 4052,
|
||
|
CODE_FOR_sse2_cvtsd2ss_mask = 4053,
|
||
|
CODE_FOR_sse2_cvtsd2ss_mask_round = 4054,
|
||
|
CODE_FOR_sse2_cvtss2sd = 4056,
|
||
|
CODE_FOR_sse2_cvtss2sd_round = 4057,
|
||
|
CODE_FOR_sse2_cvtss2sd_mask = 4058,
|
||
|
CODE_FOR_sse2_cvtss2sd_mask_round = 4059,
|
||
|
CODE_FOR_avx512f_cvtpd2ps512_mask = 4063,
|
||
|
CODE_FOR_avx512f_cvtpd2ps512_mask_round = 4064,
|
||
|
CODE_FOR_avx_cvtpd2ps256 = 4065,
|
||
|
CODE_FOR_avx_cvtpd2ps256_mask = 4066,
|
||
|
CODE_FOR_truncv2dfv2sf2 = 4068,
|
||
|
CODE_FOR_avx512f_cvtps2pd512 = 4071,
|
||
|
CODE_FOR_avx512f_cvtps2pd512_round = 4072,
|
||
|
CODE_FOR_avx512f_cvtps2pd512_mask = 4073,
|
||
|
CODE_FOR_avx512f_cvtps2pd512_mask_round = 4074,
|
||
|
CODE_FOR_avx_cvtps2pd256 = 4075,
|
||
|
CODE_FOR_avx_cvtps2pd256_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx_cvtps2pd256_mask = 4076,
|
||
|
CODE_FOR_avx_cvtps2pd256_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_vec_unpacks_lo_v16sf = 4078,
|
||
|
CODE_FOR_avx512bw_cvtb2maskv64qi = 4079,
|
||
|
CODE_FOR_avx512vl_cvtb2maskv16qi = 4080,
|
||
|
CODE_FOR_avx512vl_cvtb2maskv32qi = 4081,
|
||
|
CODE_FOR_avx512bw_cvtw2maskv32hi = 4082,
|
||
|
CODE_FOR_avx512vl_cvtw2maskv16hi = 4083,
|
||
|
CODE_FOR_avx512vl_cvtw2maskv8hi = 4084,
|
||
|
CODE_FOR_avx512f_cvtd2maskv16si = 4085,
|
||
|
CODE_FOR_avx512vl_cvtd2maskv8si = 4086,
|
||
|
CODE_FOR_avx512vl_cvtd2maskv4si = 4087,
|
||
|
CODE_FOR_avx512f_cvtq2maskv8di = 4088,
|
||
|
CODE_FOR_avx512vl_cvtq2maskv4di = 4089,
|
||
|
CODE_FOR_avx512vl_cvtq2maskv2di = 4090,
|
||
|
CODE_FOR_sse2_cvtps2pd = 4103,
|
||
|
CODE_FOR_sse2_cvtps2pd_mask = 4104,
|
||
|
CODE_FOR_extendv2sfv2df2 = 4105,
|
||
|
CODE_FOR_sse_movhlps = 4106,
|
||
|
CODE_FOR_sse_movlhps = 4107,
|
||
|
CODE_FOR_avx512f_unpckhps512_mask = 4109,
|
||
|
CODE_FOR_avx_unpckhps256 = 4110,
|
||
|
CODE_FOR_avx_unpckhps256_mask = 4111,
|
||
|
CODE_FOR_vec_interleave_highv4sf = 4112,
|
||
|
CODE_FOR_vec_interleave_highv4sf_mask = 4113,
|
||
|
CODE_FOR_avx512f_unpcklps512_mask = 4115,
|
||
|
CODE_FOR_avx_unpcklps256 = 4116,
|
||
|
CODE_FOR_avx_unpcklps256_mask = 4117,
|
||
|
CODE_FOR_unpcklps128_mask = 4118,
|
||
|
CODE_FOR_vec_interleave_lowv4sf = 4119,
|
||
|
CODE_FOR_avx_movshdup256 = 4120,
|
||
|
CODE_FOR_avx_movshdup256_mask = 4121,
|
||
|
CODE_FOR_sse3_movshdup = 4122,
|
||
|
CODE_FOR_sse3_movshdup_mask = 4123,
|
||
|
CODE_FOR_avx512f_movshdup512_mask = 4125,
|
||
|
CODE_FOR_avx_movsldup256 = 4126,
|
||
|
CODE_FOR_avx_movsldup256_mask = 4127,
|
||
|
CODE_FOR_sse3_movsldup = 4128,
|
||
|
CODE_FOR_sse3_movsldup_mask = 4129,
|
||
|
CODE_FOR_avx512f_movsldup512_mask = 4131,
|
||
|
CODE_FOR_avx_shufps256_1 = 4132,
|
||
|
CODE_FOR_avx_shufps256_1_mask = 4133,
|
||
|
CODE_FOR_sse_shufps_v4sf_mask = 4134,
|
||
|
CODE_FOR_sse_shufps_v4si = 4135,
|
||
|
CODE_FOR_sse_shufps_v4sf = 4136,
|
||
|
CODE_FOR_sse_storehps = 4137,
|
||
|
CODE_FOR_sse_loadhps = 4138,
|
||
|
CODE_FOR_sse_storelps = 4139,
|
||
|
CODE_FOR_sse_loadlps = 4140,
|
||
|
CODE_FOR_sse_movss = 4141,
|
||
|
CODE_FOR_avx2_vec_dupv8sf = 4142,
|
||
|
CODE_FOR_avx2_vec_dupv4sf = 4143,
|
||
|
CODE_FOR_avx2_vec_dupv8sf_1 = 4144,
|
||
|
CODE_FOR_avx512f_vec_dupv16sf_1 = 4145,
|
||
|
CODE_FOR_avx512f_vec_dupv8df_1 = 4146,
|
||
|
CODE_FOR_vec_setv4si_0 = 4151,
|
||
|
CODE_FOR_vec_setv4sf_0 = 4152,
|
||
|
CODE_FOR_vec_setv8hi_0 = 4153,
|
||
|
CODE_FOR_vec_setv8hf_0 = 4154,
|
||
|
CODE_FOR_vec_setv16hi_0 = 4155,
|
||
|
CODE_FOR_vec_setv32hi_0 = 4156,
|
||
|
CODE_FOR_vec_setv16hf_0 = 4157,
|
||
|
CODE_FOR_vec_setv32hf_0 = 4158,
|
||
|
CODE_FOR_avx512fp16_movsh = 4159,
|
||
|
CODE_FOR_vec_setv8si_0 = 4161,
|
||
|
CODE_FOR_vec_setv8sf_0 = 4162,
|
||
|
CODE_FOR_vec_setv16si_0 = 4163,
|
||
|
CODE_FOR_vec_setv16sf_0 = 4164,
|
||
|
CODE_FOR_sse4_1_insertps = 4165,
|
||
|
CODE_FOR_vec_setv2df_0 = 4166,
|
||
|
CODE_FOR_avx512dq_vextractf64x2_1_mask = 4170,
|
||
|
CODE_FOR_avx512dq_vextracti64x2_1_mask = 4171,
|
||
|
CODE_FOR_avx512f_vextractf32x4_1_mask = 4174,
|
||
|
CODE_FOR_avx512f_vextracti32x4_1_mask = 4175,
|
||
|
CODE_FOR_vec_extract_lo_v8df_mask = 4178,
|
||
|
CODE_FOR_vec_extract_lo_v8di_mask = 4179,
|
||
|
CODE_FOR_vec_extract_lo_v8df = 4180,
|
||
|
CODE_FOR_vec_extract_lo_v8di = 4181,
|
||
|
CODE_FOR_vec_extract_hi_v8df_mask = 4182,
|
||
|
CODE_FOR_vec_extract_hi_v8di_mask = 4183,
|
||
|
CODE_FOR_vec_extract_hi_v8df = 4184,
|
||
|
CODE_FOR_vec_extract_hi_v8di = 4185,
|
||
|
CODE_FOR_vec_extract_hi_v16sf_mask = 4186,
|
||
|
CODE_FOR_vec_extract_hi_v16si_mask = 4187,
|
||
|
CODE_FOR_vec_extract_hi_v16sf = 4188,
|
||
|
CODE_FOR_vec_extract_hi_v16si = 4189,
|
||
|
CODE_FOR_vec_extract_lo_v16sf_mask = 4190,
|
||
|
CODE_FOR_vec_extract_lo_v16si_mask = 4191,
|
||
|
CODE_FOR_vec_extract_lo_v16sf = 4192,
|
||
|
CODE_FOR_vec_extract_lo_v16si = 4193,
|
||
|
CODE_FOR_vec_extract_lo_v4di_mask = 4194,
|
||
|
CODE_FOR_vec_extract_lo_v4df_mask = 4195,
|
||
|
CODE_FOR_vec_extract_lo_v4di = 4196,
|
||
|
CODE_FOR_vec_extract_lo_v4df = 4197,
|
||
|
CODE_FOR_vec_extract_hi_v4di_mask = 4198,
|
||
|
CODE_FOR_vec_extract_hi_v4df_mask = 4199,
|
||
|
CODE_FOR_vec_extract_hi_v4di = 4200,
|
||
|
CODE_FOR_vec_extract_hi_v4df = 4201,
|
||
|
CODE_FOR_vec_extract_lo_v8si_mask = 4202,
|
||
|
CODE_FOR_vec_extract_lo_v8sf_mask = 4203,
|
||
|
CODE_FOR_vec_extract_lo_v8si = 4204,
|
||
|
CODE_FOR_vec_extract_lo_v8sf = 4205,
|
||
|
CODE_FOR_vec_extract_hi_v8si_mask = 4206,
|
||
|
CODE_FOR_vec_extract_hi_v8sf_mask = 4207,
|
||
|
CODE_FOR_vec_extract_hi_v8si = 4208,
|
||
|
CODE_FOR_vec_extract_hi_v8sf = 4209,
|
||
|
CODE_FOR_vec_extract_lo_v32hi = 4210,
|
||
|
CODE_FOR_vec_extract_lo_v32hf = 4211,
|
||
|
CODE_FOR_vec_extract_hi_v32hi = 4212,
|
||
|
CODE_FOR_vec_extract_hi_v32hf = 4213,
|
||
|
CODE_FOR_vec_extract_lo_v16hi = 4214,
|
||
|
CODE_FOR_vec_extract_lo_v16hf = 4215,
|
||
|
CODE_FOR_vec_extract_hi_v16hi = 4216,
|
||
|
CODE_FOR_vec_extract_hi_v16hf = 4217,
|
||
|
CODE_FOR_vec_extract_lo_v64qi = 4218,
|
||
|
CODE_FOR_vec_extract_hi_v64qi = 4219,
|
||
|
CODE_FOR_vec_extract_lo_v32qi = 4220,
|
||
|
CODE_FOR_vec_extract_hi_v32qi = 4221,
|
||
|
CODE_FOR_avx512f_unpckhpd512_mask = 4227,
|
||
|
CODE_FOR_avx_unpckhpd256 = 4228,
|
||
|
CODE_FOR_avx_unpckhpd256_mask = 4229,
|
||
|
CODE_FOR_avx512vl_unpckhpd128_mask = 4230,
|
||
|
CODE_FOR_avx512vl_unpcklpd128_mask = 4236,
|
||
|
CODE_FOR_avx512f_vmscalefv8hf = 4238,
|
||
|
CODE_FOR_avx512f_vmscalefv8hf_round = 4239,
|
||
|
CODE_FOR_avx512f_vmscalefv8hf_mask = 4240,
|
||
|
CODE_FOR_avx512f_vmscalefv8hf_mask_round = 4241,
|
||
|
CODE_FOR_avx512f_vmscalefv4sf = 4242,
|
||
|
CODE_FOR_avx512f_vmscalefv4sf_round = 4243,
|
||
|
CODE_FOR_avx512f_vmscalefv4sf_mask = 4244,
|
||
|
CODE_FOR_avx512f_vmscalefv4sf_mask_round = 4245,
|
||
|
CODE_FOR_avx512f_vmscalefv2df = 4246,
|
||
|
CODE_FOR_avx512f_vmscalefv2df_round = 4247,
|
||
|
CODE_FOR_avx512f_vmscalefv2df_mask = 4248,
|
||
|
CODE_FOR_avx512f_vmscalefv2df_mask_round = 4249,
|
||
|
CODE_FOR_avx512bw_scalefv32hf = 4250,
|
||
|
CODE_FOR_avx512bw_scalefv32hf_round = 4251,
|
||
|
CODE_FOR_avx512bw_scalefv32hf_mask = 4252,
|
||
|
CODE_FOR_avx512bw_scalefv32hf_mask_round = 4253,
|
||
|
CODE_FOR_avx512vl_scalefv16hf = 4254,
|
||
|
CODE_FOR_avx512vl_scalefv16hf_round = 4255,
|
||
|
CODE_FOR_avx512vl_scalefv16hf_mask = 4256,
|
||
|
CODE_FOR_avx512vl_scalefv16hf_mask_round = 4257,
|
||
|
CODE_FOR_avx512fp16_scalefv8hf = 4258,
|
||
|
CODE_FOR_avx512fp16_scalefv8hf_round = 4259,
|
||
|
CODE_FOR_avx512fp16_scalefv8hf_mask = 4260,
|
||
|
CODE_FOR_avx512fp16_scalefv8hf_mask_round = 4261,
|
||
|
CODE_FOR_avx512f_scalefv16sf = 4262,
|
||
|
CODE_FOR_avx512f_scalefv16sf_round = 4263,
|
||
|
CODE_FOR_avx512f_scalefv16sf_mask = 4264,
|
||
|
CODE_FOR_avx512f_scalefv16sf_mask_round = 4265,
|
||
|
CODE_FOR_avx512vl_scalefv8sf = 4266,
|
||
|
CODE_FOR_avx512vl_scalefv8sf_round = 4267,
|
||
|
CODE_FOR_avx512vl_scalefv8sf_mask = 4268,
|
||
|
CODE_FOR_avx512vl_scalefv8sf_mask_round = 4269,
|
||
|
CODE_FOR_avx512vl_scalefv4sf = 4270,
|
||
|
CODE_FOR_avx512vl_scalefv4sf_round = 4271,
|
||
|
CODE_FOR_avx512vl_scalefv4sf_mask = 4272,
|
||
|
CODE_FOR_avx512vl_scalefv4sf_mask_round = 4273,
|
||
|
CODE_FOR_avx512f_scalefv8df = 4274,
|
||
|
CODE_FOR_avx512f_scalefv8df_round = 4275,
|
||
|
CODE_FOR_avx512f_scalefv8df_mask = 4276,
|
||
|
CODE_FOR_avx512f_scalefv8df_mask_round = 4277,
|
||
|
CODE_FOR_avx512vl_scalefv4df = 4278,
|
||
|
CODE_FOR_avx512vl_scalefv4df_round = 4279,
|
||
|
CODE_FOR_avx512vl_scalefv4df_mask = 4280,
|
||
|
CODE_FOR_avx512vl_scalefv4df_mask_round = 4281,
|
||
|
CODE_FOR_avx512vl_scalefv2df = 4282,
|
||
|
CODE_FOR_avx512vl_scalefv2df_round = 4283,
|
||
|
CODE_FOR_avx512vl_scalefv2df_mask = 4284,
|
||
|
CODE_FOR_avx512vl_scalefv2df_mask_round = 4285,
|
||
|
CODE_FOR_avx512f_vternlogv16si = 4286,
|
||
|
CODE_FOR_avx512f_vternlogv16si_maskz_1 = 4287,
|
||
|
CODE_FOR_avx512vl_vternlogv8si = 4288,
|
||
|
CODE_FOR_avx512vl_vternlogv8si_maskz_1 = 4289,
|
||
|
CODE_FOR_avx512vl_vternlogv4si = 4290,
|
||
|
CODE_FOR_avx512vl_vternlogv4si_maskz_1 = 4291,
|
||
|
CODE_FOR_avx512f_vternlogv8di = 4292,
|
||
|
CODE_FOR_avx512f_vternlogv8di_maskz_1 = 4293,
|
||
|
CODE_FOR_avx512vl_vternlogv4di = 4294,
|
||
|
CODE_FOR_avx512vl_vternlogv4di_maskz_1 = 4295,
|
||
|
CODE_FOR_avx512vl_vternlogv2di = 4296,
|
||
|
CODE_FOR_avx512vl_vternlogv2di_maskz_1 = 4297,
|
||
|
CODE_FOR_avx512f_vternlogv16si_mask = 5642,
|
||
|
CODE_FOR_avx512vl_vternlogv8si_mask = 5643,
|
||
|
CODE_FOR_avx512vl_vternlogv4si_mask = 5644,
|
||
|
CODE_FOR_avx512f_vternlogv8di_mask = 5645,
|
||
|
CODE_FOR_avx512vl_vternlogv4di_mask = 5646,
|
||
|
CODE_FOR_avx512vl_vternlogv2di_mask = 5647,
|
||
|
CODE_FOR_avx512bw_getexpv32hf = 5648,
|
||
|
CODE_FOR_avx512bw_getexpv32hf_round = 5649,
|
||
|
CODE_FOR_avx512bw_getexpv32hf_mask = 5650,
|
||
|
CODE_FOR_avx512bw_getexpv32hf_mask_round = 5651,
|
||
|
CODE_FOR_avx512vl_getexpv16hf = 5652,
|
||
|
CODE_FOR_avx512vl_getexpv16hf_round = 5653,
|
||
|
CODE_FOR_avx512vl_getexpv16hf_mask = 5654,
|
||
|
CODE_FOR_avx512vl_getexpv16hf_mask_round = 5655,
|
||
|
CODE_FOR_avx512fp16_getexpv8hf = 5656,
|
||
|
CODE_FOR_avx512fp16_getexpv8hf_round = 5657,
|
||
|
CODE_FOR_avx512fp16_getexpv8hf_mask = 5658,
|
||
|
CODE_FOR_avx512fp16_getexpv8hf_mask_round = 5659,
|
||
|
CODE_FOR_avx512f_getexpv16sf = 5660,
|
||
|
CODE_FOR_avx512f_getexpv16sf_round = 5661,
|
||
|
CODE_FOR_avx512f_getexpv16sf_mask = 5662,
|
||
|
CODE_FOR_avx512f_getexpv16sf_mask_round = 5663,
|
||
|
CODE_FOR_avx512vl_getexpv8sf = 5664,
|
||
|
CODE_FOR_avx512vl_getexpv8sf_round = 5665,
|
||
|
CODE_FOR_avx512vl_getexpv8sf_mask = 5666,
|
||
|
CODE_FOR_avx512vl_getexpv8sf_mask_round = 5667,
|
||
|
CODE_FOR_avx512vl_getexpv4sf = 5668,
|
||
|
CODE_FOR_avx512vl_getexpv4sf_round = 5669,
|
||
|
CODE_FOR_avx512vl_getexpv4sf_mask = 5670,
|
||
|
CODE_FOR_avx512vl_getexpv4sf_mask_round = 5671,
|
||
|
CODE_FOR_avx512f_getexpv8df = 5672,
|
||
|
CODE_FOR_avx512f_getexpv8df_round = 5673,
|
||
|
CODE_FOR_avx512f_getexpv8df_mask = 5674,
|
||
|
CODE_FOR_avx512f_getexpv8df_mask_round = 5675,
|
||
|
CODE_FOR_avx512vl_getexpv4df = 5676,
|
||
|
CODE_FOR_avx512vl_getexpv4df_round = 5677,
|
||
|
CODE_FOR_avx512vl_getexpv4df_mask = 5678,
|
||
|
CODE_FOR_avx512vl_getexpv4df_mask_round = 5679,
|
||
|
CODE_FOR_avx512vl_getexpv2df = 5680,
|
||
|
CODE_FOR_avx512vl_getexpv2df_round = 5681,
|
||
|
CODE_FOR_avx512vl_getexpv2df_mask = 5682,
|
||
|
CODE_FOR_avx512vl_getexpv2df_mask_round = 5683,
|
||
|
CODE_FOR_avx512f_sgetexpv8hf = 5684,
|
||
|
CODE_FOR_avx512f_sgetexpv8hf_mask = 5685,
|
||
|
CODE_FOR_avx512f_sgetexpv8hf_round = 5686,
|
||
|
CODE_FOR_avx512f_sgetexpv8hf_mask_round = 5687,
|
||
|
CODE_FOR_avx512f_sgetexpv4sf = 5688,
|
||
|
CODE_FOR_avx512f_sgetexpv4sf_mask = 5689,
|
||
|
CODE_FOR_avx512f_sgetexpv4sf_round = 5690,
|
||
|
CODE_FOR_avx512f_sgetexpv4sf_mask_round = 5691,
|
||
|
CODE_FOR_avx512f_sgetexpv2df = 5692,
|
||
|
CODE_FOR_avx512f_sgetexpv2df_mask = 5693,
|
||
|
CODE_FOR_avx512f_sgetexpv2df_round = 5694,
|
||
|
CODE_FOR_avx512f_sgetexpv2df_mask_round = 5695,
|
||
|
CODE_FOR_avx512f_alignv16si_mask = 5697,
|
||
|
CODE_FOR_avx512vl_alignv8si_mask = 5699,
|
||
|
CODE_FOR_avx512vl_alignv4si_mask = 5701,
|
||
|
CODE_FOR_avx512f_alignv8di_mask = 5703,
|
||
|
CODE_FOR_avx512vl_alignv4di_mask = 5705,
|
||
|
CODE_FOR_avx512vl_alignv2di_mask = 5707,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf = 5716,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_round = 5717,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_maskz_1 = 5718,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_maskz_1_round = 5719,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf = 5720,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_round = 5721,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_maskz_1 = 5722,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_maskz_1_round = 5723,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf = 5724,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_round = 5725,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_maskz_1 = 5726,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_maskz_1_round = 5727,
|
||
|
CODE_FOR_avx512f_fixupimmv8df = 5728,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_round = 5729,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_maskz_1 = 5730,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_maskz_1_round = 5731,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df = 5732,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_round = 5733,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_maskz_1 = 5734,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_maskz_1_round = 5735,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df = 5736,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_round = 5737,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_maskz_1 = 5738,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_maskz_1_round = 5739,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_mask = 5740,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_mask_round = 5741,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_mask = 5742,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_mask_round = 5743,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_mask = 5744,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_mask_round = 5745,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_mask = 5746,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_mask_round = 5747,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_mask = 5748,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_mask_round = 5749,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_mask = 5750,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_mask_round = 5751,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf = 5752,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_round = 5753,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_maskz_1 = 5754,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_maskz_1_round = 5755,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df = 5756,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_round = 5757,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_maskz_1 = 5758,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_maskz_1_round = 5759,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_mask = 5760,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_mask_round = 5761,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_mask = 5762,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_mask_round = 5763,
|
||
|
CODE_FOR_avx512bw_rndscalev32hf = 5764,
|
||
|
CODE_FOR_avx512bw_rndscalev32hf_round = 5765,
|
||
|
CODE_FOR_avx512bw_rndscalev32hf_mask = 5766,
|
||
|
CODE_FOR_avx512bw_rndscalev32hf_mask_round = 5767,
|
||
|
CODE_FOR_avx512vl_rndscalev16hf = 5768,
|
||
|
CODE_FOR_avx512vl_rndscalev16hf_round = 5769,
|
||
|
CODE_FOR_avx512vl_rndscalev16hf_mask = 5770,
|
||
|
CODE_FOR_avx512vl_rndscalev16hf_mask_round = 5771,
|
||
|
CODE_FOR_avx512fp16_rndscalev8hf = 5772,
|
||
|
CODE_FOR_avx512fp16_rndscalev8hf_round = 5773,
|
||
|
CODE_FOR_avx512fp16_rndscalev8hf_mask = 5774,
|
||
|
CODE_FOR_avx512fp16_rndscalev8hf_mask_round = 5775,
|
||
|
CODE_FOR_avx512f_rndscalev16sf = 5776,
|
||
|
CODE_FOR_avx512f_rndscalev16sf_round = 5777,
|
||
|
CODE_FOR_avx512f_rndscalev16sf_mask = 5778,
|
||
|
CODE_FOR_avx512f_rndscalev16sf_mask_round = 5779,
|
||
|
CODE_FOR_avx512vl_rndscalev8sf = 5780,
|
||
|
CODE_FOR_avx512vl_rndscalev8sf_round = 5781,
|
||
|
CODE_FOR_avx512vl_rndscalev8sf_mask = 5782,
|
||
|
CODE_FOR_avx512vl_rndscalev8sf_mask_round = 5783,
|
||
|
CODE_FOR_avx512vl_rndscalev4sf = 5784,
|
||
|
CODE_FOR_avx512vl_rndscalev4sf_round = 5785,
|
||
|
CODE_FOR_avx512vl_rndscalev4sf_mask = 5786,
|
||
|
CODE_FOR_avx512vl_rndscalev4sf_mask_round = 5787,
|
||
|
CODE_FOR_avx512f_rndscalev8df = 5788,
|
||
|
CODE_FOR_avx512f_rndscalev8df_round = 5789,
|
||
|
CODE_FOR_avx512f_rndscalev8df_mask = 5790,
|
||
|
CODE_FOR_avx512f_rndscalev8df_mask_round = 5791,
|
||
|
CODE_FOR_avx512vl_rndscalev4df = 5792,
|
||
|
CODE_FOR_avx512vl_rndscalev4df_round = 5793,
|
||
|
CODE_FOR_avx512vl_rndscalev4df_mask = 5794,
|
||
|
CODE_FOR_avx512vl_rndscalev4df_mask_round = 5795,
|
||
|
CODE_FOR_avx512vl_rndscalev2df = 5796,
|
||
|
CODE_FOR_avx512vl_rndscalev2df_round = 5797,
|
||
|
CODE_FOR_avx512vl_rndscalev2df_mask = 5798,
|
||
|
CODE_FOR_avx512vl_rndscalev2df_mask_round = 5799,
|
||
|
CODE_FOR_avx512f_rndscalev8hf = 5800,
|
||
|
CODE_FOR_avx512f_rndscalev8hf_mask = 5801,
|
||
|
CODE_FOR_avx512f_rndscalev8hf_round = 5802,
|
||
|
CODE_FOR_avx512f_rndscalev8hf_mask_round = 5803,
|
||
|
CODE_FOR_avx512f_rndscalev4sf = 5804,
|
||
|
CODE_FOR_avx512f_rndscalev4sf_mask = 5805,
|
||
|
CODE_FOR_avx512f_rndscalev4sf_round = 5806,
|
||
|
CODE_FOR_avx512f_rndscalev4sf_mask_round = 5807,
|
||
|
CODE_FOR_avx512f_rndscalev2df = 5808,
|
||
|
CODE_FOR_avx512f_rndscalev2df_mask = 5809,
|
||
|
CODE_FOR_avx512f_rndscalev2df_round = 5810,
|
||
|
CODE_FOR_avx512f_rndscalev2df_mask_round = 5811,
|
||
|
CODE_FOR_avx512f_shufps512_1 = 5818,
|
||
|
CODE_FOR_avx512f_shufps512_1_mask = 5819,
|
||
|
CODE_FOR_avx512f_shufpd512_1 = 5820,
|
||
|
CODE_FOR_avx512f_shufpd512_1_mask = 5821,
|
||
|
CODE_FOR_avx_shufpd256_1 = 5822,
|
||
|
CODE_FOR_avx_shufpd256_1_mask = 5823,
|
||
|
CODE_FOR_sse2_shufpd_v2df_mask = 5824,
|
||
|
CODE_FOR_avx2_interleave_highv4di = 5825,
|
||
|
CODE_FOR_avx2_interleave_highv4di_mask = 5826,
|
||
|
CODE_FOR_avx512f_interleave_highv8di_mask = 5828,
|
||
|
CODE_FOR_vec_interleave_highv2di = 5829,
|
||
|
CODE_FOR_vec_interleave_highv2di_mask = 5830,
|
||
|
CODE_FOR_avx2_interleave_lowv4di = 5831,
|
||
|
CODE_FOR_avx2_interleave_lowv4di_mask = 5832,
|
||
|
CODE_FOR_avx512f_interleave_lowv8di_mask = 5834,
|
||
|
CODE_FOR_vec_interleave_lowv2di = 5835,
|
||
|
CODE_FOR_vec_interleave_lowv2di_mask = 5836,
|
||
|
CODE_FOR_sse2_shufpd_v2di = 5837,
|
||
|
CODE_FOR_sse2_shufpd_v2df = 5838,
|
||
|
CODE_FOR_sse2_storehpd = 5839,
|
||
|
CODE_FOR_sse2_storelpd = 5841,
|
||
|
CODE_FOR_sse2_loadhpd = 5843,
|
||
|
CODE_FOR_sse2_loadlpd = 5844,
|
||
|
CODE_FOR_sse2_movsd = 5845,
|
||
|
CODE_FOR_vec_dupv2df = 5846,
|
||
|
CODE_FOR_vec_dupv2df_mask = 5847,
|
||
|
CODE_FOR_vec_concatv2df = 5848,
|
||
|
CODE_FOR_vec_setv8df_0 = 5849,
|
||
|
CODE_FOR_vec_setv4df_0 = 5850,
|
||
|
CODE_FOR_avx512f_ss_truncatev16siv16qi2_mask = 5868,
|
||
|
CODE_FOR_avx512f_truncatev16siv16qi2_mask = 5869,
|
||
|
CODE_FOR_avx512f_us_truncatev16siv16qi2_mask = 5870,
|
||
|
CODE_FOR_avx512f_ss_truncatev16siv16hi2_mask = 5871,
|
||
|
CODE_FOR_avx512f_truncatev16siv16hi2_mask = 5872,
|
||
|
CODE_FOR_avx512f_us_truncatev16siv16hi2_mask = 5873,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div8si2_mask = 5874,
|
||
|
CODE_FOR_avx512f_truncatev8div8si2_mask = 5875,
|
||
|
CODE_FOR_avx512f_us_truncatev8div8si2_mask = 5876,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div8hi2_mask = 5877,
|
||
|
CODE_FOR_avx512f_truncatev8div8hi2_mask = 5878,
|
||
|
CODE_FOR_avx512f_us_truncatev8div8hi2_mask = 5879,
|
||
|
CODE_FOR_avx512bw_ss_truncatev32hiv32qi2 = 5880,
|
||
|
CODE_FOR_avx512bw_truncatev32hiv32qi2 = 5881,
|
||
|
CODE_FOR_avx512bw_us_truncatev32hiv32qi2 = 5882,
|
||
|
CODE_FOR_avx512bw_ss_truncatev32hiv32qi2_mask = 5884,
|
||
|
CODE_FOR_avx512bw_truncatev32hiv32qi2_mask = 5885,
|
||
|
CODE_FOR_avx512bw_us_truncatev32hiv32qi2_mask = 5886,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4si2_mask = 5898,
|
||
|
CODE_FOR_avx512vl_truncatev4div4si2_mask = 5899,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4si2_mask = 5900,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8siv8hi2_mask = 5901,
|
||
|
CODE_FOR_avx512vl_truncatev8siv8hi2_mask = 5902,
|
||
|
CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask = 5903,
|
||
|
CODE_FOR_avx512vl_ss_truncatev16hiv16qi2_mask = 5904,
|
||
|
CODE_FOR_avx512vl_truncatev16hiv16qi2_mask = 5905,
|
||
|
CODE_FOR_avx512vl_us_truncatev16hiv16qi2_mask = 5906,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4qi2 = 5907,
|
||
|
CODE_FOR_avx512vl_truncatev4div4qi2 = 5908,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4qi2 = 5909,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2qi2 = 5910,
|
||
|
CODE_FOR_avx512vl_truncatev2div2qi2 = 5911,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2qi2 = 5912,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8siv8qi2 = 5913,
|
||
|
CODE_FOR_avx512vl_truncatev8siv8qi2 = 5914,
|
||
|
CODE_FOR_avx512vl_us_truncatev8siv8qi2 = 5915,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4siv4qi2 = 5916,
|
||
|
CODE_FOR_avx512vl_truncatev4siv4qi2 = 5917,
|
||
|
CODE_FOR_avx512vl_us_truncatev4siv4qi2 = 5918,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8hiv8qi2 = 5919,
|
||
|
CODE_FOR_avx512vl_truncatev8hiv8qi2 = 5920,
|
||
|
CODE_FOR_avx512vl_us_truncatev8hiv8qi2 = 5921,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2qi2_mask = 5929,
|
||
|
CODE_FOR_avx512vl_truncatev2div2qi2_mask = 5930,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2qi2_mask = 5931,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2qi2_mask_store_2 = 5938,
|
||
|
CODE_FOR_avx512vl_truncatev2div2qi2_mask_store_2 = 5939,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2qi2_mask_store_2 = 5940,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4siv4qi2_mask = 5953,
|
||
|
CODE_FOR_avx512vl_truncatev4siv4qi2_mask = 5954,
|
||
|
CODE_FOR_avx512vl_us_truncatev4siv4qi2_mask = 5955,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4qi2_mask = 5956,
|
||
|
CODE_FOR_avx512vl_truncatev4div4qi2_mask = 5957,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4qi2_mask = 5958,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4siv4qi2_mask_store_2 = 5971,
|
||
|
CODE_FOR_avx512vl_truncatev4siv4qi2_mask_store_2 = 5972,
|
||
|
CODE_FOR_avx512vl_us_truncatev4siv4qi2_mask_store_2 = 5973,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4qi2_mask_store_2 = 5974,
|
||
|
CODE_FOR_avx512vl_truncatev4div4qi2_mask_store_2 = 5975,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4qi2_mask_store_2 = 5976,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8hiv8qi2_mask = 5989,
|
||
|
CODE_FOR_avx512vl_truncatev8hiv8qi2_mask = 5990,
|
||
|
CODE_FOR_avx512vl_us_truncatev8hiv8qi2_mask = 5991,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8siv8qi2_mask = 5992,
|
||
|
CODE_FOR_avx512vl_truncatev8siv8qi2_mask = 5993,
|
||
|
CODE_FOR_avx512vl_us_truncatev8siv8qi2_mask = 5994,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8hiv8qi2_mask_store_2 = 6007,
|
||
|
CODE_FOR_avx512vl_truncatev8hiv8qi2_mask_store_2 = 6008,
|
||
|
CODE_FOR_avx512vl_us_truncatev8hiv8qi2_mask_store_2 = 6009,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8siv8qi2_mask_store_2 = 6010,
|
||
|
CODE_FOR_avx512vl_truncatev8siv8qi2_mask_store_2 = 6011,
|
||
|
CODE_FOR_avx512vl_us_truncatev8siv8qi2_mask_store_2 = 6012,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4hi2 = 6013,
|
||
|
CODE_FOR_avx512vl_truncatev4div4hi2 = 6014,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4hi2 = 6015,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2hi2 = 6016,
|
||
|
CODE_FOR_avx512vl_truncatev2div2hi2 = 6017,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2hi2 = 6018,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4siv4hi2 = 6019,
|
||
|
CODE_FOR_avx512vl_truncatev4siv4hi2 = 6020,
|
||
|
CODE_FOR_avx512vl_us_truncatev4siv4hi2 = 6021,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4siv4hi2_mask = 6035,
|
||
|
CODE_FOR_avx512vl_truncatev4siv4hi2_mask = 6036,
|
||
|
CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask = 6037,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4hi2_mask = 6038,
|
||
|
CODE_FOR_avx512vl_truncatev4div4hi2_mask = 6039,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4hi2_mask = 6040,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4siv4hi2_mask_store_2 = 6053,
|
||
|
CODE_FOR_avx512vl_truncatev4siv4hi2_mask_store_2 = 6054,
|
||
|
CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask_store_2 = 6055,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4hi2_mask_store_2 = 6056,
|
||
|
CODE_FOR_avx512vl_truncatev4div4hi2_mask_store_2 = 6057,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4hi2_mask_store_2 = 6058,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2hi2_mask = 6065,
|
||
|
CODE_FOR_avx512vl_truncatev2div2hi2_mask = 6066,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2hi2_mask = 6067,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2hi2_mask_store_2 = 6074,
|
||
|
CODE_FOR_avx512vl_truncatev2div2hi2_mask_store_2 = 6075,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2hi2_mask_store_2 = 6076,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2si2 = 6077,
|
||
|
CODE_FOR_avx512vl_truncatev2div2si2 = 6078,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2si2 = 6079,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2si2_mask = 6087,
|
||
|
CODE_FOR_avx512vl_truncatev2div2si2_mask = 6088,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2si2_mask = 6089,
|
||
|
CODE_FOR_avx512vl_ss_truncatev2div2si2_mask_store_2 = 6096,
|
||
|
CODE_FOR_avx512vl_truncatev2div2si2_mask_store_2 = 6097,
|
||
|
CODE_FOR_avx512vl_us_truncatev2div2si2_mask_store_2 = 6098,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div16qi2 = 6099,
|
||
|
CODE_FOR_avx512f_truncatev8div16qi2 = 6100,
|
||
|
CODE_FOR_avx512f_us_truncatev8div16qi2 = 6101,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div16qi2_mask = 6108,
|
||
|
CODE_FOR_avx512f_truncatev8div16qi2_mask = 6109,
|
||
|
CODE_FOR_avx512f_us_truncatev8div16qi2_mask = 6110,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div16qi2_mask_store_2 = 6117,
|
||
|
CODE_FOR_avx512f_truncatev8div16qi2_mask_store_2 = 6118,
|
||
|
CODE_FOR_avx512f_us_truncatev8div16qi2_mask_store_2 = 6119,
|
||
|
CODE_FOR_avx512bw_pmaddwd512v32hi = 6246,
|
||
|
CODE_FOR_avx512bw_pmaddwd512v32hi_mask = 6247,
|
||
|
CODE_FOR_avx512bw_pmaddwd512v16hi = 6248,
|
||
|
CODE_FOR_avx512bw_pmaddwd512v16hi_mask = 6249,
|
||
|
CODE_FOR_avx512bw_pmaddwd512v8hi = 6250,
|
||
|
CODE_FOR_avx512bw_pmaddwd512v8hi_mask = 6251,
|
||
|
CODE_FOR_ashrv16hi3_mask = 6267,
|
||
|
CODE_FOR_ashrv8hi3_mask = 6269,
|
||
|
CODE_FOR_ashrv8si3_mask = 6271,
|
||
|
CODE_FOR_ashrv4si3_mask = 6273,
|
||
|
CODE_FOR_ashrv2di3_mask = 6275,
|
||
|
CODE_FOR_ashrv16hi3 = 6276,
|
||
|
CODE_FOR_ashrv8hi3 = 6277,
|
||
|
CODE_FOR_ashrv8si3 = 6278,
|
||
|
CODE_FOR_ashrv4si3 = 6279,
|
||
|
CODE_FOR_ashrv32hi3_mask = 6281,
|
||
|
CODE_FOR_ashrv4di3_mask = 6283,
|
||
|
CODE_FOR_ashrv16si3_mask = 6285,
|
||
|
CODE_FOR_ashrv8di3_mask = 6287,
|
||
|
CODE_FOR_ashlv16hi3_mask = 6289,
|
||
|
CODE_FOR_lshrv16hi3_mask = 6291,
|
||
|
CODE_FOR_ashlv8hi3_mask = 6293,
|
||
|
CODE_FOR_lshrv8hi3_mask = 6295,
|
||
|
CODE_FOR_ashlv8si3_mask = 6297,
|
||
|
CODE_FOR_lshrv8si3_mask = 6299,
|
||
|
CODE_FOR_ashlv4si3_mask = 6301,
|
||
|
CODE_FOR_lshrv4si3_mask = 6303,
|
||
|
CODE_FOR_ashlv4di3_mask = 6305,
|
||
|
CODE_FOR_lshrv4di3_mask = 6307,
|
||
|
CODE_FOR_ashlv2di3_mask = 6309,
|
||
|
CODE_FOR_lshrv2di3_mask = 6311,
|
||
|
CODE_FOR_ashlv16hi3 = 6312,
|
||
|
CODE_FOR_lshrv16hi3 = 6313,
|
||
|
CODE_FOR_ashlv8hi3 = 6314,
|
||
|
CODE_FOR_lshrv8hi3 = 6315,
|
||
|
CODE_FOR_ashlv8si3 = 6316,
|
||
|
CODE_FOR_lshrv8si3 = 6317,
|
||
|
CODE_FOR_ashlv4si3 = 6318,
|
||
|
CODE_FOR_lshrv4si3 = 6319,
|
||
|
CODE_FOR_ashlv4di3 = 6320,
|
||
|
CODE_FOR_lshrv4di3 = 6321,
|
||
|
CODE_FOR_ashlv2di3 = 6322,
|
||
|
CODE_FOR_lshrv2di3 = 6323,
|
||
|
CODE_FOR_ashlv32hi3 = 6324,
|
||
|
CODE_FOR_ashlv32hi3_mask = 6325,
|
||
|
CODE_FOR_lshrv32hi3 = 6326,
|
||
|
CODE_FOR_lshrv32hi3_mask = 6327,
|
||
|
CODE_FOR_ashlv16si3 = 6328,
|
||
|
CODE_FOR_ashlv16si3_mask = 6329,
|
||
|
CODE_FOR_lshrv16si3 = 6330,
|
||
|
CODE_FOR_lshrv16si3_mask = 6331,
|
||
|
CODE_FOR_ashlv8di3 = 6332,
|
||
|
CODE_FOR_ashlv8di3_mask = 6333,
|
||
|
CODE_FOR_lshrv8di3 = 6334,
|
||
|
CODE_FOR_lshrv8di3_mask = 6335,
|
||
|
CODE_FOR_avx512bw_ashlv4ti3 = 6336,
|
||
|
CODE_FOR_avx512bw_lshrv4ti3 = 6337,
|
||
|
CODE_FOR_avx512bw_ashlv2ti3 = 6338,
|
||
|
CODE_FOR_avx512bw_lshrv2ti3 = 6339,
|
||
|
CODE_FOR_avx512bw_ashlv1ti3 = 6340,
|
||
|
CODE_FOR_avx512bw_lshrv1ti3 = 6341,
|
||
|
CODE_FOR_avx2_ashlv2ti3 = 6342,
|
||
|
CODE_FOR_avx2_lshrv2ti3 = 6343,
|
||
|
CODE_FOR_sse2_ashlv1ti3 = 6344,
|
||
|
CODE_FOR_sse2_lshrv1ti3 = 6345,
|
||
|
CODE_FOR_avx512f_rolvv16si = 6346,
|
||
|
CODE_FOR_avx512f_rolvv16si_mask = 6347,
|
||
|
CODE_FOR_avx512f_rorvv16si = 6348,
|
||
|
CODE_FOR_avx512f_rorvv16si_mask = 6349,
|
||
|
CODE_FOR_avx512vl_rolvv8si = 6350,
|
||
|
CODE_FOR_avx512vl_rolvv8si_mask = 6351,
|
||
|
CODE_FOR_avx512vl_rorvv8si = 6352,
|
||
|
CODE_FOR_avx512vl_rorvv8si_mask = 6353,
|
||
|
CODE_FOR_avx512vl_rolvv4si = 6354,
|
||
|
CODE_FOR_avx512vl_rolvv4si_mask = 6355,
|
||
|
CODE_FOR_avx512vl_rorvv4si = 6356,
|
||
|
CODE_FOR_avx512vl_rorvv4si_mask = 6357,
|
||
|
CODE_FOR_avx512f_rolvv8di = 6358,
|
||
|
CODE_FOR_avx512f_rolvv8di_mask = 6359,
|
||
|
CODE_FOR_avx512f_rorvv8di = 6360,
|
||
|
CODE_FOR_avx512f_rorvv8di_mask = 6361,
|
||
|
CODE_FOR_avx512vl_rolvv4di = 6362,
|
||
|
CODE_FOR_avx512vl_rolvv4di_mask = 6363,
|
||
|
CODE_FOR_avx512vl_rorvv4di = 6364,
|
||
|
CODE_FOR_avx512vl_rorvv4di_mask = 6365,
|
||
|
CODE_FOR_avx512vl_rolvv2di = 6366,
|
||
|
CODE_FOR_avx512vl_rolvv2di_mask = 6367,
|
||
|
CODE_FOR_avx512vl_rorvv2di = 6368,
|
||
|
CODE_FOR_avx512vl_rorvv2di_mask = 6369,
|
||
|
CODE_FOR_avx512f_rolv16si = 6370,
|
||
|
CODE_FOR_avx512f_rolv16si_mask = 6371,
|
||
|
CODE_FOR_avx512f_rorv16si = 6372,
|
||
|
CODE_FOR_avx512f_rorv16si_mask = 6373,
|
||
|
CODE_FOR_avx512vl_rolv8si = 6374,
|
||
|
CODE_FOR_avx512vl_rolv8si_mask = 6375,
|
||
|
CODE_FOR_avx512vl_rorv8si = 6376,
|
||
|
CODE_FOR_avx512vl_rorv8si_mask = 6377,
|
||
|
CODE_FOR_avx512vl_rolv4si = 6378,
|
||
|
CODE_FOR_avx512vl_rolv4si_mask = 6379,
|
||
|
CODE_FOR_avx512vl_rorv4si = 6380,
|
||
|
CODE_FOR_avx512vl_rorv4si_mask = 6381,
|
||
|
CODE_FOR_avx512f_rolv8di = 6382,
|
||
|
CODE_FOR_avx512f_rolv8di_mask = 6383,
|
||
|
CODE_FOR_avx512f_rorv8di = 6384,
|
||
|
CODE_FOR_avx512f_rorv8di_mask = 6385,
|
||
|
CODE_FOR_avx512vl_rolv4di = 6386,
|
||
|
CODE_FOR_avx512vl_rolv4di_mask = 6387,
|
||
|
CODE_FOR_avx512vl_rorv4di = 6388,
|
||
|
CODE_FOR_avx512vl_rorv4di_mask = 6389,
|
||
|
CODE_FOR_avx512vl_rolv2di = 6390,
|
||
|
CODE_FOR_avx512vl_rolv2di_mask = 6391,
|
||
|
CODE_FOR_avx512vl_rorv2di = 6392,
|
||
|
CODE_FOR_avx512vl_rorv2di_mask = 6393,
|
||
|
CODE_FOR_smaxv64qi3_mask = 6455,
|
||
|
CODE_FOR_sminv64qi3_mask = 6457,
|
||
|
CODE_FOR_umaxv64qi3_mask = 6459,
|
||
|
CODE_FOR_uminv64qi3_mask = 6461,
|
||
|
CODE_FOR_smaxv16qi3_mask = 6463,
|
||
|
CODE_FOR_sminv16qi3_mask = 6465,
|
||
|
CODE_FOR_umaxv16qi3_mask = 6467,
|
||
|
CODE_FOR_uminv16qi3_mask = 6469,
|
||
|
CODE_FOR_smaxv32qi3_mask = 6471,
|
||
|
CODE_FOR_sminv32qi3_mask = 6473,
|
||
|
CODE_FOR_umaxv32qi3_mask = 6475,
|
||
|
CODE_FOR_uminv32qi3_mask = 6477,
|
||
|
CODE_FOR_smaxv32hi3_mask = 6479,
|
||
|
CODE_FOR_sminv32hi3_mask = 6481,
|
||
|
CODE_FOR_umaxv32hi3_mask = 6483,
|
||
|
CODE_FOR_uminv32hi3_mask = 6485,
|
||
|
CODE_FOR_smaxv16hi3_mask = 6487,
|
||
|
CODE_FOR_sminv16hi3_mask = 6489,
|
||
|
CODE_FOR_umaxv16hi3_mask = 6491,
|
||
|
CODE_FOR_uminv16hi3_mask = 6493,
|
||
|
CODE_FOR_smaxv8hi3_mask = 6495,
|
||
|
CODE_FOR_sminv8hi3_mask = 6497,
|
||
|
CODE_FOR_umaxv8hi3_mask = 6499,
|
||
|
CODE_FOR_uminv8hi3_mask = 6501,
|
||
|
CODE_FOR_sse4_2_gtv2di3 = 6552,
|
||
|
CODE_FOR_avx2_gtv32qi3 = 6553,
|
||
|
CODE_FOR_avx2_gtv16hi3 = 6554,
|
||
|
CODE_FOR_avx2_gtv8si3 = 6555,
|
||
|
CODE_FOR_avx2_gtv4di3 = 6556,
|
||
|
CODE_FOR_one_cmplv16si2_mask = 6561,
|
||
|
CODE_FOR_one_cmplv8di2_mask = 6563,
|
||
|
CODE_FOR_one_cmplv64qi2_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_one_cmplv32qi2_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_one_cmplv16qi2_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_one_cmplv32hi2_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_one_cmplv16hi2_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_one_cmplv8hi2_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_one_cmplv8si2_mask = 6571,
|
||
|
CODE_FOR_one_cmplv4si2_mask = 6573,
|
||
|
CODE_FOR_one_cmplv4di2_mask = 6575,
|
||
|
CODE_FOR_one_cmplv2di2_mask = 6577,
|
||
|
CODE_FOR_andv1ti3 = 6650,
|
||
|
CODE_FOR_iorv1ti3 = 6651,
|
||
|
CODE_FOR_xorv1ti3 = 6652,
|
||
|
CODE_FOR_avx512bw_testmv64qi3 = 6653,
|
||
|
CODE_FOR_avx512bw_testmv64qi3_mask = 6654,
|
||
|
CODE_FOR_avx512vl_testmv32qi3 = 6655,
|
||
|
CODE_FOR_avx512vl_testmv32qi3_mask = 6656,
|
||
|
CODE_FOR_avx512vl_testmv16qi3 = 6657,
|
||
|
CODE_FOR_avx512vl_testmv16qi3_mask = 6658,
|
||
|
CODE_FOR_avx512bw_testmv32hi3 = 6659,
|
||
|
CODE_FOR_avx512bw_testmv32hi3_mask = 6660,
|
||
|
CODE_FOR_avx512vl_testmv16hi3 = 6661,
|
||
|
CODE_FOR_avx512vl_testmv16hi3_mask = 6662,
|
||
|
CODE_FOR_avx512vl_testmv8hi3 = 6663,
|
||
|
CODE_FOR_avx512vl_testmv8hi3_mask = 6664,
|
||
|
CODE_FOR_avx512f_testmv16si3 = 6665,
|
||
|
CODE_FOR_avx512f_testmv16si3_mask = 6666,
|
||
|
CODE_FOR_avx512vl_testmv8si3 = 6667,
|
||
|
CODE_FOR_avx512vl_testmv8si3_mask = 6668,
|
||
|
CODE_FOR_avx512vl_testmv4si3 = 6669,
|
||
|
CODE_FOR_avx512vl_testmv4si3_mask = 6670,
|
||
|
CODE_FOR_avx512f_testmv8di3 = 6671,
|
||
|
CODE_FOR_avx512f_testmv8di3_mask = 6672,
|
||
|
CODE_FOR_avx512vl_testmv4di3 = 6673,
|
||
|
CODE_FOR_avx512vl_testmv4di3_mask = 6674,
|
||
|
CODE_FOR_avx512vl_testmv2di3 = 6675,
|
||
|
CODE_FOR_avx512vl_testmv2di3_mask = 6676,
|
||
|
CODE_FOR_avx512bw_testnmv64qi3 = 6677,
|
||
|
CODE_FOR_avx512bw_testnmv64qi3_mask = 6678,
|
||
|
CODE_FOR_avx512vl_testnmv32qi3 = 6679,
|
||
|
CODE_FOR_avx512vl_testnmv32qi3_mask = 6680,
|
||
|
CODE_FOR_avx512vl_testnmv16qi3 = 6681,
|
||
|
CODE_FOR_avx512vl_testnmv16qi3_mask = 6682,
|
||
|
CODE_FOR_avx512bw_testnmv32hi3 = 6683,
|
||
|
CODE_FOR_avx512bw_testnmv32hi3_mask = 6684,
|
||
|
CODE_FOR_avx512vl_testnmv16hi3 = 6685,
|
||
|
CODE_FOR_avx512vl_testnmv16hi3_mask = 6686,
|
||
|
CODE_FOR_avx512vl_testnmv8hi3 = 6687,
|
||
|
CODE_FOR_avx512vl_testnmv8hi3_mask = 6688,
|
||
|
CODE_FOR_avx512f_testnmv16si3 = 6689,
|
||
|
CODE_FOR_avx512f_testnmv16si3_mask = 6690,
|
||
|
CODE_FOR_avx512vl_testnmv8si3 = 6691,
|
||
|
CODE_FOR_avx512vl_testnmv8si3_mask = 6692,
|
||
|
CODE_FOR_avx512vl_testnmv4si3 = 6693,
|
||
|
CODE_FOR_avx512vl_testnmv4si3_mask = 6694,
|
||
|
CODE_FOR_avx512f_testnmv8di3 = 6695,
|
||
|
CODE_FOR_avx512f_testnmv8di3_mask = 6696,
|
||
|
CODE_FOR_avx512vl_testnmv4di3 = 6697,
|
||
|
CODE_FOR_avx512vl_testnmv4di3_mask = 6698,
|
||
|
CODE_FOR_avx512vl_testnmv2di3 = 6699,
|
||
|
CODE_FOR_avx512vl_testnmv2di3_mask = 6700,
|
||
|
CODE_FOR_avx512bw_packsswb = 6845,
|
||
|
CODE_FOR_avx512bw_packsswb_mask = 6846,
|
||
|
CODE_FOR_avx2_packsswb = 6847,
|
||
|
CODE_FOR_avx2_packsswb_mask = 6848,
|
||
|
CODE_FOR_sse2_packsswb = 6849,
|
||
|
CODE_FOR_sse2_packsswb_mask = 6850,
|
||
|
CODE_FOR_avx512bw_packssdw = 6851,
|
||
|
CODE_FOR_avx512bw_packssdw_mask = 6852,
|
||
|
CODE_FOR_avx2_packssdw = 6853,
|
||
|
CODE_FOR_avx2_packssdw_mask = 6854,
|
||
|
CODE_FOR_sse2_packssdw = 6855,
|
||
|
CODE_FOR_sse2_packssdw_mask = 6856,
|
||
|
CODE_FOR_avx512bw_packuswb = 6857,
|
||
|
CODE_FOR_avx512bw_packuswb_mask = 6858,
|
||
|
CODE_FOR_avx2_packuswb = 6859,
|
||
|
CODE_FOR_avx2_packuswb_mask = 6860,
|
||
|
CODE_FOR_sse2_packuswb = 6861,
|
||
|
CODE_FOR_sse2_packuswb_mask = 6862,
|
||
|
CODE_FOR_avx512bw_interleave_highv64qi = 6863,
|
||
|
CODE_FOR_avx512bw_interleave_highv64qi_mask = 6864,
|
||
|
CODE_FOR_avx2_interleave_highv32qi = 6865,
|
||
|
CODE_FOR_avx2_interleave_highv32qi_mask = 6866,
|
||
|
CODE_FOR_vec_interleave_highv16qi = 6867,
|
||
|
CODE_FOR_vec_interleave_highv16qi_mask = 6868,
|
||
|
CODE_FOR_avx512bw_interleave_lowv64qi = 6869,
|
||
|
CODE_FOR_avx512bw_interleave_lowv64qi_mask = 6870,
|
||
|
CODE_FOR_avx2_interleave_lowv32qi = 6871,
|
||
|
CODE_FOR_avx2_interleave_lowv32qi_mask = 6872,
|
||
|
CODE_FOR_vec_interleave_lowv16qi = 6873,
|
||
|
CODE_FOR_vec_interleave_lowv16qi_mask = 6874,
|
||
|
CODE_FOR_avx512bw_interleave_highv32hi = 6875,
|
||
|
CODE_FOR_avx512bw_interleave_highv32hi_mask = 6876,
|
||
|
CODE_FOR_avx512bw_interleave_highv32hf = 6877,
|
||
|
CODE_FOR_avx512bw_interleave_highv32hf_mask = 6878,
|
||
|
CODE_FOR_avx2_interleave_highv16hi = 6879,
|
||
|
CODE_FOR_avx2_interleave_highv16hi_mask = 6880,
|
||
|
CODE_FOR_avx2_interleave_highv16hf = 6881,
|
||
|
CODE_FOR_avx2_interleave_highv16hf_mask = 6882,
|
||
|
CODE_FOR_vec_interleave_highv8hi = 6883,
|
||
|
CODE_FOR_vec_interleave_highv8hi_mask = 6884,
|
||
|
CODE_FOR_vec_interleave_highv8hf = 6885,
|
||
|
CODE_FOR_vec_interleave_highv8hf_mask = 6886,
|
||
|
CODE_FOR_avx512bw_interleave_lowv32hi_mask = 6888,
|
||
|
CODE_FOR_avx512bw_interleave_lowv32hf_mask = 6890,
|
||
|
CODE_FOR_avx2_interleave_lowv16hi = 6891,
|
||
|
CODE_FOR_avx2_interleave_lowv16hi_mask = 6892,
|
||
|
CODE_FOR_avx2_interleave_lowv16hf = 6893,
|
||
|
CODE_FOR_avx2_interleave_lowv16hf_mask = 6894,
|
||
|
CODE_FOR_vec_interleave_lowv8hi = 6895,
|
||
|
CODE_FOR_vec_interleave_lowv8hi_mask = 6896,
|
||
|
CODE_FOR_vec_interleave_lowv8hf = 6897,
|
||
|
CODE_FOR_vec_interleave_lowv8hf_mask = 6898,
|
||
|
CODE_FOR_avx2_interleave_highv8si = 6899,
|
||
|
CODE_FOR_avx2_interleave_highv8si_mask = 6900,
|
||
|
CODE_FOR_avx512f_interleave_highv16si_mask = 6902,
|
||
|
CODE_FOR_vec_interleave_highv4si = 6903,
|
||
|
CODE_FOR_vec_interleave_highv4si_mask = 6904,
|
||
|
CODE_FOR_avx2_interleave_lowv8si = 6905,
|
||
|
CODE_FOR_avx2_interleave_lowv8si_mask = 6906,
|
||
|
CODE_FOR_avx512f_interleave_lowv16si_mask = 6908,
|
||
|
CODE_FOR_vec_interleave_lowv4si = 6909,
|
||
|
CODE_FOR_vec_interleave_lowv4si_mask = 6910,
|
||
|
CODE_FOR_sse4_1_pinsrb = 6911,
|
||
|
CODE_FOR_sse2_pinsrw = 6912,
|
||
|
CODE_FOR_sse2_pinsrph = 6913,
|
||
|
CODE_FOR_sse4_1_pinsrd = 6914,
|
||
|
CODE_FOR_sse4_1_pinsrq = 6915,
|
||
|
CODE_FOR_avx512dq_vinsertf64x2_1_mask = 6921,
|
||
|
CODE_FOR_avx512dq_vinserti64x2_1_mask = 6923,
|
||
|
CODE_FOR_avx512f_vinsertf32x4_1_mask = 6925,
|
||
|
CODE_FOR_avx512f_vinserti32x4_1_mask = 6927,
|
||
|
CODE_FOR_vec_set_lo_v16sf = 6928,
|
||
|
CODE_FOR_vec_set_lo_v16sf_mask = 6929,
|
||
|
CODE_FOR_vec_set_lo_v16si = 6930,
|
||
|
CODE_FOR_vec_set_lo_v16si_mask = 6931,
|
||
|
CODE_FOR_vec_set_hi_v16sf = 6932,
|
||
|
CODE_FOR_vec_set_hi_v16sf_mask = 6933,
|
||
|
CODE_FOR_vec_set_hi_v16si = 6934,
|
||
|
CODE_FOR_vec_set_hi_v16si_mask = 6935,
|
||
|
CODE_FOR_vec_set_lo_v8df = 6936,
|
||
|
CODE_FOR_vec_set_lo_v8df_mask = 6937,
|
||
|
CODE_FOR_vec_set_lo_v8di = 6938,
|
||
|
CODE_FOR_vec_set_lo_v8di_mask = 6939,
|
||
|
CODE_FOR_vec_set_hi_v8df = 6940,
|
||
|
CODE_FOR_vec_set_hi_v8df_mask = 6941,
|
||
|
CODE_FOR_vec_set_hi_v8di = 6942,
|
||
|
CODE_FOR_vec_set_hi_v8di_mask = 6943,
|
||
|
CODE_FOR_avx512dq_shuf_i64x2_1_mask = 6945,
|
||
|
CODE_FOR_avx512dq_shuf_f64x2_1_mask = 6947,
|
||
|
CODE_FOR_avx512f_shuf_f64x2_1 = 6948,
|
||
|
CODE_FOR_avx512f_shuf_f64x2_1_mask = 6949,
|
||
|
CODE_FOR_avx512f_shuf_i64x2_1 = 6950,
|
||
|
CODE_FOR_avx512f_shuf_i64x2_1_mask = 6951,
|
||
|
CODE_FOR_avx512vl_shuf_i32x4_1 = 6956,
|
||
|
CODE_FOR_avx512vl_shuf_i32x4_1_mask = 6957,
|
||
|
CODE_FOR_avx512vl_shuf_f32x4_1 = 6958,
|
||
|
CODE_FOR_avx512vl_shuf_f32x4_1_mask = 6959,
|
||
|
CODE_FOR_avx512f_shuf_f32x4_1 = 6960,
|
||
|
CODE_FOR_avx512f_shuf_f32x4_1_mask = 6961,
|
||
|
CODE_FOR_avx512f_shuf_i32x4_1 = 6962,
|
||
|
CODE_FOR_avx512f_shuf_i32x4_1_mask = 6963,
|
||
|
CODE_FOR_avx512f_pshufd_1 = 6968,
|
||
|
CODE_FOR_avx512f_pshufd_1_mask = 6969,
|
||
|
CODE_FOR_avx2_pshufd_1 = 6970,
|
||
|
CODE_FOR_avx2_pshufd_1_mask = 6971,
|
||
|
CODE_FOR_sse2_pshufd_1 = 6972,
|
||
|
CODE_FOR_sse2_pshufd_1_mask = 6973,
|
||
|
CODE_FOR_avx512bw_pshuflwv32hi_mask = 6975,
|
||
|
CODE_FOR_avx2_pshuflw_1 = 6976,
|
||
|
CODE_FOR_avx2_pshuflw_1_mask = 6977,
|
||
|
CODE_FOR_sse2_pshuflw_1 = 6978,
|
||
|
CODE_FOR_sse2_pshuflw_1_mask = 6979,
|
||
|
CODE_FOR_avx512bw_pshufhwv32hi_mask = 6981,
|
||
|
CODE_FOR_avx2_pshufhw_1 = 6982,
|
||
|
CODE_FOR_avx2_pshufhw_1_mask = 6983,
|
||
|
CODE_FOR_sse2_pshufhw_1 = 6984,
|
||
|
CODE_FOR_sse2_pshufhw_1_mask = 6985,
|
||
|
CODE_FOR_sse2_loadld = 6986,
|
||
|
CODE_FOR_vec_concatv2di = 7014,
|
||
|
CODE_FOR_vec_setv8di_0 = 7016,
|
||
|
CODE_FOR_vec_setv4di_0 = 7017,
|
||
|
CODE_FOR_avx512f_psadbw = 7030,
|
||
|
CODE_FOR_avx2_psadbw = 7031,
|
||
|
CODE_FOR_sse2_psadbw = 7032,
|
||
|
CODE_FOR_avx_movmskps256 = 7033,
|
||
|
CODE_FOR_sse_movmskps = 7034,
|
||
|
CODE_FOR_avx_movmskpd256 = 7035,
|
||
|
CODE_FOR_sse2_movmskpd = 7036,
|
||
|
CODE_FOR_avx2_pmovmskb = 7069,
|
||
|
CODE_FOR_sse2_pmovmskb = 7070,
|
||
|
CODE_FOR_sse_ldmxcsr = 7082,
|
||
|
CODE_FOR_sse_stmxcsr = 7083,
|
||
|
CODE_FOR_sse2_clflush = 7084,
|
||
|
CODE_FOR_sse3_mwait = 7085,
|
||
|
CODE_FOR_sse3_monitor_si = 7086,
|
||
|
CODE_FOR_sse3_monitor_di = 7087,
|
||
|
CODE_FOR_avx2_phaddwv16hi3 = 7088,
|
||
|
CODE_FOR_avx2_phaddswv16hi3 = 7089,
|
||
|
CODE_FOR_avx2_phsubwv16hi3 = 7090,
|
||
|
CODE_FOR_avx2_phsubswv16hi3 = 7091,
|
||
|
CODE_FOR_ssse3_phaddwv8hi3 = 7092,
|
||
|
CODE_FOR_ssse3_phaddswv8hi3 = 7093,
|
||
|
CODE_FOR_ssse3_phsubwv8hi3 = 7094,
|
||
|
CODE_FOR_ssse3_phsubswv8hi3 = 7095,
|
||
|
CODE_FOR_ssse3_phaddwv4hi3 = 7096,
|
||
|
CODE_FOR_ssse3_phaddswv4hi3 = 7097,
|
||
|
CODE_FOR_ssse3_phsubwv4hi3 = 7098,
|
||
|
CODE_FOR_ssse3_phsubswv4hi3 = 7099,
|
||
|
CODE_FOR_avx2_phadddv8si3 = 7100,
|
||
|
CODE_FOR_avx2_phsubdv8si3 = 7101,
|
||
|
CODE_FOR_ssse3_phadddv4si3 = 7102,
|
||
|
CODE_FOR_ssse3_phsubdv4si3 = 7103,
|
||
|
CODE_FOR_ssse3_phadddv2si3 = 7104,
|
||
|
CODE_FOR_ssse3_phsubdv2si3 = 7105,
|
||
|
CODE_FOR_avx2_pmaddubsw256 = 7106,
|
||
|
CODE_FOR_avx512bw_pmaddubsw512v8hi = 7107,
|
||
|
CODE_FOR_avx512bw_pmaddubsw512v8hi_mask = 7108,
|
||
|
CODE_FOR_avx512bw_pmaddubsw512v16hi = 7109,
|
||
|
CODE_FOR_avx512bw_pmaddubsw512v16hi_mask = 7110,
|
||
|
CODE_FOR_avx512bw_pmaddubsw512v32hi = 7111,
|
||
|
CODE_FOR_avx512bw_pmaddubsw512v32hi_mask = 7112,
|
||
|
CODE_FOR_avx512bw_umulhrswv32hi3 = 7113,
|
||
|
CODE_FOR_avx512bw_umulhrswv32hi3_mask = 7114,
|
||
|
CODE_FOR_ssse3_pmaddubsw128 = 7115,
|
||
|
CODE_FOR_ssse3_pmaddubsw = 7116,
|
||
|
CODE_FOR_avx512bw_pshufbv64qi3 = 7125,
|
||
|
CODE_FOR_avx512bw_pshufbv64qi3_mask = 7126,
|
||
|
CODE_FOR_avx2_pshufbv32qi3 = 7127,
|
||
|
CODE_FOR_avx2_pshufbv32qi3_mask = 7128,
|
||
|
CODE_FOR_ssse3_pshufbv16qi3 = 7129,
|
||
|
CODE_FOR_ssse3_pshufbv16qi3_mask = 7130,
|
||
|
CODE_FOR_avx2_psignv32qi3 = 7132,
|
||
|
CODE_FOR_ssse3_psignv16qi3 = 7133,
|
||
|
CODE_FOR_avx2_psignv16hi3 = 7134,
|
||
|
CODE_FOR_ssse3_psignv8hi3 = 7135,
|
||
|
CODE_FOR_avx2_psignv8si3 = 7136,
|
||
|
CODE_FOR_ssse3_psignv4si3 = 7137,
|
||
|
CODE_FOR_ssse3_psignv8qi3 = 7138,
|
||
|
CODE_FOR_ssse3_psignv4hi3 = 7139,
|
||
|
CODE_FOR_ssse3_psignv2si3 = 7140,
|
||
|
CODE_FOR_avx512bw_palignrv64qi_mask = 7141,
|
||
|
CODE_FOR_avx2_palignrv32qi_mask = 7142,
|
||
|
CODE_FOR_ssse3_palignrv16qi_mask = 7143,
|
||
|
CODE_FOR_avx512bw_palignrv4ti = 7144,
|
||
|
CODE_FOR_avx2_palignrv2ti = 7145,
|
||
|
CODE_FOR_ssse3_palignrti = 7146,
|
||
|
CODE_FOR_ssse3_palignrdi = 7147,
|
||
|
CODE_FOR_absv16si2_mask = 7160,
|
||
|
CODE_FOR_absv8si2_mask = 7161,
|
||
|
CODE_FOR_absv4si2_mask = 7162,
|
||
|
CODE_FOR_absv8di2_mask = 7163,
|
||
|
CODE_FOR_absv4di2_mask = 7164,
|
||
|
CODE_FOR_absv2di2_mask = 7165,
|
||
|
CODE_FOR_absv64qi2_mask = 7166,
|
||
|
CODE_FOR_absv16qi2_mask = 7167,
|
||
|
CODE_FOR_absv32qi2_mask = 7168,
|
||
|
CODE_FOR_absv32hi2_mask = 7169,
|
||
|
CODE_FOR_absv16hi2_mask = 7170,
|
||
|
CODE_FOR_absv8hi2_mask = 7171,
|
||
|
CODE_FOR_sse4a_movntsf = 7172,
|
||
|
CODE_FOR_sse4a_movntdf = 7173,
|
||
|
CODE_FOR_sse4a_vmmovntv4sf = 7174,
|
||
|
CODE_FOR_sse4a_vmmovntv2df = 7175,
|
||
|
CODE_FOR_sse4a_extrqi = 7176,
|
||
|
CODE_FOR_sse4a_extrq = 7177,
|
||
|
CODE_FOR_sse4a_insertqi = 7178,
|
||
|
CODE_FOR_sse4a_insertq = 7179,
|
||
|
CODE_FOR_avx_blendps256 = 7180,
|
||
|
CODE_FOR_sse4_1_blendps = 7181,
|
||
|
CODE_FOR_avx_blendpd256 = 7182,
|
||
|
CODE_FOR_sse4_1_blendpd = 7183,
|
||
|
CODE_FOR_avx_blendvps256 = 7184,
|
||
|
CODE_FOR_sse4_1_blendvps = 7185,
|
||
|
CODE_FOR_avx_blendvpd256 = 7186,
|
||
|
CODE_FOR_sse4_1_blendvpd = 7187,
|
||
|
CODE_FOR_sse4_1_blendvss = 7188,
|
||
|
CODE_FOR_sse4_1_blendvsd = 7189,
|
||
|
CODE_FOR_avx_dpps256 = 7202,
|
||
|
CODE_FOR_sse4_1_dpps = 7203,
|
||
|
CODE_FOR_avx_dppd256 = 7204,
|
||
|
CODE_FOR_sse4_1_dppd = 7205,
|
||
|
CODE_FOR_avx512f_movntdqa = 7206,
|
||
|
CODE_FOR_avx2_movntdqa = 7207,
|
||
|
CODE_FOR_sse4_1_movntdqa = 7208,
|
||
|
CODE_FOR_avx2_mpsadbw = 7209,
|
||
|
CODE_FOR_sse4_1_mpsadbw = 7210,
|
||
|
CODE_FOR_avx512bw_packusdw = 7211,
|
||
|
CODE_FOR_avx512bw_packusdw_mask = 7212,
|
||
|
CODE_FOR_avx2_packusdw = 7213,
|
||
|
CODE_FOR_avx2_packusdw_mask = 7214,
|
||
|
CODE_FOR_sse4_1_packusdw = 7215,
|
||
|
CODE_FOR_sse4_1_packusdw_mask = 7216,
|
||
|
CODE_FOR_avx2_pblendvb = 7217,
|
||
|
CODE_FOR_sse4_1_pblendvb = 7218,
|
||
|
CODE_FOR_sse4_1_pblendw = 7223,
|
||
|
CODE_FOR_sse4_1_pblendph = 7224,
|
||
|
CODE_FOR_avx2_pblenddv8si = 7227,
|
||
|
CODE_FOR_avx2_pblenddv4si = 7228,
|
||
|
CODE_FOR_sse4_1_phminposuw = 7229,
|
||
|
CODE_FOR_avx2_sign_extendv16qiv16hi2 = 7230,
|
||
|
CODE_FOR_avx2_sign_extendv16qiv16hi2_mask = 7231,
|
||
|
CODE_FOR_avx2_zero_extendv16qiv16hi2 = 7232,
|
||
|
CODE_FOR_avx2_zero_extendv16qiv16hi2_mask = 7233,
|
||
|
CODE_FOR_avx512bw_sign_extendv32qiv32hi2 = 7238,
|
||
|
CODE_FOR_avx512bw_sign_extendv32qiv32hi2_mask = 7239,
|
||
|
CODE_FOR_avx512bw_zero_extendv32qiv32hi2 = 7240,
|
||
|
CODE_FOR_avx512bw_zero_extendv32qiv32hi2_mask = 7241,
|
||
|
CODE_FOR_sse4_1_sign_extendv8qiv8hi2 = 7246,
|
||
|
CODE_FOR_sse4_1_sign_extendv8qiv8hi2_mask = 7247,
|
||
|
CODE_FOR_sse4_1_zero_extendv8qiv8hi2 = 7248,
|
||
|
CODE_FOR_sse4_1_zero_extendv8qiv8hi2_mask = 7249,
|
||
|
CODE_FOR_avx512f_sign_extendv16qiv16si2_mask = 7263,
|
||
|
CODE_FOR_avx512f_zero_extendv16qiv16si2_mask = 7265,
|
||
|
CODE_FOR_avx2_sign_extendv8qiv8si2 = 7266,
|
||
|
CODE_FOR_avx2_sign_extendv8qiv8si2_mask = 7267,
|
||
|
CODE_FOR_avx2_zero_extendv8qiv8si2 = 7268,
|
||
|
CODE_FOR_avx2_zero_extendv8qiv8si2_mask = 7269,
|
||
|
CODE_FOR_sse4_1_sign_extendv4qiv4si2 = 7278,
|
||
|
CODE_FOR_sse4_1_sign_extendv4qiv4si2_mask = 7279,
|
||
|
CODE_FOR_sse4_1_zero_extendv4qiv4si2 = 7280,
|
||
|
CODE_FOR_sse4_1_zero_extendv4qiv4si2_mask = 7281,
|
||
|
CODE_FOR_avx512f_sign_extendv16hiv16si2 = 7290,
|
||
|
CODE_FOR_avx512f_sign_extendv16hiv16si2_mask = 7291,
|
||
|
CODE_FOR_avx512f_zero_extendv16hiv16si2 = 7292,
|
||
|
CODE_FOR_avx512f_zero_extendv16hiv16si2_mask = 7293,
|
||
|
CODE_FOR_avx512f_zero_extendv16hiv16si2_1 = 7294,
|
||
|
CODE_FOR_avx2_sign_extendv8hiv8si2 = 7298,
|
||
|
CODE_FOR_avx2_sign_extendv8hiv8si2_mask = 7299,
|
||
|
CODE_FOR_avx2_zero_extendv8hiv8si2 = 7300,
|
||
|
CODE_FOR_avx2_zero_extendv8hiv8si2_mask = 7301,
|
||
|
CODE_FOR_avx2_zero_extendv8hiv8si2_1 = 7302,
|
||
|
CODE_FOR_sse4_1_sign_extendv4hiv4si2 = 7306,
|
||
|
CODE_FOR_sse4_1_sign_extendv4hiv4si2_mask = 7307,
|
||
|
CODE_FOR_sse4_1_zero_extendv4hiv4si2 = 7308,
|
||
|
CODE_FOR_sse4_1_zero_extendv4hiv4si2_mask = 7309,
|
||
|
CODE_FOR_avx512f_sign_extendv8qiv8di2 = 7322,
|
||
|
CODE_FOR_avx512f_sign_extendv8qiv8di2_mask = 7323,
|
||
|
CODE_FOR_avx512f_zero_extendv8qiv8di2 = 7324,
|
||
|
CODE_FOR_avx512f_zero_extendv8qiv8di2_mask = 7325,
|
||
|
CODE_FOR_avx2_sign_extendv4qiv4di2 = 7334,
|
||
|
CODE_FOR_avx2_sign_extendv4qiv4di2_mask = 7335,
|
||
|
CODE_FOR_avx2_zero_extendv4qiv4di2 = 7336,
|
||
|
CODE_FOR_avx2_zero_extendv4qiv4di2_mask = 7337,
|
||
|
CODE_FOR_sse4_1_sign_extendv2qiv2di2 = 7346,
|
||
|
CODE_FOR_sse4_1_sign_extendv2qiv2di2_mask = 7347,
|
||
|
CODE_FOR_sse4_1_zero_extendv2qiv2di2 = 7348,
|
||
|
CODE_FOR_sse4_1_zero_extendv2qiv2di2_mask = 7349,
|
||
|
CODE_FOR_avx512f_sign_extendv8hiv8di2 = 7350,
|
||
|
CODE_FOR_avx512f_sign_extendv8hiv8di2_mask = 7351,
|
||
|
CODE_FOR_avx512f_zero_extendv8hiv8di2 = 7352,
|
||
|
CODE_FOR_avx512f_zero_extendv8hiv8di2_mask = 7353,
|
||
|
CODE_FOR_avx2_sign_extendv4hiv4di2 = 7354,
|
||
|
CODE_FOR_avx2_sign_extendv4hiv4di2_mask = 7355,
|
||
|
CODE_FOR_avx2_zero_extendv4hiv4di2 = 7356,
|
||
|
CODE_FOR_avx2_zero_extendv4hiv4di2_mask = 7357,
|
||
|
CODE_FOR_sse4_1_sign_extendv2hiv2di2 = 7366,
|
||
|
CODE_FOR_sse4_1_sign_extendv2hiv2di2_mask = 7367,
|
||
|
CODE_FOR_sse4_1_zero_extendv2hiv2di2 = 7368,
|
||
|
CODE_FOR_sse4_1_zero_extendv2hiv2di2_mask = 7369,
|
||
|
CODE_FOR_avx512f_sign_extendv8siv8di2 = 7378,
|
||
|
CODE_FOR_avx512f_sign_extendv8siv8di2_mask = 7379,
|
||
|
CODE_FOR_avx512f_zero_extendv8siv8di2 = 7380,
|
||
|
CODE_FOR_avx512f_zero_extendv8siv8di2_mask = 7381,
|
||
|
CODE_FOR_avx2_sign_extendv4siv4di2 = 7384,
|
||
|
CODE_FOR_avx2_sign_extendv4siv4di2_mask = 7385,
|
||
|
CODE_FOR_avx2_zero_extendv4siv4di2 = 7386,
|
||
|
CODE_FOR_avx2_zero_extendv4siv4di2_mask = 7387,
|
||
|
CODE_FOR_sse4_1_sign_extendv2siv2di2 = 7390,
|
||
|
CODE_FOR_sse4_1_sign_extendv2siv2di2_mask = 7391,
|
||
|
CODE_FOR_sse4_1_zero_extendv2siv2di2 = 7392,
|
||
|
CODE_FOR_sse4_1_zero_extendv2siv2di2_mask = 7393,
|
||
|
CODE_FOR_avx_vtestps256 = 7404,
|
||
|
CODE_FOR_avx_vtestps = 7405,
|
||
|
CODE_FOR_avx_vtestpd256 = 7406,
|
||
|
CODE_FOR_avx_vtestpd = 7407,
|
||
|
CODE_FOR_sse4_1_ptestv16qi = 7408,
|
||
|
CODE_FOR_sse4_1_ptestv8hi = 7409,
|
||
|
CODE_FOR_sse4_1_ptestv4si = 7410,
|
||
|
CODE_FOR_sse4_1_ptestv2di = 7411,
|
||
|
CODE_FOR_sse4_1_ptestv4sf = 7412,
|
||
|
CODE_FOR_sse4_1_ptestv2df = 7413,
|
||
|
CODE_FOR_avx_ptestv32qi = 7414,
|
||
|
CODE_FOR_avx_ptestv16hi = 7415,
|
||
|
CODE_FOR_avx_ptestv8si = 7416,
|
||
|
CODE_FOR_avx_ptestv4di = 7417,
|
||
|
CODE_FOR_avx_ptestv8sf = 7418,
|
||
|
CODE_FOR_avx_ptestv4df = 7419,
|
||
|
CODE_FOR_ptesttf2 = 7420,
|
||
|
CODE_FOR_avx_roundps256 = 7421,
|
||
|
CODE_FOR_sse4_1_roundps = 7422,
|
||
|
CODE_FOR_avx_roundpd256 = 7423,
|
||
|
CODE_FOR_sse4_1_roundpd = 7424,
|
||
|
CODE_FOR_sse4_1_roundss = 7425,
|
||
|
CODE_FOR_sse4_1_roundsd = 7426,
|
||
|
CODE_FOR_sse4_2_pcmpestr = 7430,
|
||
|
CODE_FOR_sse4_2_pcmpestri = 7431,
|
||
|
CODE_FOR_sse4_2_pcmpestrm = 7432,
|
||
|
CODE_FOR_sse4_2_pcmpestr_cconly = 7433,
|
||
|
CODE_FOR_sse4_2_pcmpistr = 7434,
|
||
|
CODE_FOR_sse4_2_pcmpistri = 7435,
|
||
|
CODE_FOR_sse4_2_pcmpistrm = 7436,
|
||
|
CODE_FOR_sse4_2_pcmpistr_cconly = 7437,
|
||
|
CODE_FOR_avx512er_exp2v16sf = 7454,
|
||
|
CODE_FOR_avx512er_exp2v16sf_round = 7455,
|
||
|
CODE_FOR_avx512er_exp2v16sf_mask = 7456,
|
||
|
CODE_FOR_avx512er_exp2v16sf_mask_round = 7457,
|
||
|
CODE_FOR_avx512er_exp2v8df = 7458,
|
||
|
CODE_FOR_avx512er_exp2v8df_round = 7459,
|
||
|
CODE_FOR_avx512er_exp2v8df_mask = 7460,
|
||
|
CODE_FOR_avx512er_exp2v8df_mask_round = 7461,
|
||
|
CODE_FOR_avx512er_rcp28v16sf_mask = 7464,
|
||
|
CODE_FOR_avx512er_rcp28v16sf_mask_round = 7465,
|
||
|
CODE_FOR_avx512er_rcp28v8df_mask = 7468,
|
||
|
CODE_FOR_avx512er_rcp28v8df_mask_round = 7469,
|
||
|
CODE_FOR_avx512er_vmrcp28v4sf = 7470,
|
||
|
CODE_FOR_avx512er_vmrcp28v4sf_round = 7471,
|
||
|
CODE_FOR_avx512er_vmrcp28v4sf_mask = 7472,
|
||
|
CODE_FOR_avx512er_vmrcp28v4sf_mask_round = 7473,
|
||
|
CODE_FOR_avx512er_vmrcp28v2df = 7474,
|
||
|
CODE_FOR_avx512er_vmrcp28v2df_round = 7475,
|
||
|
CODE_FOR_avx512er_vmrcp28v2df_mask = 7476,
|
||
|
CODE_FOR_avx512er_vmrcp28v2df_mask_round = 7477,
|
||
|
CODE_FOR_avx512er_rsqrt28v16sf_mask = 7480,
|
||
|
CODE_FOR_avx512er_rsqrt28v16sf_mask_round = 7481,
|
||
|
CODE_FOR_avx512er_rsqrt28v8df_mask = 7484,
|
||
|
CODE_FOR_avx512er_rsqrt28v8df_mask_round = 7485,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v4sf = 7486,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v4sf_round = 7487,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v4sf_mask = 7488,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v4sf_mask_round = 7489,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v2df = 7490,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v2df_round = 7491,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v2df_mask = 7492,
|
||
|
CODE_FOR_avx512er_vmrsqrt28v2df_mask_round = 7493,
|
||
|
CODE_FOR_xop_pmacsww = 7494,
|
||
|
CODE_FOR_xop_pmacssww = 7495,
|
||
|
CODE_FOR_xop_pmacsdd = 7496,
|
||
|
CODE_FOR_xop_pmacssdd = 7497,
|
||
|
CODE_FOR_xop_pmacsdql = 7498,
|
||
|
CODE_FOR_xop_pmacssdql = 7499,
|
||
|
CODE_FOR_xop_pmacsdqh = 7500,
|
||
|
CODE_FOR_xop_pmacssdqh = 7501,
|
||
|
CODE_FOR_xop_pmacswd = 7502,
|
||
|
CODE_FOR_xop_pmacsswd = 7503,
|
||
|
CODE_FOR_xop_pmadcswd = 7504,
|
||
|
CODE_FOR_xop_pmadcsswd = 7505,
|
||
|
CODE_FOR_xop_pcmov_v32qi256 = 7506,
|
||
|
CODE_FOR_xop_pcmov_v16qi = 7507,
|
||
|
CODE_FOR_xop_pcmov_v16hi256 = 7508,
|
||
|
CODE_FOR_xop_pcmov_v8hi = 7509,
|
||
|
CODE_FOR_xop_pcmov_v8si256 = 7510,
|
||
|
CODE_FOR_xop_pcmov_v4si = 7511,
|
||
|
CODE_FOR_xop_pcmov_v4di256 = 7512,
|
||
|
CODE_FOR_xop_pcmov_v2di = 7513,
|
||
|
CODE_FOR_xop_pcmov_v16hf256 = 7514,
|
||
|
CODE_FOR_xop_pcmov_v8hf = 7515,
|
||
|
CODE_FOR_xop_pcmov_v8sf256 = 7516,
|
||
|
CODE_FOR_xop_pcmov_v4sf = 7517,
|
||
|
CODE_FOR_xop_pcmov_v4df256 = 7518,
|
||
|
CODE_FOR_xop_pcmov_v2df = 7519,
|
||
|
CODE_FOR_xop_phaddbw = 7520,
|
||
|
CODE_FOR_xop_phaddubw = 7521,
|
||
|
CODE_FOR_xop_phaddbd = 7522,
|
||
|
CODE_FOR_xop_phaddubd = 7523,
|
||
|
CODE_FOR_xop_phaddbq = 7524,
|
||
|
CODE_FOR_xop_phaddubq = 7525,
|
||
|
CODE_FOR_xop_phaddwd = 7526,
|
||
|
CODE_FOR_xop_phadduwd = 7527,
|
||
|
CODE_FOR_xop_phaddwq = 7528,
|
||
|
CODE_FOR_xop_phadduwq = 7529,
|
||
|
CODE_FOR_xop_phadddq = 7530,
|
||
|
CODE_FOR_xop_phaddudq = 7531,
|
||
|
CODE_FOR_xop_phsubbw = 7532,
|
||
|
CODE_FOR_xop_phsubwd = 7533,
|
||
|
CODE_FOR_xop_phsubdq = 7534,
|
||
|
CODE_FOR_xop_pperm = 7535,
|
||
|
CODE_FOR_xop_pperm_pack_v2di_v4si = 7536,
|
||
|
CODE_FOR_xop_pperm_pack_v4si_v8hi = 7537,
|
||
|
CODE_FOR_xop_pperm_pack_v8hi_v16qi = 7538,
|
||
|
CODE_FOR_xop_rotlv16qi3 = 7539,
|
||
|
CODE_FOR_xop_rotlv8hi3 = 7540,
|
||
|
CODE_FOR_xop_rotlv4si3 = 7541,
|
||
|
CODE_FOR_xop_rotlv2di3 = 7542,
|
||
|
CODE_FOR_xop_rotrv16qi3 = 7543,
|
||
|
CODE_FOR_xop_rotrv8hi3 = 7544,
|
||
|
CODE_FOR_xop_rotrv4si3 = 7545,
|
||
|
CODE_FOR_xop_rotrv2di3 = 7546,
|
||
|
CODE_FOR_xop_vrotlv16qi3 = 7547,
|
||
|
CODE_FOR_xop_vrotlv8hi3 = 7548,
|
||
|
CODE_FOR_xop_vrotlv4si3 = 7549,
|
||
|
CODE_FOR_xop_vrotlv2di3 = 7550,
|
||
|
CODE_FOR_xop_shav16qi3 = 7551,
|
||
|
CODE_FOR_xop_shav8hi3 = 7552,
|
||
|
CODE_FOR_xop_shav4si3 = 7553,
|
||
|
CODE_FOR_xop_shav2di3 = 7554,
|
||
|
CODE_FOR_xop_shlv16qi3 = 7555,
|
||
|
CODE_FOR_xop_shlv8hi3 = 7556,
|
||
|
CODE_FOR_xop_shlv4si3 = 7557,
|
||
|
CODE_FOR_xop_shlv2di3 = 7558,
|
||
|
CODE_FOR_xop_frczsf2 = 7559,
|
||
|
CODE_FOR_xop_frczdf2 = 7560,
|
||
|
CODE_FOR_xop_frczv4sf2 = 7561,
|
||
|
CODE_FOR_xop_frczv2df2 = 7562,
|
||
|
CODE_FOR_xop_frczv8sf2 = 7563,
|
||
|
CODE_FOR_xop_frczv4df2 = 7564,
|
||
|
CODE_FOR_xop_maskcmpv16qi3 = 7567,
|
||
|
CODE_FOR_xop_maskcmpv8hi3 = 7568,
|
||
|
CODE_FOR_xop_maskcmpv4si3 = 7569,
|
||
|
CODE_FOR_xop_maskcmpv2di3 = 7570,
|
||
|
CODE_FOR_xop_maskcmp_unsv16qi3 = 7571,
|
||
|
CODE_FOR_xop_maskcmp_unsv8hi3 = 7572,
|
||
|
CODE_FOR_xop_maskcmp_unsv4si3 = 7573,
|
||
|
CODE_FOR_xop_maskcmp_unsv2di3 = 7574,
|
||
|
CODE_FOR_xop_maskcmp_uns2v16qi3 = 7575,
|
||
|
CODE_FOR_xop_maskcmp_uns2v8hi3 = 7576,
|
||
|
CODE_FOR_xop_maskcmp_uns2v4si3 = 7577,
|
||
|
CODE_FOR_xop_maskcmp_uns2v2di3 = 7578,
|
||
|
CODE_FOR_xop_pcom_tfv16qi3 = 7579,
|
||
|
CODE_FOR_xop_pcom_tfv8hi3 = 7580,
|
||
|
CODE_FOR_xop_pcom_tfv4si3 = 7581,
|
||
|
CODE_FOR_xop_pcom_tfv2di3 = 7582,
|
||
|
CODE_FOR_xop_vpermil2v8sf3 = 7583,
|
||
|
CODE_FOR_xop_vpermil2v4sf3 = 7584,
|
||
|
CODE_FOR_xop_vpermil2v4df3 = 7585,
|
||
|
CODE_FOR_xop_vpermil2v2df3 = 7586,
|
||
|
CODE_FOR_aesenc = 7587,
|
||
|
CODE_FOR_aesenclast = 7588,
|
||
|
CODE_FOR_aesdec = 7589,
|
||
|
CODE_FOR_aesdeclast = 7590,
|
||
|
CODE_FOR_aesimc = 7591,
|
||
|
CODE_FOR_aeskeygenassist = 7592,
|
||
|
CODE_FOR_pclmulqdq = 7593,
|
||
|
CODE_FOR_avx_vzeroupper_callee_abi = 7595,
|
||
|
CODE_FOR_avx2_pbroadcastv16si = 7596,
|
||
|
CODE_FOR_avx2_pbroadcastv8di = 7597,
|
||
|
CODE_FOR_avx2_pbroadcastv64qi = 7598,
|
||
|
CODE_FOR_avx2_pbroadcastv32qi = 7599,
|
||
|
CODE_FOR_avx2_pbroadcastv16qi = 7600,
|
||
|
CODE_FOR_avx2_pbroadcastv32hi = 7601,
|
||
|
CODE_FOR_avx2_pbroadcastv16hi = 7602,
|
||
|
CODE_FOR_avx2_pbroadcastv8hi = 7603,
|
||
|
CODE_FOR_avx2_pbroadcastv8si = 7604,
|
||
|
CODE_FOR_avx2_pbroadcastv4si = 7605,
|
||
|
CODE_FOR_avx2_pbroadcastv4di = 7606,
|
||
|
CODE_FOR_avx2_pbroadcastv2di = 7607,
|
||
|
CODE_FOR_avx2_pbroadcastv32hf = 7608,
|
||
|
CODE_FOR_avx2_pbroadcastv16hf = 7609,
|
||
|
CODE_FOR_avx2_pbroadcastv8hf = 7610,
|
||
|
CODE_FOR_avx2_pbroadcastv32qi_1 = 7611,
|
||
|
CODE_FOR_avx2_pbroadcastv16hi_1 = 7612,
|
||
|
CODE_FOR_avx2_pbroadcastv8si_1 = 7613,
|
||
|
CODE_FOR_avx2_pbroadcastv4di_1 = 7614,
|
||
|
CODE_FOR_avx2_pbroadcastv16hf_1 = 7615,
|
||
|
CODE_FOR_avx2_permvarv8si = 7616,
|
||
|
CODE_FOR_avx2_permvarv8si_mask = 7617,
|
||
|
CODE_FOR_avx2_permvarv8sf = 7618,
|
||
|
CODE_FOR_avx2_permvarv8sf_mask = 7619,
|
||
|
CODE_FOR_avx512f_permvarv16si = 7620,
|
||
|
CODE_FOR_avx512f_permvarv16si_mask = 7621,
|
||
|
CODE_FOR_avx512f_permvarv16sf = 7622,
|
||
|
CODE_FOR_avx512f_permvarv16sf_mask = 7623,
|
||
|
CODE_FOR_avx512f_permvarv8di = 7624,
|
||
|
CODE_FOR_avx512f_permvarv8di_mask = 7625,
|
||
|
CODE_FOR_avx512f_permvarv8df = 7626,
|
||
|
CODE_FOR_avx512f_permvarv8df_mask = 7627,
|
||
|
CODE_FOR_avx2_permvarv4di = 7628,
|
||
|
CODE_FOR_avx2_permvarv4di_mask = 7629,
|
||
|
CODE_FOR_avx2_permvarv4df = 7630,
|
||
|
CODE_FOR_avx2_permvarv4df_mask = 7631,
|
||
|
CODE_FOR_avx512bw_permvarv64qi = 7632,
|
||
|
CODE_FOR_avx512bw_permvarv64qi_mask = 7633,
|
||
|
CODE_FOR_avx512vl_permvarv16qi = 7634,
|
||
|
CODE_FOR_avx512vl_permvarv16qi_mask = 7635,
|
||
|
CODE_FOR_avx512vl_permvarv32qi = 7636,
|
||
|
CODE_FOR_avx512vl_permvarv32qi_mask = 7637,
|
||
|
CODE_FOR_avx512vl_permvarv8hi = 7638,
|
||
|
CODE_FOR_avx512vl_permvarv8hi_mask = 7639,
|
||
|
CODE_FOR_avx512vl_permvarv16hi = 7640,
|
||
|
CODE_FOR_avx512vl_permvarv16hi_mask = 7641,
|
||
|
CODE_FOR_avx512bw_permvarv32hi = 7642,
|
||
|
CODE_FOR_avx512bw_permvarv32hi_mask = 7643,
|
||
|
CODE_FOR_avx2_permv4di_1 = 7659,
|
||
|
CODE_FOR_avx2_permv4di_1_mask = 7660,
|
||
|
CODE_FOR_avx2_permv4df_1 = 7661,
|
||
|
CODE_FOR_avx2_permv4df_1_mask = 7662,
|
||
|
CODE_FOR_avx512f_permv8df_1 = 7663,
|
||
|
CODE_FOR_avx512f_permv8df_1_mask = 7664,
|
||
|
CODE_FOR_avx512f_permv8di_1 = 7665,
|
||
|
CODE_FOR_avx512f_permv8di_1_mask = 7666,
|
||
|
CODE_FOR_avx2_permv2ti = 7667,
|
||
|
CODE_FOR_avx2_vec_dupv4df = 7668,
|
||
|
CODE_FOR_avx512f_vec_dupv16si_1 = 7669,
|
||
|
CODE_FOR_avx512f_vec_dupv8di_1 = 7670,
|
||
|
CODE_FOR_avx512bw_vec_dupv32hi_1 = 7671,
|
||
|
CODE_FOR_avx512bw_vec_dupv64qi_1 = 7672,
|
||
|
CODE_FOR_avx512bw_vec_dupv32hf_1 = 7673,
|
||
|
CODE_FOR_avx512f_vec_dupv16si = 7674,
|
||
|
CODE_FOR_avx512f_vec_dupv16si_mask = 7675,
|
||
|
CODE_FOR_avx512vl_vec_dupv8si = 7676,
|
||
|
CODE_FOR_avx512vl_vec_dupv8si_mask = 7677,
|
||
|
CODE_FOR_avx512vl_vec_dupv4si = 7678,
|
||
|
CODE_FOR_avx512vl_vec_dupv4si_mask = 7679,
|
||
|
CODE_FOR_avx512f_vec_dupv8di = 7680,
|
||
|
CODE_FOR_avx512f_vec_dupv8di_mask = 7681,
|
||
|
CODE_FOR_avx512vl_vec_dupv4di = 7682,
|
||
|
CODE_FOR_avx512vl_vec_dupv4di_mask = 7683,
|
||
|
CODE_FOR_avx512vl_vec_dupv2di = 7684,
|
||
|
CODE_FOR_avx512vl_vec_dupv2di_mask = 7685,
|
||
|
CODE_FOR_avx512f_vec_dupv16sf = 7686,
|
||
|
CODE_FOR_avx512f_vec_dupv16sf_mask = 7687,
|
||
|
CODE_FOR_avx512vl_vec_dupv8sf = 7688,
|
||
|
CODE_FOR_avx512vl_vec_dupv8sf_mask = 7689,
|
||
|
CODE_FOR_avx512vl_vec_dupv4sf = 7690,
|
||
|
CODE_FOR_avx512vl_vec_dupv4sf_mask = 7691,
|
||
|
CODE_FOR_avx512f_vec_dupv8df = 7692,
|
||
|
CODE_FOR_avx512f_vec_dupv8df_mask = 7693,
|
||
|
CODE_FOR_avx512vl_vec_dupv4df = 7694,
|
||
|
CODE_FOR_avx512vl_vec_dupv4df_mask = 7695,
|
||
|
CODE_FOR_avx512vl_vec_dupv2df = 7696,
|
||
|
CODE_FOR_avx512vl_vec_dupv2df_mask = 7697,
|
||
|
CODE_FOR_avx512bw_vec_dupv64qi = 7698,
|
||
|
CODE_FOR_avx512bw_vec_dupv64qi_mask = 7699,
|
||
|
CODE_FOR_avx512vl_vec_dupv16qi = 7700,
|
||
|
CODE_FOR_avx512vl_vec_dupv16qi_mask = 7701,
|
||
|
CODE_FOR_avx512vl_vec_dupv32qi = 7702,
|
||
|
CODE_FOR_avx512vl_vec_dupv32qi_mask = 7703,
|
||
|
CODE_FOR_avx512bw_vec_dupv32hi = 7704,
|
||
|
CODE_FOR_avx512bw_vec_dupv32hi_mask = 7705,
|
||
|
CODE_FOR_avx512vl_vec_dupv16hi = 7706,
|
||
|
CODE_FOR_avx512vl_vec_dupv16hi_mask = 7707,
|
||
|
CODE_FOR_avx512vl_vec_dupv8hi = 7708,
|
||
|
CODE_FOR_avx512vl_vec_dupv8hi_mask = 7709,
|
||
|
CODE_FOR_avx512bw_vec_dupv32hf = 7710,
|
||
|
CODE_FOR_avx512bw_vec_dupv32hf_mask = 7711,
|
||
|
CODE_FOR_avx512vl_vec_dupv16hf = 7712,
|
||
|
CODE_FOR_avx512vl_vec_dupv16hf_mask = 7713,
|
||
|
CODE_FOR_avx512fp16_vec_dupv8hf = 7714,
|
||
|
CODE_FOR_avx512fp16_vec_dupv8hf_mask = 7715,
|
||
|
CODE_FOR_avx512f_broadcastv16sf_mask = 7717,
|
||
|
CODE_FOR_avx512f_broadcastv16si_mask = 7719,
|
||
|
CODE_FOR_avx512f_broadcastv8df_mask = 7721,
|
||
|
CODE_FOR_avx512f_broadcastv8di_mask = 7723,
|
||
|
CODE_FOR_avx512bw_vec_dup_gprv64qi_mask = 7725,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv16qi_mask = 7727,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv32qi_mask = 7729,
|
||
|
CODE_FOR_avx512bw_vec_dup_gprv32hi_mask = 7731,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv16hi_mask = 7733,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv8hi_mask = 7735,
|
||
|
CODE_FOR_avx512bw_vec_dup_gprv32hf_mask = 7737,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv16hf_mask = 7739,
|
||
|
CODE_FOR_avx512fp16_vec_dup_gprv8hf_mask = 7741,
|
||
|
CODE_FOR_avx512f_vec_dup_gprv16si_mask = 7743,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv8si_mask = 7745,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv4si_mask = 7747,
|
||
|
CODE_FOR_avx512f_vec_dup_gprv8di_mask = 7749,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv4di_mask = 7751,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv2di_mask = 7753,
|
||
|
CODE_FOR_avx512f_vec_dup_gprv16sf_mask = 7755,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv8sf_mask = 7757,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv4sf_mask = 7759,
|
||
|
CODE_FOR_avx512f_vec_dup_gprv8df_mask = 7761,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv4df_mask = 7763,
|
||
|
CODE_FOR_avx512vl_vec_dup_gprv2df_mask = 7765,
|
||
|
CODE_FOR_vec_dupv4sf = 7766,
|
||
|
CODE_FOR_avx2_vbroadcasti128_v32qi = 7769,
|
||
|
CODE_FOR_avx2_vbroadcasti128_v16hi = 7770,
|
||
|
CODE_FOR_avx2_vbroadcasti128_v8si = 7771,
|
||
|
CODE_FOR_avx2_vbroadcasti128_v4di = 7772,
|
||
|
CODE_FOR_vec_dupv8si = 7781,
|
||
|
CODE_FOR_vec_dupv8sf = 7782,
|
||
|
CODE_FOR_vec_dupv4di = 7783,
|
||
|
CODE_FOR_vec_dupv4df = 7784,
|
||
|
CODE_FOR_avx_vbroadcastf128_v32qi = 7785,
|
||
|
CODE_FOR_avx_vbroadcastf128_v16hi = 7786,
|
||
|
CODE_FOR_avx_vbroadcastf128_v8si = 7787,
|
||
|
CODE_FOR_avx_vbroadcastf128_v4di = 7788,
|
||
|
CODE_FOR_avx_vbroadcastf128_v8sf = 7789,
|
||
|
CODE_FOR_avx_vbroadcastf128_v4df = 7790,
|
||
|
CODE_FOR_avx_vbroadcastf128_v16hf = 7791,
|
||
|
CODE_FOR_avx512dq_broadcastv16si_mask = 7793,
|
||
|
CODE_FOR_avx512dq_broadcastv8si_mask = 7795,
|
||
|
CODE_FOR_avx512dq_broadcastv4si_mask = 7797,
|
||
|
CODE_FOR_avx512dq_broadcastv16sf_mask = 7799,
|
||
|
CODE_FOR_avx512dq_broadcastv8sf_mask = 7801,
|
||
|
CODE_FOR_avx512vl_broadcastv8si_mask_1 = 7803,
|
||
|
CODE_FOR_avx512vl_broadcastv8sf_mask_1 = 7805,
|
||
|
CODE_FOR_avx512dq_broadcastv16sf_mask_1 = 7807,
|
||
|
CODE_FOR_avx512dq_broadcastv16si_mask_1 = 7809,
|
||
|
CODE_FOR_avx512dq_broadcastv8di_mask_1 = 7811,
|
||
|
CODE_FOR_avx512dq_broadcastv8df_mask_1 = 7813,
|
||
|
CODE_FOR_avx512dq_broadcastv4di_mask_1 = 7815,
|
||
|
CODE_FOR_avx512dq_broadcastv4df_mask_1 = 7817,
|
||
|
CODE_FOR_avx512cd_maskb_vec_dupv8di = 7818,
|
||
|
CODE_FOR_avx512cd_maskb_vec_dupv4di = 7819,
|
||
|
CODE_FOR_avx512cd_maskb_vec_dupv2di = 7820,
|
||
|
CODE_FOR_avx512cd_maskw_vec_dupv16si = 7821,
|
||
|
CODE_FOR_avx512cd_maskw_vec_dupv8si = 7822,
|
||
|
CODE_FOR_avx512cd_maskw_vec_dupv4si = 7823,
|
||
|
CODE_FOR_avx512f_vpermilvarv16sf3 = 7824,
|
||
|
CODE_FOR_avx512f_vpermilvarv16sf3_mask = 7825,
|
||
|
CODE_FOR_avx_vpermilvarv8sf3 = 7826,
|
||
|
CODE_FOR_avx_vpermilvarv8sf3_mask = 7827,
|
||
|
CODE_FOR_avx_vpermilvarv4sf3 = 7828,
|
||
|
CODE_FOR_avx_vpermilvarv4sf3_mask = 7829,
|
||
|
CODE_FOR_avx512f_vpermilvarv8df3 = 7830,
|
||
|
CODE_FOR_avx512f_vpermilvarv8df3_mask = 7831,
|
||
|
CODE_FOR_avx_vpermilvarv4df3 = 7832,
|
||
|
CODE_FOR_avx_vpermilvarv4df3_mask = 7833,
|
||
|
CODE_FOR_avx_vpermilvarv2df3 = 7834,
|
||
|
CODE_FOR_avx_vpermilvarv2df3_mask = 7835,
|
||
|
CODE_FOR_avx512f_vpermt2varv16si3 = 7854,
|
||
|
CODE_FOR_avx512f_vpermt2varv16si3_maskz_1 = 7855,
|
||
|
CODE_FOR_avx512f_vpermt2varv16sf3 = 7856,
|
||
|
CODE_FOR_avx512f_vpermt2varv16sf3_maskz_1 = 7857,
|
||
|
CODE_FOR_avx512f_vpermt2varv8di3 = 7858,
|
||
|
CODE_FOR_avx512f_vpermt2varv8di3_maskz_1 = 7859,
|
||
|
CODE_FOR_avx512f_vpermt2varv8df3 = 7860,
|
||
|
CODE_FOR_avx512f_vpermt2varv8df3_maskz_1 = 7861,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8si3 = 7862,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8si3_maskz_1 = 7863,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8sf3 = 7864,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8sf3_maskz_1 = 7865,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4di3 = 7866,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4di3_maskz_1 = 7867,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4df3 = 7868,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4df3_maskz_1 = 7869,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4si3 = 7870,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4si3_maskz_1 = 7871,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4sf3 = 7872,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4sf3_maskz_1 = 7873,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2di3 = 7874,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2di3_maskz_1 = 7875,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2df3 = 7876,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2df3_maskz_1 = 7877,
|
||
|
CODE_FOR_avx512bw_vpermt2varv32hi3 = 7878,
|
||
|
CODE_FOR_avx512bw_vpermt2varv32hi3_maskz_1 = 7879,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16hi3 = 7880,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16hi3_maskz_1 = 7881,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8hi3 = 7882,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8hi3_maskz_1 = 7883,
|
||
|
CODE_FOR_avx512bw_vpermt2varv64qi3 = 7884,
|
||
|
CODE_FOR_avx512bw_vpermt2varv64qi3_maskz_1 = 7885,
|
||
|
CODE_FOR_avx512vl_vpermt2varv32qi3 = 7886,
|
||
|
CODE_FOR_avx512vl_vpermt2varv32qi3_maskz_1 = 7887,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16qi3 = 7888,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16qi3_maskz_1 = 7889,
|
||
|
CODE_FOR_avx512f_vpermt2varv16si3_mask = 7890,
|
||
|
CODE_FOR_avx512f_vpermt2varv16sf3_mask = 7891,
|
||
|
CODE_FOR_avx512f_vpermt2varv8di3_mask = 7892,
|
||
|
CODE_FOR_avx512f_vpermt2varv8df3_mask = 7893,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8si3_mask = 7894,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8sf3_mask = 7895,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4di3_mask = 7896,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4df3_mask = 7897,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4si3_mask = 7898,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4sf3_mask = 7899,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2di3_mask = 7900,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2df3_mask = 7901,
|
||
|
CODE_FOR_avx512bw_vpermt2varv32hi3_mask = 7902,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16hi3_mask = 7903,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8hi3_mask = 7904,
|
||
|
CODE_FOR_avx512bw_vpermt2varv64qi3_mask = 7905,
|
||
|
CODE_FOR_avx512vl_vpermt2varv32qi3_mask = 7906,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16qi3_mask = 7907,
|
||
|
CODE_FOR_vec_set_lo_v4di = 7920,
|
||
|
CODE_FOR_vec_set_lo_v4di_mask = 7921,
|
||
|
CODE_FOR_vec_set_lo_v4df = 7922,
|
||
|
CODE_FOR_vec_set_lo_v4df_mask = 7923,
|
||
|
CODE_FOR_vec_set_hi_v4di = 7924,
|
||
|
CODE_FOR_vec_set_hi_v4di_mask = 7925,
|
||
|
CODE_FOR_vec_set_hi_v4df = 7926,
|
||
|
CODE_FOR_vec_set_hi_v4df_mask = 7927,
|
||
|
CODE_FOR_vec_set_lo_v8si = 7928,
|
||
|
CODE_FOR_vec_set_lo_v8si_mask = 7929,
|
||
|
CODE_FOR_vec_set_lo_v8sf = 7930,
|
||
|
CODE_FOR_vec_set_lo_v8sf_mask = 7931,
|
||
|
CODE_FOR_vec_set_hi_v8si = 7932,
|
||
|
CODE_FOR_vec_set_hi_v8si_mask = 7933,
|
||
|
CODE_FOR_vec_set_hi_v8sf = 7934,
|
||
|
CODE_FOR_vec_set_hi_v8sf_mask = 7935,
|
||
|
CODE_FOR_vec_set_lo_v16hi = 7936,
|
||
|
CODE_FOR_vec_set_lo_v16hf = 7937,
|
||
|
CODE_FOR_vec_set_hi_v16hi = 7938,
|
||
|
CODE_FOR_vec_set_hi_v16hf = 7939,
|
||
|
CODE_FOR_vec_set_lo_v32qi = 7940,
|
||
|
CODE_FOR_vec_set_hi_v32qi = 7941,
|
||
|
CODE_FOR_avx_maskloadps = 7942,
|
||
|
CODE_FOR_avx_maskloadpd = 7943,
|
||
|
CODE_FOR_avx_maskloadps256 = 7944,
|
||
|
CODE_FOR_avx_maskloadpd256 = 7945,
|
||
|
CODE_FOR_avx2_maskloadd = 7946,
|
||
|
CODE_FOR_avx2_maskloadq = 7947,
|
||
|
CODE_FOR_avx2_maskloadd256 = 7948,
|
||
|
CODE_FOR_avx2_maskloadq256 = 7949,
|
||
|
CODE_FOR_avx_maskstoreps = 7950,
|
||
|
CODE_FOR_avx_maskstorepd = 7951,
|
||
|
CODE_FOR_avx_maskstoreps256 = 7952,
|
||
|
CODE_FOR_avx_maskstorepd256 = 7953,
|
||
|
CODE_FOR_avx2_maskstored = 7954,
|
||
|
CODE_FOR_avx2_maskstoreq = 7955,
|
||
|
CODE_FOR_avx2_maskstored256 = 7956,
|
||
|
CODE_FOR_avx2_maskstoreq256 = 7957,
|
||
|
CODE_FOR_avx_si256_si = 7958,
|
||
|
CODE_FOR_avx_ps256_ps = 7959,
|
||
|
CODE_FOR_avx_pd256_pd = 7960,
|
||
|
CODE_FOR_avx2_ashrvv4si = 7961,
|
||
|
CODE_FOR_avx2_ashrvv4si_mask = 7962,
|
||
|
CODE_FOR_avx2_ashrvv8si = 7963,
|
||
|
CODE_FOR_avx2_ashrvv8si_mask = 7964,
|
||
|
CODE_FOR_avx512f_ashrvv16si = 7965,
|
||
|
CODE_FOR_avx512f_ashrvv16si_mask = 7966,
|
||
|
CODE_FOR_avx2_ashrvv2di = 7967,
|
||
|
CODE_FOR_avx2_ashrvv2di_mask = 7968,
|
||
|
CODE_FOR_avx2_ashrvv4di = 7969,
|
||
|
CODE_FOR_avx2_ashrvv4di_mask = 7970,
|
||
|
CODE_FOR_avx512f_ashrvv8di = 7971,
|
||
|
CODE_FOR_avx512f_ashrvv8di_mask = 7972,
|
||
|
CODE_FOR_avx512vl_ashrvv8hi = 7973,
|
||
|
CODE_FOR_avx512vl_ashrvv8hi_mask = 7974,
|
||
|
CODE_FOR_avx512vl_ashrvv16hi = 7975,
|
||
|
CODE_FOR_avx512vl_ashrvv16hi_mask = 7976,
|
||
|
CODE_FOR_avx512bw_ashrvv32hi = 7977,
|
||
|
CODE_FOR_avx512bw_ashrvv32hi_mask = 7978,
|
||
|
CODE_FOR_avx512f_ashlvv16si = 7979,
|
||
|
CODE_FOR_avx512f_ashlvv16si_mask = 7980,
|
||
|
CODE_FOR_avx512f_lshrvv16si = 7981,
|
||
|
CODE_FOR_avx512f_lshrvv16si_mask = 7982,
|
||
|
CODE_FOR_avx2_ashlvv8si = 7983,
|
||
|
CODE_FOR_avx2_ashlvv8si_mask = 7984,
|
||
|
CODE_FOR_avx2_lshrvv8si = 7985,
|
||
|
CODE_FOR_avx2_lshrvv8si_mask = 7986,
|
||
|
CODE_FOR_avx2_ashlvv4si = 7987,
|
||
|
CODE_FOR_avx2_ashlvv4si_mask = 7988,
|
||
|
CODE_FOR_avx2_lshrvv4si = 7989,
|
||
|
CODE_FOR_avx2_lshrvv4si_mask = 7990,
|
||
|
CODE_FOR_avx512f_ashlvv8di = 7991,
|
||
|
CODE_FOR_avx512f_ashlvv8di_mask = 7992,
|
||
|
CODE_FOR_avx512f_lshrvv8di = 7993,
|
||
|
CODE_FOR_avx512f_lshrvv8di_mask = 7994,
|
||
|
CODE_FOR_avx2_ashlvv4di = 7995,
|
||
|
CODE_FOR_avx2_ashlvv4di_mask = 7996,
|
||
|
CODE_FOR_avx2_lshrvv4di = 7997,
|
||
|
CODE_FOR_avx2_lshrvv4di_mask = 7998,
|
||
|
CODE_FOR_avx2_ashlvv2di = 7999,
|
||
|
CODE_FOR_avx2_ashlvv2di_mask = 8000,
|
||
|
CODE_FOR_avx2_lshrvv2di = 8001,
|
||
|
CODE_FOR_avx2_lshrvv2di_mask = 8002,
|
||
|
CODE_FOR_avx512vl_ashlvv8hi = 8003,
|
||
|
CODE_FOR_avx512vl_ashlvv8hi_mask = 8004,
|
||
|
CODE_FOR_avx512vl_lshrvv8hi = 8005,
|
||
|
CODE_FOR_avx512vl_lshrvv8hi_mask = 8006,
|
||
|
CODE_FOR_avx512vl_ashlvv16hi = 8007,
|
||
|
CODE_FOR_avx512vl_ashlvv16hi_mask = 8008,
|
||
|
CODE_FOR_avx512vl_lshrvv16hi = 8009,
|
||
|
CODE_FOR_avx512vl_lshrvv16hi_mask = 8010,
|
||
|
CODE_FOR_avx512bw_ashlvv32hi = 8011,
|
||
|
CODE_FOR_avx512bw_ashlvv32hi_mask = 8012,
|
||
|
CODE_FOR_avx512bw_lshrvv32hi = 8013,
|
||
|
CODE_FOR_avx512bw_lshrvv32hi_mask = 8014,
|
||
|
CODE_FOR_avx_vec_concatv32qi = 8015,
|
||
|
CODE_FOR_avx_vec_concatv16hi = 8016,
|
||
|
CODE_FOR_avx_vec_concatv16hf = 8017,
|
||
|
CODE_FOR_avx_vec_concatv8si = 8018,
|
||
|
CODE_FOR_avx_vec_concatv4di = 8019,
|
||
|
CODE_FOR_avx_vec_concatv8sf = 8020,
|
||
|
CODE_FOR_avx_vec_concatv4df = 8021,
|
||
|
CODE_FOR_avx_vec_concatv64qi = 8022,
|
||
|
CODE_FOR_avx_vec_concatv32hi = 8023,
|
||
|
CODE_FOR_avx_vec_concatv32hf = 8024,
|
||
|
CODE_FOR_avx_vec_concatv16si = 8025,
|
||
|
CODE_FOR_avx_vec_concatv8di = 8026,
|
||
|
CODE_FOR_avx_vec_concatv16sf = 8027,
|
||
|
CODE_FOR_avx_vec_concatv8df = 8028,
|
||
|
CODE_FOR_vcvtph2ps = 8050,
|
||
|
CODE_FOR_vcvtph2ps_mask = 8051,
|
||
|
CODE_FOR_vcvtph2ps256 = 8054,
|
||
|
CODE_FOR_vcvtph2ps256_mask = 8055,
|
||
|
CODE_FOR_avx512f_vcvtph2ps512_mask = 8058,
|
||
|
CODE_FOR_avx512f_vcvtph2ps512_mask_round = 8059,
|
||
|
CODE_FOR_vcvtps2ph256 = 8063,
|
||
|
CODE_FOR_vcvtps2ph256_mask = 8064,
|
||
|
CODE_FOR_avx512f_vcvtps2ph512_mask = 8068,
|
||
|
CODE_FOR_avx512f_compressv16si_mask = 8287,
|
||
|
CODE_FOR_avx512f_compressv16sf_mask = 8288,
|
||
|
CODE_FOR_avx512f_compressv8di_mask = 8289,
|
||
|
CODE_FOR_avx512f_compressv8df_mask = 8290,
|
||
|
CODE_FOR_avx512vl_compressv8si_mask = 8291,
|
||
|
CODE_FOR_avx512vl_compressv8sf_mask = 8292,
|
||
|
CODE_FOR_avx512vl_compressv4di_mask = 8293,
|
||
|
CODE_FOR_avx512vl_compressv4df_mask = 8294,
|
||
|
CODE_FOR_avx512vl_compressv4si_mask = 8295,
|
||
|
CODE_FOR_avx512vl_compressv4sf_mask = 8296,
|
||
|
CODE_FOR_avx512vl_compressv2di_mask = 8297,
|
||
|
CODE_FOR_avx512vl_compressv2df_mask = 8298,
|
||
|
CODE_FOR_compressv64qi_mask = 8299,
|
||
|
CODE_FOR_compressv16qi_mask = 8300,
|
||
|
CODE_FOR_compressv32qi_mask = 8301,
|
||
|
CODE_FOR_compressv32hi_mask = 8302,
|
||
|
CODE_FOR_compressv16hi_mask = 8303,
|
||
|
CODE_FOR_compressv8hi_mask = 8304,
|
||
|
CODE_FOR_avx512f_compressstorev16si_mask = 8305,
|
||
|
CODE_FOR_avx512f_compressstorev16sf_mask = 8306,
|
||
|
CODE_FOR_avx512f_compressstorev8di_mask = 8307,
|
||
|
CODE_FOR_avx512f_compressstorev8df_mask = 8308,
|
||
|
CODE_FOR_avx512vl_compressstorev8si_mask = 8309,
|
||
|
CODE_FOR_avx512vl_compressstorev8sf_mask = 8310,
|
||
|
CODE_FOR_avx512vl_compressstorev4di_mask = 8311,
|
||
|
CODE_FOR_avx512vl_compressstorev4df_mask = 8312,
|
||
|
CODE_FOR_avx512vl_compressstorev4si_mask = 8313,
|
||
|
CODE_FOR_avx512vl_compressstorev4sf_mask = 8314,
|
||
|
CODE_FOR_avx512vl_compressstorev2di_mask = 8315,
|
||
|
CODE_FOR_avx512vl_compressstorev2df_mask = 8316,
|
||
|
CODE_FOR_compressstorev64qi_mask = 8317,
|
||
|
CODE_FOR_compressstorev16qi_mask = 8318,
|
||
|
CODE_FOR_compressstorev32qi_mask = 8319,
|
||
|
CODE_FOR_compressstorev32hi_mask = 8320,
|
||
|
CODE_FOR_compressstorev16hi_mask = 8321,
|
||
|
CODE_FOR_compressstorev8hi_mask = 8322,
|
||
|
CODE_FOR_expandv16si_mask = 8323,
|
||
|
CODE_FOR_expandv16sf_mask = 8324,
|
||
|
CODE_FOR_expandv8di_mask = 8325,
|
||
|
CODE_FOR_expandv8df_mask = 8326,
|
||
|
CODE_FOR_expandv8si_mask = 8327,
|
||
|
CODE_FOR_expandv8sf_mask = 8328,
|
||
|
CODE_FOR_expandv4di_mask = 8329,
|
||
|
CODE_FOR_expandv4df_mask = 8330,
|
||
|
CODE_FOR_expandv4si_mask = 8331,
|
||
|
CODE_FOR_expandv4sf_mask = 8332,
|
||
|
CODE_FOR_expandv2di_mask = 8333,
|
||
|
CODE_FOR_expandv2df_mask = 8334,
|
||
|
CODE_FOR_expandv64qi_mask = 8335,
|
||
|
CODE_FOR_expandv16qi_mask = 8336,
|
||
|
CODE_FOR_expandv32qi_mask = 8337,
|
||
|
CODE_FOR_expandv32hi_mask = 8338,
|
||
|
CODE_FOR_expandv16hi_mask = 8339,
|
||
|
CODE_FOR_expandv8hi_mask = 8340,
|
||
|
CODE_FOR_avx512dq_rangepv16sf = 8359,
|
||
|
CODE_FOR_avx512dq_rangepv16sf_round = 8360,
|
||
|
CODE_FOR_avx512dq_rangepv16sf_mask = 8361,
|
||
|
CODE_FOR_avx512dq_rangepv16sf_mask_round = 8362,
|
||
|
CODE_FOR_avx512dq_rangepv8sf = 8363,
|
||
|
CODE_FOR_avx512dq_rangepv8sf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv8sf_mask = 8364,
|
||
|
CODE_FOR_avx512dq_rangepv8sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv4sf = 8365,
|
||
|
CODE_FOR_avx512dq_rangepv4sf_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv4sf_mask = 8366,
|
||
|
CODE_FOR_avx512dq_rangepv4sf_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv8df = 8367,
|
||
|
CODE_FOR_avx512dq_rangepv8df_round = 8368,
|
||
|
CODE_FOR_avx512dq_rangepv8df_mask = 8369,
|
||
|
CODE_FOR_avx512dq_rangepv8df_mask_round = 8370,
|
||
|
CODE_FOR_avx512dq_rangepv4df = 8371,
|
||
|
CODE_FOR_avx512dq_rangepv4df_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv4df_mask = 8372,
|
||
|
CODE_FOR_avx512dq_rangepv4df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv2df = 8373,
|
||
|
CODE_FOR_avx512dq_rangepv2df_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangepv2df_mask = 8374,
|
||
|
CODE_FOR_avx512dq_rangepv2df_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_avx512dq_rangesv4sf = 8375,
|
||
|
CODE_FOR_avx512dq_rangesv4sf_mask = 8376,
|
||
|
CODE_FOR_avx512dq_rangesv4sf_round = 8377,
|
||
|
CODE_FOR_avx512dq_rangesv4sf_mask_round = 8378,
|
||
|
CODE_FOR_avx512dq_rangesv2df = 8379,
|
||
|
CODE_FOR_avx512dq_rangesv2df_mask = 8380,
|
||
|
CODE_FOR_avx512dq_rangesv2df_round = 8381,
|
||
|
CODE_FOR_avx512dq_rangesv2df_mask_round = 8382,
|
||
|
CODE_FOR_avx512dq_fpclassv32hf = 8383,
|
||
|
CODE_FOR_avx512dq_fpclassv32hf_mask = 8384,
|
||
|
CODE_FOR_avx512dq_fpclassv16hf = 8385,
|
||
|
CODE_FOR_avx512dq_fpclassv16hf_mask = 8386,
|
||
|
CODE_FOR_avx512dq_fpclassv8hf = 8387,
|
||
|
CODE_FOR_avx512dq_fpclassv8hf_mask = 8388,
|
||
|
CODE_FOR_avx512dq_fpclassv16sf = 8389,
|
||
|
CODE_FOR_avx512dq_fpclassv16sf_mask = 8390,
|
||
|
CODE_FOR_avx512dq_fpclassv8sf = 8391,
|
||
|
CODE_FOR_avx512dq_fpclassv8sf_mask = 8392,
|
||
|
CODE_FOR_avx512dq_fpclassv4sf = 8393,
|
||
|
CODE_FOR_avx512dq_fpclassv4sf_mask = 8394,
|
||
|
CODE_FOR_avx512dq_fpclassv8df = 8395,
|
||
|
CODE_FOR_avx512dq_fpclassv8df_mask = 8396,
|
||
|
CODE_FOR_avx512dq_fpclassv4df = 8397,
|
||
|
CODE_FOR_avx512dq_fpclassv4df_mask = 8398,
|
||
|
CODE_FOR_avx512dq_fpclassv2df = 8399,
|
||
|
CODE_FOR_avx512dq_fpclassv2df_mask = 8400,
|
||
|
CODE_FOR_avx512dq_vmfpclassv8hf = 8401,
|
||
|
CODE_FOR_avx512dq_vmfpclassv8hf_mask = 8402,
|
||
|
CODE_FOR_avx512dq_vmfpclassv4sf = 8403,
|
||
|
CODE_FOR_avx512dq_vmfpclassv4sf_mask = 8404,
|
||
|
CODE_FOR_avx512dq_vmfpclassv2df = 8405,
|
||
|
CODE_FOR_avx512dq_vmfpclassv2df_mask = 8406,
|
||
|
CODE_FOR_avx512bw_getmantv32hf = 8407,
|
||
|
CODE_FOR_avx512bw_getmantv32hf_round = 8408,
|
||
|
CODE_FOR_avx512bw_getmantv32hf_mask = 8409,
|
||
|
CODE_FOR_avx512bw_getmantv32hf_mask_round = 8410,
|
||
|
CODE_FOR_avx512vl_getmantv16hf = 8411,
|
||
|
CODE_FOR_avx512vl_getmantv16hf_round = 8412,
|
||
|
CODE_FOR_avx512vl_getmantv16hf_mask = 8413,
|
||
|
CODE_FOR_avx512vl_getmantv16hf_mask_round = 8414,
|
||
|
CODE_FOR_avx512fp16_getmantv8hf = 8415,
|
||
|
CODE_FOR_avx512fp16_getmantv8hf_round = 8416,
|
||
|
CODE_FOR_avx512fp16_getmantv8hf_mask = 8417,
|
||
|
CODE_FOR_avx512fp16_getmantv8hf_mask_round = 8418,
|
||
|
CODE_FOR_avx512f_getmantv16sf = 8419,
|
||
|
CODE_FOR_avx512f_getmantv16sf_round = 8420,
|
||
|
CODE_FOR_avx512f_getmantv16sf_mask = 8421,
|
||
|
CODE_FOR_avx512f_getmantv16sf_mask_round = 8422,
|
||
|
CODE_FOR_avx512vl_getmantv8sf = 8423,
|
||
|
CODE_FOR_avx512vl_getmantv8sf_round = 8424,
|
||
|
CODE_FOR_avx512vl_getmantv8sf_mask = 8425,
|
||
|
CODE_FOR_avx512vl_getmantv8sf_mask_round = 8426,
|
||
|
CODE_FOR_avx512vl_getmantv4sf = 8427,
|
||
|
CODE_FOR_avx512vl_getmantv4sf_round = 8428,
|
||
|
CODE_FOR_avx512vl_getmantv4sf_mask = 8429,
|
||
|
CODE_FOR_avx512vl_getmantv4sf_mask_round = 8430,
|
||
|
CODE_FOR_avx512f_getmantv8df = 8431,
|
||
|
CODE_FOR_avx512f_getmantv8df_round = 8432,
|
||
|
CODE_FOR_avx512f_getmantv8df_mask = 8433,
|
||
|
CODE_FOR_avx512f_getmantv8df_mask_round = 8434,
|
||
|
CODE_FOR_avx512vl_getmantv4df = 8435,
|
||
|
CODE_FOR_avx512vl_getmantv4df_round = 8436,
|
||
|
CODE_FOR_avx512vl_getmantv4df_mask = 8437,
|
||
|
CODE_FOR_avx512vl_getmantv4df_mask_round = 8438,
|
||
|
CODE_FOR_avx512vl_getmantv2df = 8439,
|
||
|
CODE_FOR_avx512vl_getmantv2df_round = 8440,
|
||
|
CODE_FOR_avx512vl_getmantv2df_mask = 8441,
|
||
|
CODE_FOR_avx512vl_getmantv2df_mask_round = 8442,
|
||
|
CODE_FOR_avx512f_vgetmantv8hf = 8443,
|
||
|
CODE_FOR_avx512f_vgetmantv8hf_mask = 8444,
|
||
|
CODE_FOR_avx512f_vgetmantv8hf_round = 8445,
|
||
|
CODE_FOR_avx512f_vgetmantv8hf_mask_round = 8446,
|
||
|
CODE_FOR_avx512f_vgetmantv4sf = 8447,
|
||
|
CODE_FOR_avx512f_vgetmantv4sf_mask = 8448,
|
||
|
CODE_FOR_avx512f_vgetmantv4sf_round = 8449,
|
||
|
CODE_FOR_avx512f_vgetmantv4sf_mask_round = 8450,
|
||
|
CODE_FOR_avx512f_vgetmantv2df = 8451,
|
||
|
CODE_FOR_avx512f_vgetmantv2df_mask = 8452,
|
||
|
CODE_FOR_avx512f_vgetmantv2df_round = 8453,
|
||
|
CODE_FOR_avx512f_vgetmantv2df_mask_round = 8454,
|
||
|
CODE_FOR_avx512bw_dbpsadbwv8hi_mask = 8456,
|
||
|
CODE_FOR_avx512bw_dbpsadbwv16hi_mask = 8458,
|
||
|
CODE_FOR_avx512bw_dbpsadbwv32hi_mask = 8460,
|
||
|
CODE_FOR_clzv16si2 = 8461,
|
||
|
CODE_FOR_clzv16si2_mask = 8462,
|
||
|
CODE_FOR_clzv8si2 = 8463,
|
||
|
CODE_FOR_clzv8si2_mask = 8464,
|
||
|
CODE_FOR_clzv4si2 = 8465,
|
||
|
CODE_FOR_clzv4si2_mask = 8466,
|
||
|
CODE_FOR_clzv8di2 = 8467,
|
||
|
CODE_FOR_clzv8di2_mask = 8468,
|
||
|
CODE_FOR_clzv4di2 = 8469,
|
||
|
CODE_FOR_clzv4di2_mask = 8470,
|
||
|
CODE_FOR_clzv2di2 = 8471,
|
||
|
CODE_FOR_clzv2di2_mask = 8472,
|
||
|
CODE_FOR_conflictv16si_mask = 8474,
|
||
|
CODE_FOR_conflictv8si_mask = 8476,
|
||
|
CODE_FOR_conflictv4si_mask = 8478,
|
||
|
CODE_FOR_conflictv8di_mask = 8480,
|
||
|
CODE_FOR_conflictv4di_mask = 8482,
|
||
|
CODE_FOR_conflictv2di_mask = 8484,
|
||
|
CODE_FOR_sha1msg1 = 8485,
|
||
|
CODE_FOR_sha1msg2 = 8486,
|
||
|
CODE_FOR_sha1nexte = 8487,
|
||
|
CODE_FOR_sha1rnds4 = 8488,
|
||
|
CODE_FOR_sha256msg1 = 8489,
|
||
|
CODE_FOR_sha256msg2 = 8490,
|
||
|
CODE_FOR_sha256rnds2 = 8491,
|
||
|
CODE_FOR_avx512f_si512_si = 8492,
|
||
|
CODE_FOR_avx512f_ps512_ps = 8493,
|
||
|
CODE_FOR_avx512f_pd512_pd = 8494,
|
||
|
CODE_FOR_avx512f_si512_256si = 8495,
|
||
|
CODE_FOR_avx512f_ps512_256ps = 8496,
|
||
|
CODE_FOR_avx512f_pd512_256pd = 8497,
|
||
|
CODE_FOR_vpamdd52luqv8di = 8498,
|
||
|
CODE_FOR_vpamdd52luqv8di_maskz_1 = 8499,
|
||
|
CODE_FOR_vpamdd52huqv8di = 8500,
|
||
|
CODE_FOR_vpamdd52huqv8di_maskz_1 = 8501,
|
||
|
CODE_FOR_vpamdd52luqv4di = 8502,
|
||
|
CODE_FOR_vpamdd52luqv4di_maskz_1 = 8503,
|
||
|
CODE_FOR_vpamdd52huqv4di = 8504,
|
||
|
CODE_FOR_vpamdd52huqv4di_maskz_1 = 8505,
|
||
|
CODE_FOR_vpamdd52luqv2di = 8506,
|
||
|
CODE_FOR_vpamdd52luqv2di_maskz_1 = 8507,
|
||
|
CODE_FOR_vpamdd52huqv2di = 8508,
|
||
|
CODE_FOR_vpamdd52huqv2di_maskz_1 = 8509,
|
||
|
CODE_FOR_vpamdd52luqv8di_mask = 8510,
|
||
|
CODE_FOR_vpamdd52huqv8di_mask = 8511,
|
||
|
CODE_FOR_vpamdd52luqv4di_mask = 8512,
|
||
|
CODE_FOR_vpamdd52huqv4di_mask = 8513,
|
||
|
CODE_FOR_vpamdd52luqv2di_mask = 8514,
|
||
|
CODE_FOR_vpamdd52huqv2di_mask = 8515,
|
||
|
CODE_FOR_vpmultishiftqbv64qi = 8516,
|
||
|
CODE_FOR_vpmultishiftqbv64qi_mask = 8517,
|
||
|
CODE_FOR_vpmultishiftqbv16qi = 8518,
|
||
|
CODE_FOR_vpmultishiftqbv16qi_mask = 8519,
|
||
|
CODE_FOR_vpmultishiftqbv32qi = 8520,
|
||
|
CODE_FOR_vpmultishiftqbv32qi_mask = 8521,
|
||
|
CODE_FOR_avx5124fmaddps_4fmaddps = 8524,
|
||
|
CODE_FOR_avx5124fmaddps_4fmaddps_mask = 8525,
|
||
|
CODE_FOR_avx5124fmaddps_4fmaddps_maskz = 8526,
|
||
|
CODE_FOR_avx5124fmaddps_4fmaddss = 8527,
|
||
|
CODE_FOR_avx5124fmaddps_4fmaddss_mask = 8528,
|
||
|
CODE_FOR_avx5124fmaddps_4fmaddss_maskz = 8529,
|
||
|
CODE_FOR_avx5124fmaddps_4fnmaddps = 8530,
|
||
|
CODE_FOR_avx5124fmaddps_4fnmaddps_mask = 8531,
|
||
|
CODE_FOR_avx5124fmaddps_4fnmaddps_maskz = 8532,
|
||
|
CODE_FOR_avx5124fmaddps_4fnmaddss = 8533,
|
||
|
CODE_FOR_avx5124fmaddps_4fnmaddss_mask = 8534,
|
||
|
CODE_FOR_avx5124fmaddps_4fnmaddss_maskz = 8535,
|
||
|
CODE_FOR_avx5124vnniw_vp4dpwssd = 8536,
|
||
|
CODE_FOR_avx5124vnniw_vp4dpwssd_mask = 8537,
|
||
|
CODE_FOR_avx5124vnniw_vp4dpwssd_maskz = 8538,
|
||
|
CODE_FOR_avx5124vnniw_vp4dpwssds = 8539,
|
||
|
CODE_FOR_avx5124vnniw_vp4dpwssds_mask = 8540,
|
||
|
CODE_FOR_avx5124vnniw_vp4dpwssds_maskz = 8541,
|
||
|
CODE_FOR_vpopcountv16si = 8542,
|
||
|
CODE_FOR_vpopcountv16si_mask = 8543,
|
||
|
CODE_FOR_vpopcountv8si = 8544,
|
||
|
CODE_FOR_vpopcountv8si_mask = 8545,
|
||
|
CODE_FOR_vpopcountv4si = 8546,
|
||
|
CODE_FOR_vpopcountv4si_mask = 8547,
|
||
|
CODE_FOR_vpopcountv8di = 8548,
|
||
|
CODE_FOR_vpopcountv8di_mask = 8549,
|
||
|
CODE_FOR_vpopcountv4di = 8550,
|
||
|
CODE_FOR_vpopcountv4di_mask = 8551,
|
||
|
CODE_FOR_vpopcountv2di = 8552,
|
||
|
CODE_FOR_vpopcountv2di_mask = 8553,
|
||
|
CODE_FOR_vpopcountv64qi = 8562,
|
||
|
CODE_FOR_vpopcountv64qi_mask = 8563,
|
||
|
CODE_FOR_vpopcountv16qi = 8564,
|
||
|
CODE_FOR_vpopcountv16qi_mask = 8565,
|
||
|
CODE_FOR_vpopcountv32qi = 8566,
|
||
|
CODE_FOR_vpopcountv32qi_mask = 8567,
|
||
|
CODE_FOR_vpopcountv32hi = 8568,
|
||
|
CODE_FOR_vpopcountv32hi_mask = 8569,
|
||
|
CODE_FOR_vpopcountv16hi = 8570,
|
||
|
CODE_FOR_vpopcountv16hi_mask = 8571,
|
||
|
CODE_FOR_vpopcountv8hi = 8572,
|
||
|
CODE_FOR_vpopcountv8hi_mask = 8573,
|
||
|
CODE_FOR_vgf2p8affineinvqb_v64qi = 8574,
|
||
|
CODE_FOR_vgf2p8affineinvqb_v64qi_mask = 8575,
|
||
|
CODE_FOR_vgf2p8affineinvqb_v32qi = 8576,
|
||
|
CODE_FOR_vgf2p8affineinvqb_v32qi_mask = 8577,
|
||
|
CODE_FOR_vgf2p8affineinvqb_v16qi = 8578,
|
||
|
CODE_FOR_vgf2p8affineinvqb_v16qi_mask = 8579,
|
||
|
CODE_FOR_vgf2p8affineqb_v64qi = 8580,
|
||
|
CODE_FOR_vgf2p8affineqb_v64qi_mask = 8581,
|
||
|
CODE_FOR_vgf2p8affineqb_v32qi = 8582,
|
||
|
CODE_FOR_vgf2p8affineqb_v32qi_mask = 8583,
|
||
|
CODE_FOR_vgf2p8affineqb_v16qi = 8584,
|
||
|
CODE_FOR_vgf2p8affineqb_v16qi_mask = 8585,
|
||
|
CODE_FOR_vgf2p8mulb_v64qi = 8586,
|
||
|
CODE_FOR_vgf2p8mulb_v64qi_mask = 8587,
|
||
|
CODE_FOR_vgf2p8mulb_v32qi = 8588,
|
||
|
CODE_FOR_vgf2p8mulb_v32qi_mask = 8589,
|
||
|
CODE_FOR_vgf2p8mulb_v16qi = 8590,
|
||
|
CODE_FOR_vgf2p8mulb_v16qi_mask = 8591,
|
||
|
CODE_FOR_vpshrd_v32hi = 8592,
|
||
|
CODE_FOR_vpshrd_v32hi_mask = 8593,
|
||
|
CODE_FOR_vpshrd_v16si = 8594,
|
||
|
CODE_FOR_vpshrd_v16si_mask = 8595,
|
||
|
CODE_FOR_vpshrd_v8di = 8596,
|
||
|
CODE_FOR_vpshrd_v8di_mask = 8597,
|
||
|
CODE_FOR_vpshrd_v16hi = 8598,
|
||
|
CODE_FOR_vpshrd_v16hi_mask = 8599,
|
||
|
CODE_FOR_vpshrd_v8si = 8600,
|
||
|
CODE_FOR_vpshrd_v8si_mask = 8601,
|
||
|
CODE_FOR_vpshrd_v4di = 8602,
|
||
|
CODE_FOR_vpshrd_v4di_mask = 8603,
|
||
|
CODE_FOR_vpshrd_v8hi = 8604,
|
||
|
CODE_FOR_vpshrd_v8hi_mask = 8605,
|
||
|
CODE_FOR_vpshrd_v4si = 8606,
|
||
|
CODE_FOR_vpshrd_v4si_mask = 8607,
|
||
|
CODE_FOR_vpshrd_v2di = 8608,
|
||
|
CODE_FOR_vpshrd_v2di_mask = 8609,
|
||
|
CODE_FOR_vpshld_v32hi = 8610,
|
||
|
CODE_FOR_vpshld_v32hi_mask = 8611,
|
||
|
CODE_FOR_vpshld_v16si = 8612,
|
||
|
CODE_FOR_vpshld_v16si_mask = 8613,
|
||
|
CODE_FOR_vpshld_v8di = 8614,
|
||
|
CODE_FOR_vpshld_v8di_mask = 8615,
|
||
|
CODE_FOR_vpshld_v16hi = 8616,
|
||
|
CODE_FOR_vpshld_v16hi_mask = 8617,
|
||
|
CODE_FOR_vpshld_v8si = 8618,
|
||
|
CODE_FOR_vpshld_v8si_mask = 8619,
|
||
|
CODE_FOR_vpshld_v4di = 8620,
|
||
|
CODE_FOR_vpshld_v4di_mask = 8621,
|
||
|
CODE_FOR_vpshld_v8hi = 8622,
|
||
|
CODE_FOR_vpshld_v8hi_mask = 8623,
|
||
|
CODE_FOR_vpshld_v4si = 8624,
|
||
|
CODE_FOR_vpshld_v4si_mask = 8625,
|
||
|
CODE_FOR_vpshld_v2di = 8626,
|
||
|
CODE_FOR_vpshld_v2di_mask = 8627,
|
||
|
CODE_FOR_vpshrdv_v32hi = 8628,
|
||
|
CODE_FOR_vpshrdv_v16si = 8629,
|
||
|
CODE_FOR_vpshrdv_v8di = 8630,
|
||
|
CODE_FOR_vpshrdv_v16hi = 8631,
|
||
|
CODE_FOR_vpshrdv_v8si = 8632,
|
||
|
CODE_FOR_vpshrdv_v4di = 8633,
|
||
|
CODE_FOR_vpshrdv_v8hi = 8634,
|
||
|
CODE_FOR_vpshrdv_v4si = 8635,
|
||
|
CODE_FOR_vpshrdv_v2di = 8636,
|
||
|
CODE_FOR_vpshrdv_v32hi_mask = 8637,
|
||
|
CODE_FOR_vpshrdv_v16si_mask = 8638,
|
||
|
CODE_FOR_vpshrdv_v8di_mask = 8639,
|
||
|
CODE_FOR_vpshrdv_v16hi_mask = 8640,
|
||
|
CODE_FOR_vpshrdv_v8si_mask = 8641,
|
||
|
CODE_FOR_vpshrdv_v4di_mask = 8642,
|
||
|
CODE_FOR_vpshrdv_v8hi_mask = 8643,
|
||
|
CODE_FOR_vpshrdv_v4si_mask = 8644,
|
||
|
CODE_FOR_vpshrdv_v2di_mask = 8645,
|
||
|
CODE_FOR_vpshrdv_v32hi_maskz_1 = 8646,
|
||
|
CODE_FOR_vpshrdv_v16si_maskz_1 = 8647,
|
||
|
CODE_FOR_vpshrdv_v8di_maskz_1 = 8648,
|
||
|
CODE_FOR_vpshrdv_v16hi_maskz_1 = 8649,
|
||
|
CODE_FOR_vpshrdv_v8si_maskz_1 = 8650,
|
||
|
CODE_FOR_vpshrdv_v4di_maskz_1 = 8651,
|
||
|
CODE_FOR_vpshrdv_v8hi_maskz_1 = 8652,
|
||
|
CODE_FOR_vpshrdv_v4si_maskz_1 = 8653,
|
||
|
CODE_FOR_vpshrdv_v2di_maskz_1 = 8654,
|
||
|
CODE_FOR_vpshldv_v32hi = 8655,
|
||
|
CODE_FOR_vpshldv_v16si = 8656,
|
||
|
CODE_FOR_vpshldv_v8di = 8657,
|
||
|
CODE_FOR_vpshldv_v16hi = 8658,
|
||
|
CODE_FOR_vpshldv_v8si = 8659,
|
||
|
CODE_FOR_vpshldv_v4di = 8660,
|
||
|
CODE_FOR_vpshldv_v8hi = 8661,
|
||
|
CODE_FOR_vpshldv_v4si = 8662,
|
||
|
CODE_FOR_vpshldv_v2di = 8663,
|
||
|
CODE_FOR_vpshldv_v32hi_mask = 8664,
|
||
|
CODE_FOR_vpshldv_v16si_mask = 8665,
|
||
|
CODE_FOR_vpshldv_v8di_mask = 8666,
|
||
|
CODE_FOR_vpshldv_v16hi_mask = 8667,
|
||
|
CODE_FOR_vpshldv_v8si_mask = 8668,
|
||
|
CODE_FOR_vpshldv_v4di_mask = 8669,
|
||
|
CODE_FOR_vpshldv_v8hi_mask = 8670,
|
||
|
CODE_FOR_vpshldv_v4si_mask = 8671,
|
||
|
CODE_FOR_vpshldv_v2di_mask = 8672,
|
||
|
CODE_FOR_vpshldv_v32hi_maskz_1 = 8673,
|
||
|
CODE_FOR_vpshldv_v16si_maskz_1 = 8674,
|
||
|
CODE_FOR_vpshldv_v8di_maskz_1 = 8675,
|
||
|
CODE_FOR_vpshldv_v16hi_maskz_1 = 8676,
|
||
|
CODE_FOR_vpshldv_v8si_maskz_1 = 8677,
|
||
|
CODE_FOR_vpshldv_v4di_maskz_1 = 8678,
|
||
|
CODE_FOR_vpshldv_v8hi_maskz_1 = 8679,
|
||
|
CODE_FOR_vpshldv_v4si_maskz_1 = 8680,
|
||
|
CODE_FOR_vpshldv_v2di_maskz_1 = 8681,
|
||
|
CODE_FOR_vpdpbusd_v16si = 8682,
|
||
|
CODE_FOR_vpdpbusd_v8si = 8683,
|
||
|
CODE_FOR_vpdpbusd_v4si = 8684,
|
||
|
CODE_FOR_vpdpbusd_v16si_mask = 8685,
|
||
|
CODE_FOR_vpdpbusd_v8si_mask = 8686,
|
||
|
CODE_FOR_vpdpbusd_v4si_mask = 8687,
|
||
|
CODE_FOR_vpdpbusd_v16si_maskz_1 = 8688,
|
||
|
CODE_FOR_vpdpbusd_v8si_maskz_1 = 8689,
|
||
|
CODE_FOR_vpdpbusd_v4si_maskz_1 = 8690,
|
||
|
CODE_FOR_vpdpbusds_v16si = 8691,
|
||
|
CODE_FOR_vpdpbusds_v8si = 8692,
|
||
|
CODE_FOR_vpdpbusds_v4si = 8693,
|
||
|
CODE_FOR_vpdpbusds_v16si_mask = 8694,
|
||
|
CODE_FOR_vpdpbusds_v8si_mask = 8695,
|
||
|
CODE_FOR_vpdpbusds_v4si_mask = 8696,
|
||
|
CODE_FOR_vpdpbusds_v16si_maskz_1 = 8697,
|
||
|
CODE_FOR_vpdpbusds_v8si_maskz_1 = 8698,
|
||
|
CODE_FOR_vpdpbusds_v4si_maskz_1 = 8699,
|
||
|
CODE_FOR_vpdpwssd_v16si = 8700,
|
||
|
CODE_FOR_vpdpwssd_v8si = 8701,
|
||
|
CODE_FOR_vpdpwssd_v4si = 8702,
|
||
|
CODE_FOR_vpdpwssd_v16si_mask = 8703,
|
||
|
CODE_FOR_vpdpwssd_v8si_mask = 8704,
|
||
|
CODE_FOR_vpdpwssd_v4si_mask = 8705,
|
||
|
CODE_FOR_vpdpwssd_v16si_maskz_1 = 8706,
|
||
|
CODE_FOR_vpdpwssd_v8si_maskz_1 = 8707,
|
||
|
CODE_FOR_vpdpwssd_v4si_maskz_1 = 8708,
|
||
|
CODE_FOR_vpdpwssds_v16si = 8709,
|
||
|
CODE_FOR_vpdpwssds_v8si = 8710,
|
||
|
CODE_FOR_vpdpwssds_v4si = 8711,
|
||
|
CODE_FOR_vpdpwssds_v16si_mask = 8712,
|
||
|
CODE_FOR_vpdpwssds_v8si_mask = 8713,
|
||
|
CODE_FOR_vpdpwssds_v4si_mask = 8714,
|
||
|
CODE_FOR_vpdpwssds_v16si_maskz_1 = 8715,
|
||
|
CODE_FOR_vpdpwssds_v8si_maskz_1 = 8716,
|
||
|
CODE_FOR_vpdpwssds_v4si_maskz_1 = 8717,
|
||
|
CODE_FOR_vaesdec_v32qi = 8718,
|
||
|
CODE_FOR_vaesdec_v16qi = 8719,
|
||
|
CODE_FOR_vaesdec_v64qi = 8720,
|
||
|
CODE_FOR_vaesdeclast_v32qi = 8721,
|
||
|
CODE_FOR_vaesdeclast_v16qi = 8722,
|
||
|
CODE_FOR_vaesdeclast_v64qi = 8723,
|
||
|
CODE_FOR_vaesenc_v32qi = 8724,
|
||
|
CODE_FOR_vaesenc_v16qi = 8725,
|
||
|
CODE_FOR_vaesenc_v64qi = 8726,
|
||
|
CODE_FOR_vaesenclast_v32qi = 8727,
|
||
|
CODE_FOR_vaesenclast_v16qi = 8728,
|
||
|
CODE_FOR_vaesenclast_v64qi = 8729,
|
||
|
CODE_FOR_vpclmulqdq_v8di = 8730,
|
||
|
CODE_FOR_vpclmulqdq_v4di = 8731,
|
||
|
CODE_FOR_vpclmulqdq_v2di = 8732,
|
||
|
CODE_FOR_avx512vl_vpshufbitqmbv64qi = 8733,
|
||
|
CODE_FOR_avx512vl_vpshufbitqmbv64qi_mask = 8734,
|
||
|
CODE_FOR_avx512vl_vpshufbitqmbv32qi = 8735,
|
||
|
CODE_FOR_avx512vl_vpshufbitqmbv32qi_mask = 8736,
|
||
|
CODE_FOR_avx512vl_vpshufbitqmbv16qi = 8737,
|
||
|
CODE_FOR_avx512vl_vpshufbitqmbv16qi_mask = 8738,
|
||
|
CODE_FOR_avx512vp2intersect_2intersectv8di = 8741,
|
||
|
CODE_FOR_avx512vp2intersect_2intersectv4di = 8742,
|
||
|
CODE_FOR_avx512vp2intersect_2intersectv2di = 8743,
|
||
|
CODE_FOR_avx512vp2intersect_2intersectv8si = 8744,
|
||
|
CODE_FOR_avx512vp2intersect_2intersectv4si = 8745,
|
||
|
CODE_FOR_avx512vp2intersect_2intersectv16si = 8746,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v32hi = 8747,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v32hi_mask = 8748,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v16hi = 8749,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_mask = 8750,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v8hi = 8751,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_mask = 8752,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v16sf = 8753,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v16sf_mask = 8754,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v8sf = 8755,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v8sf_mask = 8756,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v4sf = 8757,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v4sf_mask = 8758,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v16sf = 8759,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v16sf_maskz_1 = 8760,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v8sf = 8761,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v8sf_maskz_1 = 8762,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v4sf = 8763,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v4sf_maskz_1 = 8764,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v16sf_mask = 8765,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v8sf_mask = 8766,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v4sf_mask = 8767,
|
||
|
CODE_FOR_loadiwkey = 8768,
|
||
|
CODE_FOR_aesdec128klu8 = 8771,
|
||
|
CODE_FOR_aesdec256klu8 = 8772,
|
||
|
CODE_FOR_aesenc128klu8 = 8773,
|
||
|
CODE_FOR_aesenc256klu8 = 8774,
|
||
|
CODE_FOR_mfence_sse2 = 8781,
|
||
|
CODE_FOR_mfence_nosse = 8782,
|
||
|
CODE_FOR_atomic_loaddi_fpu = 8783,
|
||
|
CODE_FOR_atomic_storeqi_1 = 8784,
|
||
|
CODE_FOR_atomic_storehi_1 = 8785,
|
||
|
CODE_FOR_atomic_storesi_1 = 8786,
|
||
|
CODE_FOR_atomic_storedi_1 = 8787,
|
||
|
CODE_FOR_atomic_storedi_fpu = 8788,
|
||
|
CODE_FOR_loaddi_via_fpu = 8789,
|
||
|
CODE_FOR_storedi_via_fpu = 8790,
|
||
|
CODE_FOR_loaddi_via_sse = 8791,
|
||
|
CODE_FOR_storedi_via_sse = 8792,
|
||
|
CODE_FOR_atomic_compare_and_swapdi_doubleword = 8793,
|
||
|
CODE_FOR_atomic_compare_and_swapti_doubleword = 8794,
|
||
|
CODE_FOR_atomic_compare_and_swapqi_1 = 8795,
|
||
|
CODE_FOR_atomic_compare_and_swaphi_1 = 8796,
|
||
|
CODE_FOR_atomic_compare_and_swapsi_1 = 8797,
|
||
|
CODE_FOR_atomic_compare_and_swapdi_1 = 8798,
|
||
|
CODE_FOR_atomic_fetch_addqi = 8799,
|
||
|
CODE_FOR_atomic_fetch_addhi = 8800,
|
||
|
CODE_FOR_atomic_fetch_addsi = 8801,
|
||
|
CODE_FOR_atomic_fetch_adddi = 8802,
|
||
|
CODE_FOR_atomic_exchangeqi = 8807,
|
||
|
CODE_FOR_atomic_exchangehi = 8808,
|
||
|
CODE_FOR_atomic_exchangesi = 8809,
|
||
|
CODE_FOR_atomic_exchangedi = 8810,
|
||
|
CODE_FOR_atomic_addqi = 8811,
|
||
|
CODE_FOR_atomic_addhi = 8812,
|
||
|
CODE_FOR_atomic_addsi = 8813,
|
||
|
CODE_FOR_atomic_adddi = 8814,
|
||
|
CODE_FOR_atomic_subqi = 8815,
|
||
|
CODE_FOR_atomic_subhi = 8816,
|
||
|
CODE_FOR_atomic_subsi = 8817,
|
||
|
CODE_FOR_atomic_subdi = 8818,
|
||
|
CODE_FOR_atomic_andqi = 8819,
|
||
|
CODE_FOR_atomic_orqi = 8820,
|
||
|
CODE_FOR_atomic_xorqi = 8821,
|
||
|
CODE_FOR_atomic_andhi = 8822,
|
||
|
CODE_FOR_atomic_orhi = 8823,
|
||
|
CODE_FOR_atomic_xorhi = 8824,
|
||
|
CODE_FOR_atomic_andsi = 8825,
|
||
|
CODE_FOR_atomic_orsi = 8826,
|
||
|
CODE_FOR_atomic_xorsi = 8827,
|
||
|
CODE_FOR_atomic_anddi = 8828,
|
||
|
CODE_FOR_atomic_ordi = 8829,
|
||
|
CODE_FOR_atomic_xordi = 8830,
|
||
|
CODE_FOR_atomic_bit_test_and_sethi_1 = 8831,
|
||
|
CODE_FOR_atomic_bit_test_and_setsi_1 = 8832,
|
||
|
CODE_FOR_atomic_bit_test_and_setdi_1 = 8833,
|
||
|
CODE_FOR_atomic_bit_test_and_complementhi_1 = 8834,
|
||
|
CODE_FOR_atomic_bit_test_and_complementsi_1 = 8835,
|
||
|
CODE_FOR_atomic_bit_test_and_complementdi_1 = 8836,
|
||
|
CODE_FOR_atomic_bit_test_and_resethi_1 = 8837,
|
||
|
CODE_FOR_atomic_bit_test_and_resetsi_1 = 8838,
|
||
|
CODE_FOR_atomic_bit_test_and_resetdi_1 = 8839,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0qi_1 = 8840,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0hi_1 = 8841,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0si_1 = 8842,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0di_1 = 8843,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0qi_1 = 8844,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0hi_1 = 8845,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0si_1 = 8846,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0di_1 = 8847,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0qi_1 = 8848,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0qi_1 = 8849,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0qi_1 = 8850,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0hi_1 = 8851,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0hi_1 = 8852,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0hi_1 = 8853,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0si_1 = 8854,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0si_1 = 8855,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0si_1 = 8856,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0di_1 = 8857,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0di_1 = 8858,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0di_1 = 8859,
|
||
|
CODE_FOR_cbranchqi4 = 8860,
|
||
|
CODE_FOR_cbranchhi4 = 8861,
|
||
|
CODE_FOR_cbranchsi4 = 8862,
|
||
|
CODE_FOR_cbranchdi4 = 8863,
|
||
|
CODE_FOR_cbranchti4 = 8864,
|
||
|
CODE_FOR_cstoreqi4 = 8865,
|
||
|
CODE_FOR_cstorehi4 = 8866,
|
||
|
CODE_FOR_cstoresi4 = 8867,
|
||
|
CODE_FOR_cstoredi4 = 8868,
|
||
|
CODE_FOR_cmpsi_1 = 8869,
|
||
|
CODE_FOR_cmpdi_1 = 8870,
|
||
|
CODE_FOR_cmpqi_ext_3 = 8871,
|
||
|
CODE_FOR_cbranchxf4 = 8872,
|
||
|
CODE_FOR_cstorexf4 = 8873,
|
||
|
CODE_FOR_cbranchhf4 = 8874,
|
||
|
CODE_FOR_cbranchsf4 = 8875,
|
||
|
CODE_FOR_cbranchdf4 = 8876,
|
||
|
CODE_FOR_cstorehf4 = 8877,
|
||
|
CODE_FOR_cstoresf4 = 8878,
|
||
|
CODE_FOR_cstoredf4 = 8879,
|
||
|
CODE_FOR_cbranchcc4 = 8880,
|
||
|
CODE_FOR_cstorecc4 = 8881,
|
||
|
CODE_FOR_reload_noff_store = 8882,
|
||
|
CODE_FOR_reload_noff_load = 8883,
|
||
|
CODE_FOR_movxi = 8884,
|
||
|
CODE_FOR_movoi = 8885,
|
||
|
CODE_FOR_movti = 8886,
|
||
|
CODE_FOR_movcdi = 8887,
|
||
|
CODE_FOR_movqi = 8888,
|
||
|
CODE_FOR_movhi = 8889,
|
||
|
CODE_FOR_movsi = 8890,
|
||
|
CODE_FOR_movdi = 8891,
|
||
|
CODE_FOR_movstrictqi = 8892,
|
||
|
CODE_FOR_movstricthi = 8893,
|
||
|
CODE_FOR_extvhi = 8894,
|
||
|
CODE_FOR_extvsi = 8895,
|
||
|
CODE_FOR_extzvhi = 8896,
|
||
|
CODE_FOR_extzvsi = 8897,
|
||
|
CODE_FOR_extzvdi = 8898,
|
||
|
CODE_FOR_insvhi = 8899,
|
||
|
CODE_FOR_insvsi = 8900,
|
||
|
CODE_FOR_insvdi = 8901,
|
||
|
CODE_FOR_movtf = 8902,
|
||
|
CODE_FOR_movhf = 8903,
|
||
|
CODE_FOR_movsf = 8904,
|
||
|
CODE_FOR_movdf = 8905,
|
||
|
CODE_FOR_movxf = 8906,
|
||
|
CODE_FOR_zero_extendsidi2 = 8907,
|
||
|
CODE_FOR_zero_extendqisi2 = 8908,
|
||
|
CODE_FOR_zero_extendhisi2 = 8909,
|
||
|
CODE_FOR_zero_extendqihi2 = 8910,
|
||
|
CODE_FOR_extendsidi2 = 8911,
|
||
|
CODE_FOR_extendsfdf2 = 8912,
|
||
|
CODE_FOR_extendhfsf2 = 8913,
|
||
|
CODE_FOR_extendhfdf2 = 8914,
|
||
|
CODE_FOR_extendsfxf2 = 8915,
|
||
|
CODE_FOR_extenddfxf2 = 8916,
|
||
|
CODE_FOR_truncsfhf2 = 8917,
|
||
|
CODE_FOR_truncdfhf2 = 8918,
|
||
|
CODE_FOR_fix_truncxfdi2 = 8919,
|
||
|
CODE_FOR_fix_truncsfdi2 = 8920,
|
||
|
CODE_FOR_fix_truncdfdi2 = 8921,
|
||
|
CODE_FOR_fix_truncxfsi2 = 8922,
|
||
|
CODE_FOR_fix_truncsfsi2 = 8923,
|
||
|
CODE_FOR_fix_truncdfsi2 = 8924,
|
||
|
CODE_FOR_fix_truncsfhi2 = 8925,
|
||
|
CODE_FOR_fix_truncdfhi2 = 8926,
|
||
|
CODE_FOR_fix_truncxfhi2 = 8927,
|
||
|
CODE_FOR_fixuns_truncsfsi2 = 8928,
|
||
|
CODE_FOR_fixuns_truncdfsi2 = 8929,
|
||
|
CODE_FOR_fixuns_trunchfhi2 = 8930,
|
||
|
CODE_FOR_fixuns_truncsfhi2 = 8931,
|
||
|
CODE_FOR_fixuns_truncdfhi2 = 8932,
|
||
|
CODE_FOR_floatsisf2 = 8933,
|
||
|
CODE_FOR_floatdisf2 = 8934,
|
||
|
CODE_FOR_floatsidf2 = 8935,
|
||
|
CODE_FOR_floatdidf2 = 8936,
|
||
|
CODE_FOR_floatunsqisf2 = 8937,
|
||
|
CODE_FOR_floatunshisf2 = 8938,
|
||
|
CODE_FOR_floatunsqidf2 = 8939,
|
||
|
CODE_FOR_floatunshidf2 = 8940,
|
||
|
CODE_FOR_floatunssisf2 = 8941,
|
||
|
CODE_FOR_floatunssidf2 = 8942,
|
||
|
CODE_FOR_floatunssixf2 = 8943,
|
||
|
CODE_FOR_floatunsdisf2 = 8944,
|
||
|
CODE_FOR_floatunsdidf2 = 8945,
|
||
|
CODE_FOR_addqi3 = 8946,
|
||
|
CODE_FOR_addhi3 = 8947,
|
||
|
CODE_FOR_addsi3 = 8948,
|
||
|
CODE_FOR_adddi3 = 8949,
|
||
|
CODE_FOR_addti3 = 8950,
|
||
|
CODE_FOR_addqi_ext_1 = 8951,
|
||
|
CODE_FOR_addvqi4 = 8952,
|
||
|
CODE_FOR_addvhi4 = 8953,
|
||
|
CODE_FOR_addvsi4 = 8954,
|
||
|
CODE_FOR_addvdi4 = 8955,
|
||
|
CODE_FOR_addvti4 = 8956,
|
||
|
CODE_FOR_uaddvqi4 = 8957,
|
||
|
CODE_FOR_uaddvhi4 = 8958,
|
||
|
CODE_FOR_uaddvsi4 = 8959,
|
||
|
CODE_FOR_uaddvdi4 = 8960,
|
||
|
CODE_FOR_uaddvti4 = 8961,
|
||
|
CODE_FOR_subqi3 = 8962,
|
||
|
CODE_FOR_subhi3 = 8963,
|
||
|
CODE_FOR_subsi3 = 8964,
|
||
|
CODE_FOR_subdi3 = 8965,
|
||
|
CODE_FOR_subti3 = 8966,
|
||
|
CODE_FOR_subvqi4 = 8967,
|
||
|
CODE_FOR_subvhi4 = 8968,
|
||
|
CODE_FOR_subvsi4 = 8969,
|
||
|
CODE_FOR_subvdi4 = 8970,
|
||
|
CODE_FOR_subvti4 = 8971,
|
||
|
CODE_FOR_usubvqi4 = 8972,
|
||
|
CODE_FOR_usubvhi4 = 8973,
|
||
|
CODE_FOR_usubvsi4 = 8974,
|
||
|
CODE_FOR_usubvdi4 = 8975,
|
||
|
CODE_FOR_addcarrysi_0 = 8976,
|
||
|
CODE_FOR_addcarrydi_0 = 8977,
|
||
|
CODE_FOR_subborrowsi_0 = 8978,
|
||
|
CODE_FOR_subborrowdi_0 = 8979,
|
||
|
CODE_FOR_addqi3_cconly_overflow = 8980,
|
||
|
CODE_FOR_addxf3 = 8981,
|
||
|
CODE_FOR_subxf3 = 8982,
|
||
|
CODE_FOR_addhf3 = 8983,
|
||
|
CODE_FOR_subhf3 = 8984,
|
||
|
CODE_FOR_addsf3 = 8985,
|
||
|
CODE_FOR_subsf3 = 8986,
|
||
|
CODE_FOR_adddf3 = 8987,
|
||
|
CODE_FOR_subdf3 = 8988,
|
||
|
CODE_FOR_mulhi3 = 8989,
|
||
|
CODE_FOR_mulsi3 = 8990,
|
||
|
CODE_FOR_muldi3 = 8991,
|
||
|
CODE_FOR_mulqi3 = 8992,
|
||
|
CODE_FOR_mulvhi4 = 8993,
|
||
|
CODE_FOR_mulvsi4 = 8994,
|
||
|
CODE_FOR_mulvdi4 = 8995,
|
||
|
CODE_FOR_umulvhi4 = 8996,
|
||
|
CODE_FOR_umulvsi4 = 8997,
|
||
|
CODE_FOR_umulvdi4 = 8998,
|
||
|
CODE_FOR_mulvqi4 = 8999,
|
||
|
CODE_FOR_umulvqi4 = 9000,
|
||
|
CODE_FOR_mulsidi3 = 9001,
|
||
|
CODE_FOR_umulsidi3 = 9002,
|
||
|
CODE_FOR_mulditi3 = 9003,
|
||
|
CODE_FOR_umulditi3 = 9004,
|
||
|
CODE_FOR_mulqihi3 = 9005,
|
||
|
CODE_FOR_umulqihi3 = 9006,
|
||
|
CODE_FOR_mulxf3 = 9007,
|
||
|
CODE_FOR_mulhf3 = 9008,
|
||
|
CODE_FOR_mulsf3 = 9009,
|
||
|
CODE_FOR_muldf3 = 9010,
|
||
|
CODE_FOR_divxf3 = 9011,
|
||
|
CODE_FOR_divhf3 = 9012,
|
||
|
CODE_FOR_divsf3 = 9013,
|
||
|
CODE_FOR_divdf3 = 9014,
|
||
|
CODE_FOR_divmodhi4 = 9015,
|
||
|
CODE_FOR_udivmodhi4 = 9016,
|
||
|
CODE_FOR_divmodsi4 = 9017,
|
||
|
CODE_FOR_udivmodsi4 = 9018,
|
||
|
CODE_FOR_divmoddi4 = 9019,
|
||
|
CODE_FOR_udivmoddi4 = 9020,
|
||
|
CODE_FOR_divmodqi4 = 9021,
|
||
|
CODE_FOR_udivmodqi4 = 9022,
|
||
|
CODE_FOR_testsi_ccno_1 = 9023,
|
||
|
CODE_FOR_testdi_ccno_1 = 9024,
|
||
|
CODE_FOR_testqi_ccz_1 = 9025,
|
||
|
CODE_FOR_testqi_ext_1_ccno = 9026,
|
||
|
CODE_FOR_andqi3 = 9027,
|
||
|
CODE_FOR_andhi3 = 9028,
|
||
|
CODE_FOR_andsi3 = 9029,
|
||
|
CODE_FOR_anddi3 = 9030,
|
||
|
CODE_FOR_andqi_ext_1 = 9031,
|
||
|
CODE_FOR_iorqi3 = 9032,
|
||
|
CODE_FOR_xorqi3 = 9033,
|
||
|
CODE_FOR_iorhi3 = 9034,
|
||
|
CODE_FOR_xorhi3 = 9035,
|
||
|
CODE_FOR_iorsi3 = 9036,
|
||
|
CODE_FOR_xorsi3 = 9037,
|
||
|
CODE_FOR_iordi3 = 9038,
|
||
|
CODE_FOR_xordi3 = 9039,
|
||
|
CODE_FOR_xorqi_ext_1_cc = 9040,
|
||
|
CODE_FOR_negqi2 = 9041,
|
||
|
CODE_FOR_neghi2 = 9042,
|
||
|
CODE_FOR_negsi2 = 9043,
|
||
|
CODE_FOR_negdi2 = 9044,
|
||
|
CODE_FOR_negti2 = 9045,
|
||
|
CODE_FOR_negvqi3 = 9046,
|
||
|
CODE_FOR_negvhi3 = 9047,
|
||
|
CODE_FOR_negvsi3 = 9048,
|
||
|
CODE_FOR_negvdi3 = 9049,
|
||
|
CODE_FOR_absqi2 = 9050,
|
||
|
CODE_FOR_abshi2 = 9051,
|
||
|
CODE_FOR_abssi2 = 9052,
|
||
|
CODE_FOR_absdi2 = 9053,
|
||
|
CODE_FOR_absti2 = 9054,
|
||
|
CODE_FOR_abstf2 = 9055,
|
||
|
CODE_FOR_negtf2 = 9056,
|
||
|
CODE_FOR_abshf2 = 9057,
|
||
|
CODE_FOR_neghf2 = 9058,
|
||
|
CODE_FOR_abssf2 = 9059,
|
||
|
CODE_FOR_negsf2 = 9060,
|
||
|
CODE_FOR_absdf2 = 9061,
|
||
|
CODE_FOR_negdf2 = 9062,
|
||
|
CODE_FOR_absxf2 = 9063,
|
||
|
CODE_FOR_negxf2 = 9064,
|
||
|
CODE_FOR_copysignhf3 = 9065,
|
||
|
CODE_FOR_copysignsf3 = 9066,
|
||
|
CODE_FOR_copysigndf3 = 9067,
|
||
|
CODE_FOR_copysigntf3 = 9068,
|
||
|
CODE_FOR_xorsignhf3 = 9069,
|
||
|
CODE_FOR_xorsignsf3 = 9070,
|
||
|
CODE_FOR_xorsigndf3 = 9071,
|
||
|
CODE_FOR_one_cmplqi2 = 9072,
|
||
|
CODE_FOR_one_cmplhi2 = 9073,
|
||
|
CODE_FOR_one_cmplsi2 = 9074,
|
||
|
CODE_FOR_one_cmpldi2 = 9075,
|
||
|
CODE_FOR_ashlqi3 = 9076,
|
||
|
CODE_FOR_ashlhi3 = 9077,
|
||
|
CODE_FOR_ashlsi3 = 9078,
|
||
|
CODE_FOR_ashldi3 = 9079,
|
||
|
CODE_FOR_ashlti3 = 9080,
|
||
|
CODE_FOR_x86_shiftsi_adj_1 = 9081,
|
||
|
CODE_FOR_x86_shiftdi_adj_1 = 9082,
|
||
|
CODE_FOR_x86_shiftsi_adj_2 = 9083,
|
||
|
CODE_FOR_x86_shiftdi_adj_2 = 9084,
|
||
|
CODE_FOR_lshrqi3 = 9085,
|
||
|
CODE_FOR_ashrqi3 = 9086,
|
||
|
CODE_FOR_lshrhi3 = 9087,
|
||
|
CODE_FOR_ashrhi3 = 9088,
|
||
|
CODE_FOR_lshrsi3 = 9089,
|
||
|
CODE_FOR_ashrsi3 = 9090,
|
||
|
CODE_FOR_lshrdi3 = 9091,
|
||
|
CODE_FOR_ashrdi3 = 9092,
|
||
|
CODE_FOR_lshrti3 = 9093,
|
||
|
CODE_FOR_ashrti3 = 9094,
|
||
|
CODE_FOR_x86_shiftsi_adj_3 = 9095,
|
||
|
CODE_FOR_x86_shiftdi_adj_3 = 9096,
|
||
|
CODE_FOR_rotlti3 = 9097,
|
||
|
CODE_FOR_rotrti3 = 9098,
|
||
|
CODE_FOR_rotldi3 = 9099,
|
||
|
CODE_FOR_rotrdi3 = 9100,
|
||
|
CODE_FOR_rotlqi3 = 9101,
|
||
|
CODE_FOR_rotrqi3 = 9102,
|
||
|
CODE_FOR_rotlhi3 = 9103,
|
||
|
CODE_FOR_rotrhi3 = 9104,
|
||
|
CODE_FOR_rotlsi3 = 9105,
|
||
|
CODE_FOR_rotrsi3 = 9106,
|
||
|
CODE_FOR_indirect_jump = 9107,
|
||
|
CODE_FOR_tablejump = 9108,
|
||
|
CODE_FOR_call = 9109,
|
||
|
CODE_FOR_sibcall = 9110,
|
||
|
CODE_FOR_call_pop = 9111,
|
||
|
CODE_FOR_call_value = 9112,
|
||
|
CODE_FOR_sibcall_value = 9113,
|
||
|
CODE_FOR_call_value_pop = 9114,
|
||
|
CODE_FOR_untyped_call = 9115,
|
||
|
CODE_FOR_memory_blockage = 9116,
|
||
|
CODE_FOR_return = 9117,
|
||
|
CODE_FOR_simple_return = 9118,
|
||
|
CODE_FOR_simple_return_indirect_internal = 9119,
|
||
|
CODE_FOR_prologue = 9120,
|
||
|
CODE_FOR_set_got = 9121,
|
||
|
CODE_FOR_set_got_labelled = 9122,
|
||
|
CODE_FOR_epilogue = 9123,
|
||
|
CODE_FOR_sibcall_epilogue = 9124,
|
||
|
CODE_FOR_eh_return = 9125,
|
||
|
CODE_FOR_leave_si = 9126,
|
||
|
CODE_FOR_leave_di = 9127,
|
||
|
CODE_FOR_split_stack_prologue = 9128,
|
||
|
CODE_FOR_split_stack_space_check = 9129,
|
||
|
CODE_FOR_ffssi2 = 9130,
|
||
|
CODE_FOR_ffsdi2 = 9131,
|
||
|
CODE_FOR_clzsi2 = 9132,
|
||
|
CODE_FOR_clzdi2 = 9133,
|
||
|
CODE_FOR_bmi2_bzhi_si3 = 9134,
|
||
|
CODE_FOR_bmi2_bzhi_di3 = 9135,
|
||
|
CODE_FOR_bswapdi2 = 9136,
|
||
|
CODE_FOR_bswapsi2 = 9137,
|
||
|
CODE_FOR_bswaphi2 = 9138,
|
||
|
CODE_FOR_paritydi2 = 9139,
|
||
|
CODE_FOR_paritysi2 = 9140,
|
||
|
CODE_FOR_parityhi2 = 9141,
|
||
|
CODE_FOR_parityqi2 = 9142,
|
||
|
CODE_FOR_tls_global_dynamic_32 = 9143,
|
||
|
CODE_FOR_tls_global_dynamic_64_si = 9144,
|
||
|
CODE_FOR_tls_global_dynamic_64_di = 9145,
|
||
|
CODE_FOR_tls_local_dynamic_base_32 = 9146,
|
||
|
CODE_FOR_tls_local_dynamic_base_64_si = 9147,
|
||
|
CODE_FOR_tls_local_dynamic_base_64_di = 9148,
|
||
|
CODE_FOR_get_thread_pointersi = 9149,
|
||
|
CODE_FOR_get_thread_pointerdi = 9150,
|
||
|
CODE_FOR_tls_dynamic_gnu2_32 = 9151,
|
||
|
CODE_FOR_tls_dynamic_gnu2_64_si = 9152,
|
||
|
CODE_FOR_tls_dynamic_gnu2_64_di = 9153,
|
||
|
CODE_FOR_rsqrtsf2 = 9154,
|
||
|
CODE_FOR_sqrtsf2 = 9155,
|
||
|
CODE_FOR_sqrtdf2 = 9156,
|
||
|
CODE_FOR_hypotsf3 = 9157,
|
||
|
CODE_FOR_hypotdf3 = 9158,
|
||
|
CODE_FOR_fmodxf3 = 9159,
|
||
|
CODE_FOR_fmodsf3 = 9160,
|
||
|
CODE_FOR_fmoddf3 = 9161,
|
||
|
CODE_FOR_remainderxf3 = 9162,
|
||
|
CODE_FOR_remaindersf3 = 9163,
|
||
|
CODE_FOR_remainderdf3 = 9164,
|
||
|
CODE_FOR_sinsf2 = 9165,
|
||
|
CODE_FOR_cossf2 = 9166,
|
||
|
CODE_FOR_sindf2 = 9167,
|
||
|
CODE_FOR_cosdf2 = 9168,
|
||
|
CODE_FOR_sincossf3 = 9169,
|
||
|
CODE_FOR_sincosdf3 = 9170,
|
||
|
CODE_FOR_tanxf2 = 9171,
|
||
|
CODE_FOR_tansf2 = 9172,
|
||
|
CODE_FOR_tandf2 = 9173,
|
||
|
CODE_FOR_atan2sf3 = 9174,
|
||
|
CODE_FOR_atan2df3 = 9175,
|
||
|
CODE_FOR_atanxf2 = 9176,
|
||
|
CODE_FOR_atansf2 = 9177,
|
||
|
CODE_FOR_atandf2 = 9178,
|
||
|
CODE_FOR_asinxf2 = 9179,
|
||
|
CODE_FOR_asinsf2 = 9180,
|
||
|
CODE_FOR_asindf2 = 9181,
|
||
|
CODE_FOR_acosxf2 = 9182,
|
||
|
CODE_FOR_acossf2 = 9183,
|
||
|
CODE_FOR_acosdf2 = 9184,
|
||
|
CODE_FOR_sinhxf2 = 9185,
|
||
|
CODE_FOR_sinhsf2 = 9186,
|
||
|
CODE_FOR_sinhdf2 = 9187,
|
||
|
CODE_FOR_coshxf2 = 9188,
|
||
|
CODE_FOR_coshsf2 = 9189,
|
||
|
CODE_FOR_coshdf2 = 9190,
|
||
|
CODE_FOR_tanhxf2 = 9191,
|
||
|
CODE_FOR_tanhsf2 = 9192,
|
||
|
CODE_FOR_tanhdf2 = 9193,
|
||
|
CODE_FOR_asinhxf2 = 9194,
|
||
|
CODE_FOR_asinhsf2 = 9195,
|
||
|
CODE_FOR_asinhdf2 = 9196,
|
||
|
CODE_FOR_acoshxf2 = 9197,
|
||
|
CODE_FOR_acoshsf2 = 9198,
|
||
|
CODE_FOR_acoshdf2 = 9199,
|
||
|
CODE_FOR_atanhxf2 = 9200,
|
||
|
CODE_FOR_atanhsf2 = 9201,
|
||
|
CODE_FOR_atanhdf2 = 9202,
|
||
|
CODE_FOR_logxf2 = 9203,
|
||
|
CODE_FOR_logsf2 = 9204,
|
||
|
CODE_FOR_logdf2 = 9205,
|
||
|
CODE_FOR_log10xf2 = 9206,
|
||
|
CODE_FOR_log10sf2 = 9207,
|
||
|
CODE_FOR_log10df2 = 9208,
|
||
|
CODE_FOR_log2xf2 = 9209,
|
||
|
CODE_FOR_log2sf2 = 9210,
|
||
|
CODE_FOR_log2df2 = 9211,
|
||
|
CODE_FOR_log1pxf2 = 9212,
|
||
|
CODE_FOR_log1psf2 = 9213,
|
||
|
CODE_FOR_log1pdf2 = 9214,
|
||
|
CODE_FOR_logbxf2 = 9215,
|
||
|
CODE_FOR_logbsf2 = 9216,
|
||
|
CODE_FOR_logbdf2 = 9217,
|
||
|
CODE_FOR_ilogbxf2 = 9218,
|
||
|
CODE_FOR_ilogbsf2 = 9219,
|
||
|
CODE_FOR_ilogbdf2 = 9220,
|
||
|
CODE_FOR_expNcorexf3 = 9221,
|
||
|
CODE_FOR_expxf2 = 9222,
|
||
|
CODE_FOR_expsf2 = 9223,
|
||
|
CODE_FOR_expdf2 = 9224,
|
||
|
CODE_FOR_exp10xf2 = 9225,
|
||
|
CODE_FOR_exp10sf2 = 9226,
|
||
|
CODE_FOR_exp10df2 = 9227,
|
||
|
CODE_FOR_exp2xf2 = 9228,
|
||
|
CODE_FOR_exp2sf2 = 9229,
|
||
|
CODE_FOR_exp2df2 = 9230,
|
||
|
CODE_FOR_expm1xf2 = 9231,
|
||
|
CODE_FOR_expm1sf2 = 9232,
|
||
|
CODE_FOR_expm1df2 = 9233,
|
||
|
CODE_FOR_ldexpxf3 = 9234,
|
||
|
CODE_FOR_ldexpsf3 = 9235,
|
||
|
CODE_FOR_ldexpdf3 = 9236,
|
||
|
CODE_FOR_scalbxf3 = 9237,
|
||
|
CODE_FOR_scalbsf3 = 9238,
|
||
|
CODE_FOR_scalbdf3 = 9239,
|
||
|
CODE_FOR_significandxf2 = 9240,
|
||
|
CODE_FOR_significandsf2 = 9241,
|
||
|
CODE_FOR_significanddf2 = 9242,
|
||
|
CODE_FOR_rinthf2 = 9243,
|
||
|
CODE_FOR_rintsf2 = 9244,
|
||
|
CODE_FOR_rintdf2 = 9245,
|
||
|
CODE_FOR_nearbyintxf2 = 9246,
|
||
|
CODE_FOR_nearbyinthf2 = 9247,
|
||
|
CODE_FOR_nearbyintsf2 = 9248,
|
||
|
CODE_FOR_nearbyintdf2 = 9249,
|
||
|
CODE_FOR_roundsf2 = 9250,
|
||
|
CODE_FOR_rounddf2 = 9251,
|
||
|
CODE_FOR_roundxf2 = 9252,
|
||
|
CODE_FOR_lrintsfsi2 = 9253,
|
||
|
CODE_FOR_lrintsfdi2 = 9254,
|
||
|
CODE_FOR_lrintdfsi2 = 9255,
|
||
|
CODE_FOR_lrintdfdi2 = 9256,
|
||
|
CODE_FOR_lroundsfhi2 = 9257,
|
||
|
CODE_FOR_lrounddfhi2 = 9258,
|
||
|
CODE_FOR_lroundxfhi2 = 9259,
|
||
|
CODE_FOR_lroundsfsi2 = 9260,
|
||
|
CODE_FOR_lrounddfsi2 = 9261,
|
||
|
CODE_FOR_lroundxfsi2 = 9262,
|
||
|
CODE_FOR_lroundsfdi2 = 9263,
|
||
|
CODE_FOR_lrounddfdi2 = 9264,
|
||
|
CODE_FOR_lroundxfdi2 = 9265,
|
||
|
CODE_FOR_roundevenxf2 = 9266,
|
||
|
CODE_FOR_floorxf2 = 9267,
|
||
|
CODE_FOR_ceilxf2 = 9268,
|
||
|
CODE_FOR_btruncxf2 = 9269,
|
||
|
CODE_FOR_roundevenhf2 = 9270,
|
||
|
CODE_FOR_floorhf2 = 9271,
|
||
|
CODE_FOR_ceilhf2 = 9272,
|
||
|
CODE_FOR_btrunchf2 = 9273,
|
||
|
CODE_FOR_roundevensf2 = 9274,
|
||
|
CODE_FOR_floorsf2 = 9275,
|
||
|
CODE_FOR_ceilsf2 = 9276,
|
||
|
CODE_FOR_btruncsf2 = 9277,
|
||
|
CODE_FOR_roundevendf2 = 9278,
|
||
|
CODE_FOR_floordf2 = 9279,
|
||
|
CODE_FOR_ceildf2 = 9280,
|
||
|
CODE_FOR_btruncdf2 = 9281,
|
||
|
CODE_FOR_lfloorxfhi2 = 9282,
|
||
|
CODE_FOR_lceilxfhi2 = 9283,
|
||
|
CODE_FOR_lfloorxfsi2 = 9284,
|
||
|
CODE_FOR_lceilxfsi2 = 9285,
|
||
|
CODE_FOR_lfloorxfdi2 = 9286,
|
||
|
CODE_FOR_lceilxfdi2 = 9287,
|
||
|
CODE_FOR_lfloorsfsi2 = 9288,
|
||
|
CODE_FOR_lceilsfsi2 = 9289,
|
||
|
CODE_FOR_lfloorsfdi2 = 9290,
|
||
|
CODE_FOR_lceilsfdi2 = 9291,
|
||
|
CODE_FOR_lfloordfsi2 = 9292,
|
||
|
CODE_FOR_lceildfsi2 = 9293,
|
||
|
CODE_FOR_lfloordfdi2 = 9294,
|
||
|
CODE_FOR_lceildfdi2 = 9295,
|
||
|
CODE_FOR_signbittf2 = 9296,
|
||
|
CODE_FOR_signbitxf2 = 9297,
|
||
|
CODE_FOR_signbitdf2 = 9298,
|
||
|
CODE_FOR_signbitsf2 = 9299,
|
||
|
CODE_FOR_cpymemsi = 9300,
|
||
|
CODE_FOR_cpymemdi = 9301,
|
||
|
CODE_FOR_strmov = 9302,
|
||
|
CODE_FOR_strmov_singleop = 9303,
|
||
|
CODE_FOR_rep_mov = 9304,
|
||
|
CODE_FOR_setmemsi = 9305,
|
||
|
CODE_FOR_setmemdi = 9306,
|
||
|
CODE_FOR_strset = 9307,
|
||
|
CODE_FOR_strset_singleop = 9308,
|
||
|
CODE_FOR_rep_stos = 9309,
|
||
|
CODE_FOR_cmpmemsi = 9310,
|
||
|
CODE_FOR_cmpstrnsi = 9311,
|
||
|
CODE_FOR_cmpintqi = 9312,
|
||
|
CODE_FOR_cmpstrnqi_nz_1 = 9313,
|
||
|
CODE_FOR_cmpstrnqi_1 = 9314,
|
||
|
CODE_FOR_strlensi = 9315,
|
||
|
CODE_FOR_strlendi = 9316,
|
||
|
CODE_FOR_strlenqi_1 = 9317,
|
||
|
CODE_FOR_movqicc = 9318,
|
||
|
CODE_FOR_movhicc = 9319,
|
||
|
CODE_FOR_movsicc = 9320,
|
||
|
CODE_FOR_movdicc = 9321,
|
||
|
CODE_FOR_x86_movsicc_0_m1 = 9322,
|
||
|
CODE_FOR_x86_movdicc_0_m1 = 9323,
|
||
|
CODE_FOR_movhfcc = 9324,
|
||
|
CODE_FOR_movsfcc = 9325,
|
||
|
CODE_FOR_movdfcc = 9326,
|
||
|
CODE_FOR_movxfcc = 9327,
|
||
|
CODE_FOR_addqicc = 9328,
|
||
|
CODE_FOR_addhicc = 9329,
|
||
|
CODE_FOR_addsicc = 9330,
|
||
|
CODE_FOR_adddicc = 9331,
|
||
|
CODE_FOR_smaxqi3 = 9332,
|
||
|
CODE_FOR_sminqi3 = 9333,
|
||
|
CODE_FOR_umaxqi3 = 9334,
|
||
|
CODE_FOR_uminqi3 = 9335,
|
||
|
CODE_FOR_smaxhi3 = 9336,
|
||
|
CODE_FOR_sminhi3 = 9337,
|
||
|
CODE_FOR_umaxhi3 = 9338,
|
||
|
CODE_FOR_uminhi3 = 9339,
|
||
|
CODE_FOR_smaxsi3 = 9340,
|
||
|
CODE_FOR_sminsi3 = 9341,
|
||
|
CODE_FOR_umaxsi3 = 9342,
|
||
|
CODE_FOR_uminsi3 = 9343,
|
||
|
CODE_FOR_smaxdi3 = 9344,
|
||
|
CODE_FOR_smindi3 = 9345,
|
||
|
CODE_FOR_umaxdi3 = 9346,
|
||
|
CODE_FOR_umindi3 = 9347,
|
||
|
CODE_FOR_smaxti3 = 9348,
|
||
|
CODE_FOR_sminti3 = 9349,
|
||
|
CODE_FOR_umaxti3 = 9350,
|
||
|
CODE_FOR_uminti3 = 9351,
|
||
|
CODE_FOR_allocate_stack = 9352,
|
||
|
CODE_FOR_probe_stack = 9353,
|
||
|
CODE_FOR_builtin_setjmp_receiver = 9354,
|
||
|
CODE_FOR_save_stack_nonlocal = 9355,
|
||
|
CODE_FOR_restore_stack_nonlocal = 9356,
|
||
|
CODE_FOR_prefetch = 9357,
|
||
|
CODE_FOR_stack_protect_set = 9358,
|
||
|
CODE_FOR_stack_protect_test = 9359,
|
||
|
CODE_FOR_pause = 9360,
|
||
|
CODE_FOR_xbegin = 9361,
|
||
|
CODE_FOR_xtest = 9362,
|
||
|
CODE_FOR_rdpkru = 9363,
|
||
|
CODE_FOR_wrpkru = 9364,
|
||
|
CODE_FOR_spaceshipsf3 = 9365,
|
||
|
CODE_FOR_spaceshipdf3 = 9366,
|
||
|
CODE_FOR_spaceshipxf3 = 9367,
|
||
|
CODE_FOR_movv8qi = 9368,
|
||
|
CODE_FOR_movv4hi = 9369,
|
||
|
CODE_FOR_movv2si = 9370,
|
||
|
CODE_FOR_movv1di = 9371,
|
||
|
CODE_FOR_movv2sf = 9372,
|
||
|
CODE_FOR_movv4hf = 9373,
|
||
|
CODE_FOR_movmisalignv8qi = 9374,
|
||
|
CODE_FOR_movmisalignv4hi = 9375,
|
||
|
CODE_FOR_movmisalignv2si = 9376,
|
||
|
CODE_FOR_movmisalignv1di = 9377,
|
||
|
CODE_FOR_movmisalignv2sf = 9378,
|
||
|
CODE_FOR_movmisalignv4hf = 9379,
|
||
|
CODE_FOR_movv4qi = 9380,
|
||
|
CODE_FOR_movv2hi = 9381,
|
||
|
CODE_FOR_movv1si = 9382,
|
||
|
CODE_FOR_movv2hf = 9383,
|
||
|
CODE_FOR_movmisalignv4qi = 9384,
|
||
|
CODE_FOR_movmisalignv2hi = 9385,
|
||
|
CODE_FOR_movmisalignv1si = 9386,
|
||
|
CODE_FOR_movmisalignv2hf = 9387,
|
||
|
CODE_FOR_movv2qi = 9388,
|
||
|
CODE_FOR_movmisalignv2qi = 9389,
|
||
|
CODE_FOR_absv2sf2 = 9390,
|
||
|
CODE_FOR_negv2sf2 = 9391,
|
||
|
CODE_FOR_mmx_addv2sf3 = 9392,
|
||
|
CODE_FOR_addv2sf3 = 9393,
|
||
|
CODE_FOR_mmx_subv2sf3 = 9394,
|
||
|
CODE_FOR_mmx_subrv2sf3 = 9395,
|
||
|
CODE_FOR_subv2sf3 = 9396,
|
||
|
CODE_FOR_mmx_mulv2sf3 = 9397,
|
||
|
CODE_FOR_mulv2sf3 = 9398,
|
||
|
CODE_FOR_divv2sf3 = 9399,
|
||
|
CODE_FOR_mmx_smaxv2sf3 = 9400,
|
||
|
CODE_FOR_mmx_sminv2sf3 = 9401,
|
||
|
CODE_FOR_smaxv2sf3 = 9402,
|
||
|
CODE_FOR_sminv2sf3 = 9403,
|
||
|
CODE_FOR_mmx_haddv2sf3 = 9404,
|
||
|
CODE_FOR_mmx_haddsubv2sf3 = 9405,
|
||
|
CODE_FOR_mmx_eqv2sf3 = 9406,
|
||
|
CODE_FOR_vec_cmpv2sfv2si = 9407,
|
||
|
CODE_FOR_vcondv2sfv2sf = 9408,
|
||
|
CODE_FOR_vcondv2siv2sf = 9409,
|
||
|
CODE_FOR_copysignv2sf3 = 9410,
|
||
|
CODE_FOR_xorsignv2sf3 = 9411,
|
||
|
CODE_FOR_signbitv2sf2 = 9412,
|
||
|
CODE_FOR_fix_truncv2sfv2si2 = 9413,
|
||
|
CODE_FOR_floatv2siv2sf2 = 9414,
|
||
|
CODE_FOR_vec_setv2sf = 9415,
|
||
|
CODE_FOR_vec_extractv2sfsf = 9416,
|
||
|
CODE_FOR_vec_initv2sfsf = 9417,
|
||
|
CODE_FOR_negv8qi2 = 9418,
|
||
|
CODE_FOR_negv4hi2 = 9419,
|
||
|
CODE_FOR_negv2si2 = 9420,
|
||
|
CODE_FOR_negv4qi2 = 9421,
|
||
|
CODE_FOR_negv2hi2 = 9422,
|
||
|
CODE_FOR_mmx_addv8qi3 = 9423,
|
||
|
CODE_FOR_mmx_subv8qi3 = 9424,
|
||
|
CODE_FOR_mmx_addv4hi3 = 9425,
|
||
|
CODE_FOR_mmx_subv4hi3 = 9426,
|
||
|
CODE_FOR_mmx_addv2si3 = 9427,
|
||
|
CODE_FOR_mmx_subv2si3 = 9428,
|
||
|
CODE_FOR_mmx_addv1di3 = 9429,
|
||
|
CODE_FOR_mmx_subv1di3 = 9430,
|
||
|
CODE_FOR_addv8qi3 = 9431,
|
||
|
CODE_FOR_subv8qi3 = 9432,
|
||
|
CODE_FOR_addv4hi3 = 9433,
|
||
|
CODE_FOR_subv4hi3 = 9434,
|
||
|
CODE_FOR_addv2si3 = 9435,
|
||
|
CODE_FOR_subv2si3 = 9436,
|
||
|
CODE_FOR_mmx_ssaddv8qi3 = 9437,
|
||
|
CODE_FOR_mmx_usaddv8qi3 = 9438,
|
||
|
CODE_FOR_mmx_sssubv8qi3 = 9439,
|
||
|
CODE_FOR_mmx_ussubv8qi3 = 9440,
|
||
|
CODE_FOR_mmx_ssaddv4hi3 = 9441,
|
||
|
CODE_FOR_mmx_usaddv4hi3 = 9442,
|
||
|
CODE_FOR_mmx_sssubv4hi3 = 9443,
|
||
|
CODE_FOR_mmx_ussubv4hi3 = 9444,
|
||
|
CODE_FOR_mmx_mulv4hi3 = 9445,
|
||
|
CODE_FOR_mulv4hi3 = 9446,
|
||
|
CODE_FOR_mmx_smulv4hi3_highpart = 9447,
|
||
|
CODE_FOR_mmx_umulv4hi3_highpart = 9448,
|
||
|
CODE_FOR_smulv4hi3_highpart = 9449,
|
||
|
CODE_FOR_umulv4hi3_highpart = 9450,
|
||
|
CODE_FOR_mmx_pmaddwd = 9451,
|
||
|
CODE_FOR_mmx_pmulhrwv4hi3 = 9452,
|
||
|
CODE_FOR_sse2_umulv1siv1di3 = 9453,
|
||
|
CODE_FOR_mmx_smaxv4hi3 = 9454,
|
||
|
CODE_FOR_mmx_sminv4hi3 = 9455,
|
||
|
CODE_FOR_smaxv4hi3 = 9456,
|
||
|
CODE_FOR_sminv4hi3 = 9457,
|
||
|
CODE_FOR_mmx_umaxv8qi3 = 9458,
|
||
|
CODE_FOR_mmx_uminv8qi3 = 9459,
|
||
|
CODE_FOR_umaxv8qi3 = 9460,
|
||
|
CODE_FOR_uminv8qi3 = 9461,
|
||
|
CODE_FOR_absv8qi2 = 9462,
|
||
|
CODE_FOR_absv4hi2 = 9463,
|
||
|
CODE_FOR_absv2si2 = 9464,
|
||
|
CODE_FOR_ashrv4hi3 = 9465,
|
||
|
CODE_FOR_ashrv2si3 = 9466,
|
||
|
CODE_FOR_ashlv4hi3 = 9467,
|
||
|
CODE_FOR_lshrv4hi3 = 9468,
|
||
|
CODE_FOR_ashlv2si3 = 9469,
|
||
|
CODE_FOR_lshrv2si3 = 9470,
|
||
|
CODE_FOR_mmx_eqv8qi3 = 9471,
|
||
|
CODE_FOR_mmx_eqv4hi3 = 9472,
|
||
|
CODE_FOR_mmx_eqv2si3 = 9473,
|
||
|
CODE_FOR_vec_cmpv8qiv8qi = 9474,
|
||
|
CODE_FOR_vec_cmpv4hiv4hi = 9475,
|
||
|
CODE_FOR_vec_cmpv2siv2si = 9476,
|
||
|
CODE_FOR_vec_cmpv4qiv4qi = 9477,
|
||
|
CODE_FOR_vec_cmpv2qiv2qi = 9478,
|
||
|
CODE_FOR_vec_cmpv2hiv2hi = 9479,
|
||
|
CODE_FOR_vec_cmpuv8qiv8qi = 9480,
|
||
|
CODE_FOR_vec_cmpuv4hiv4hi = 9481,
|
||
|
CODE_FOR_vec_cmpuv2siv2si = 9482,
|
||
|
CODE_FOR_vec_cmpuv4qiv4qi = 9483,
|
||
|
CODE_FOR_vec_cmpuv2qiv2qi = 9484,
|
||
|
CODE_FOR_vec_cmpuv2hiv2hi = 9485,
|
||
|
CODE_FOR_vcondv8qiv8qi = 9486,
|
||
|
CODE_FOR_vcondv8qiv4hi = 9487,
|
||
|
CODE_FOR_vcondv8qiv2si = 9488,
|
||
|
CODE_FOR_vcondv4hiv8qi = 9489,
|
||
|
CODE_FOR_vcondv4hiv4hi = 9490,
|
||
|
CODE_FOR_vcondv4hiv2si = 9491,
|
||
|
CODE_FOR_vcondv2siv8qi = 9492,
|
||
|
CODE_FOR_vcondv2siv4hi = 9493,
|
||
|
CODE_FOR_vcondv2siv2si = 9494,
|
||
|
CODE_FOR_vcondv2sfv8qi = 9495,
|
||
|
CODE_FOR_vcondv2sfv4hi = 9496,
|
||
|
CODE_FOR_vcondv2sfv2si = 9497,
|
||
|
CODE_FOR_vcondv4qiv4qi = 9498,
|
||
|
CODE_FOR_vcondv2qiv2qi = 9499,
|
||
|
CODE_FOR_vcondv2hiv2hi = 9500,
|
||
|
CODE_FOR_vconduv8qiv8qi = 9501,
|
||
|
CODE_FOR_vconduv8qiv4hi = 9502,
|
||
|
CODE_FOR_vconduv8qiv2si = 9503,
|
||
|
CODE_FOR_vconduv4hiv8qi = 9504,
|
||
|
CODE_FOR_vconduv4hiv4hi = 9505,
|
||
|
CODE_FOR_vconduv4hiv2si = 9506,
|
||
|
CODE_FOR_vconduv2siv8qi = 9507,
|
||
|
CODE_FOR_vconduv2siv4hi = 9508,
|
||
|
CODE_FOR_vconduv2siv2si = 9509,
|
||
|
CODE_FOR_vconduv2sfv8qi = 9510,
|
||
|
CODE_FOR_vconduv2sfv4hi = 9511,
|
||
|
CODE_FOR_vconduv2sfv2si = 9512,
|
||
|
CODE_FOR_vconduv4qiv4qi = 9513,
|
||
|
CODE_FOR_vconduv2qiv2qi = 9514,
|
||
|
CODE_FOR_vconduv2hiv2hi = 9515,
|
||
|
CODE_FOR_vcond_mask_v8qiv8qi = 9516,
|
||
|
CODE_FOR_vcond_mask_v4hiv4hi = 9517,
|
||
|
CODE_FOR_vcond_mask_v2siv2si = 9518,
|
||
|
CODE_FOR_vcond_mask_v2sfv2si = 9519,
|
||
|
CODE_FOR_vcond_mask_v4qiv4qi = 9520,
|
||
|
CODE_FOR_vcond_mask_v2qiv2qi = 9521,
|
||
|
CODE_FOR_vcond_mask_v2hiv2hi = 9522,
|
||
|
CODE_FOR_one_cmplv8qi2 = 9523,
|
||
|
CODE_FOR_one_cmplv4hi2 = 9524,
|
||
|
CODE_FOR_one_cmplv2si2 = 9525,
|
||
|
CODE_FOR_mmx_andv8qi3 = 9526,
|
||
|
CODE_FOR_mmx_iorv8qi3 = 9527,
|
||
|
CODE_FOR_mmx_xorv8qi3 = 9528,
|
||
|
CODE_FOR_mmx_andv4hi3 = 9529,
|
||
|
CODE_FOR_mmx_iorv4hi3 = 9530,
|
||
|
CODE_FOR_mmx_xorv4hi3 = 9531,
|
||
|
CODE_FOR_mmx_andv2si3 = 9532,
|
||
|
CODE_FOR_mmx_iorv2si3 = 9533,
|
||
|
CODE_FOR_mmx_xorv2si3 = 9534,
|
||
|
CODE_FOR_andv8qi3 = 9535,
|
||
|
CODE_FOR_iorv8qi3 = 9536,
|
||
|
CODE_FOR_xorv8qi3 = 9537,
|
||
|
CODE_FOR_andv4hi3 = 9538,
|
||
|
CODE_FOR_iorv4hi3 = 9539,
|
||
|
CODE_FOR_xorv4hi3 = 9540,
|
||
|
CODE_FOR_andv2si3 = 9541,
|
||
|
CODE_FOR_iorv2si3 = 9542,
|
||
|
CODE_FOR_xorv2si3 = 9543,
|
||
|
CODE_FOR_vec_pack_trunc_v4hi = 9544,
|
||
|
CODE_FOR_vec_pack_trunc_v2si = 9545,
|
||
|
CODE_FOR_vec_pack_trunc_v2hi = 9546,
|
||
|
CODE_FOR_vec_unpacks_lo_v8qi = 9547,
|
||
|
CODE_FOR_vec_unpacks_lo_v4hi = 9548,
|
||
|
CODE_FOR_vec_unpacks_hi_v8qi = 9549,
|
||
|
CODE_FOR_vec_unpacks_hi_v4hi = 9550,
|
||
|
CODE_FOR_vec_unpacku_lo_v8qi = 9551,
|
||
|
CODE_FOR_vec_unpacku_lo_v4hi = 9552,
|
||
|
CODE_FOR_vec_unpacku_hi_v8qi = 9553,
|
||
|
CODE_FOR_vec_unpacku_hi_v4hi = 9554,
|
||
|
CODE_FOR_vec_unpacks_lo_v4qi = 9555,
|
||
|
CODE_FOR_vec_unpacks_hi_v4qi = 9556,
|
||
|
CODE_FOR_vec_unpacku_lo_v4qi = 9557,
|
||
|
CODE_FOR_vec_unpacku_hi_v4qi = 9558,
|
||
|
CODE_FOR_mmx_pinsrw = 9559,
|
||
|
CODE_FOR_mmx_pshufw = 9560,
|
||
|
CODE_FOR_vec_setv2si = 9561,
|
||
|
CODE_FOR_vec_extractv2sisi = 9562,
|
||
|
CODE_FOR_vec_initv2sisi = 9563,
|
||
|
CODE_FOR_vec_setv4hi = 9564,
|
||
|
CODE_FOR_vec_extractv4hihi = 9565,
|
||
|
CODE_FOR_vec_initv4hihi = 9566,
|
||
|
CODE_FOR_vec_setv8qi = 9567,
|
||
|
CODE_FOR_vec_extractv8qiqi = 9568,
|
||
|
CODE_FOR_vec_initv8qiqi = 9569,
|
||
|
CODE_FOR_vec_setv2hi = 9570,
|
||
|
CODE_FOR_vec_extractv2hihi = 9571,
|
||
|
CODE_FOR_vec_setv4qi = 9572,
|
||
|
CODE_FOR_vec_extractv4qiqi = 9573,
|
||
|
CODE_FOR_vec_initv2hihi = 9574,
|
||
|
CODE_FOR_vec_initv4qiqi = 9575,
|
||
|
CODE_FOR_mmx_uavgv8qi3 = 9576,
|
||
|
CODE_FOR_mmx_uavgv4hi3 = 9577,
|
||
|
CODE_FOR_uavgv8qi3_ceil = 9578,
|
||
|
CODE_FOR_uavgv4hi3_ceil = 9579,
|
||
|
CODE_FOR_reduc_plus_scal_v8qi = 9580,
|
||
|
CODE_FOR_reduc_plus_scal_v4hi = 9581,
|
||
|
CODE_FOR_reduc_smax_scal_v4hi = 9582,
|
||
|
CODE_FOR_reduc_smin_scal_v4hi = 9583,
|
||
|
CODE_FOR_reduc_smax_scal_v4qi = 9584,
|
||
|
CODE_FOR_reduc_smin_scal_v4qi = 9585,
|
||
|
CODE_FOR_reduc_umax_scal_v4hi = 9586,
|
||
|
CODE_FOR_reduc_umin_scal_v4hi = 9587,
|
||
|
CODE_FOR_reduc_umax_scal_v4qi = 9588,
|
||
|
CODE_FOR_reduc_umin_scal_v4qi = 9589,
|
||
|
CODE_FOR_reduc_plus_scal_v4qi = 9590,
|
||
|
CODE_FOR_usadv8qi = 9591,
|
||
|
CODE_FOR_mmx_maskmovq = 9592,
|
||
|
CODE_FOR_mmx_emms = 9593,
|
||
|
CODE_FOR_mmx_femms = 9594,
|
||
|
CODE_FOR_movv64qi = 9595,
|
||
|
CODE_FOR_movv32qi = 9596,
|
||
|
CODE_FOR_movv16qi = 9597,
|
||
|
CODE_FOR_movv32hi = 9598,
|
||
|
CODE_FOR_movv16hi = 9599,
|
||
|
CODE_FOR_movv8hi = 9600,
|
||
|
CODE_FOR_movv16si = 9601,
|
||
|
CODE_FOR_movv8si = 9602,
|
||
|
CODE_FOR_movv4si = 9603,
|
||
|
CODE_FOR_movv8di = 9604,
|
||
|
CODE_FOR_movv4di = 9605,
|
||
|
CODE_FOR_movv2di = 9606,
|
||
|
CODE_FOR_movv4ti = 9607,
|
||
|
CODE_FOR_movv2ti = 9608,
|
||
|
CODE_FOR_movv1ti = 9609,
|
||
|
CODE_FOR_movv32hf = 9610,
|
||
|
CODE_FOR_movv16hf = 9611,
|
||
|
CODE_FOR_movv8hf = 9612,
|
||
|
CODE_FOR_movv16sf = 9613,
|
||
|
CODE_FOR_movv8sf = 9614,
|
||
|
CODE_FOR_movv4sf = 9615,
|
||
|
CODE_FOR_movv8df = 9616,
|
||
|
CODE_FOR_movv4df = 9617,
|
||
|
CODE_FOR_movv2df = 9618,
|
||
|
CODE_FOR_avx512f_loadv16si_mask = 9619,
|
||
|
CODE_FOR_avx512vl_loadv8si_mask = 9620,
|
||
|
CODE_FOR_avx512vl_loadv4si_mask = 9621,
|
||
|
CODE_FOR_avx512f_loadv8di_mask = 9622,
|
||
|
CODE_FOR_avx512vl_loadv4di_mask = 9623,
|
||
|
CODE_FOR_avx512vl_loadv2di_mask = 9624,
|
||
|
CODE_FOR_avx512f_loadv16sf_mask = 9625,
|
||
|
CODE_FOR_avx512vl_loadv8sf_mask = 9626,
|
||
|
CODE_FOR_avx512vl_loadv4sf_mask = 9627,
|
||
|
CODE_FOR_avx512f_loadv8df_mask = 9628,
|
||
|
CODE_FOR_avx512vl_loadv4df_mask = 9629,
|
||
|
CODE_FOR_avx512vl_loadv2df_mask = 9630,
|
||
|
CODE_FOR_avx512bw_loadv64qi_mask = 9631,
|
||
|
CODE_FOR_avx512vl_loadv16qi_mask = 9632,
|
||
|
CODE_FOR_avx512vl_loadv32qi_mask = 9633,
|
||
|
CODE_FOR_avx512bw_loadv32hi_mask = 9634,
|
||
|
CODE_FOR_avx512vl_loadv16hi_mask = 9635,
|
||
|
CODE_FOR_avx512vl_loadv8hi_mask = 9636,
|
||
|
CODE_FOR_avx512f_loadhf_mask = 9637,
|
||
|
CODE_FOR_avx512f_loadsf_mask = 9638,
|
||
|
CODE_FOR_avx512f_loaddf_mask = 9639,
|
||
|
CODE_FOR_sse2_movq128 = 9640,
|
||
|
CODE_FOR_movmisalignv64qi = 9641,
|
||
|
CODE_FOR_movmisalignv32qi = 9642,
|
||
|
CODE_FOR_movmisalignv16qi = 9643,
|
||
|
CODE_FOR_movmisalignv32hi = 9644,
|
||
|
CODE_FOR_movmisalignv16hi = 9645,
|
||
|
CODE_FOR_movmisalignv8hi = 9646,
|
||
|
CODE_FOR_movmisalignv16si = 9647,
|
||
|
CODE_FOR_movmisalignv8si = 9648,
|
||
|
CODE_FOR_movmisalignv4si = 9649,
|
||
|
CODE_FOR_movmisalignv8di = 9650,
|
||
|
CODE_FOR_movmisalignv4di = 9651,
|
||
|
CODE_FOR_movmisalignv2di = 9652,
|
||
|
CODE_FOR_movmisalignv4ti = 9653,
|
||
|
CODE_FOR_movmisalignv2ti = 9654,
|
||
|
CODE_FOR_movmisalignv1ti = 9655,
|
||
|
CODE_FOR_movmisalignv32hf = 9656,
|
||
|
CODE_FOR_movmisalignv16hf = 9657,
|
||
|
CODE_FOR_movmisalignv8hf = 9658,
|
||
|
CODE_FOR_movmisalignv16sf = 9659,
|
||
|
CODE_FOR_movmisalignv8sf = 9660,
|
||
|
CODE_FOR_movmisalignv4sf = 9661,
|
||
|
CODE_FOR_movmisalignv8df = 9662,
|
||
|
CODE_FOR_movmisalignv4df = 9663,
|
||
|
CODE_FOR_movmisalignv2df = 9664,
|
||
|
CODE_FOR_storentdi = 9665,
|
||
|
CODE_FOR_storentsi = 9666,
|
||
|
CODE_FOR_storentsf = 9667,
|
||
|
CODE_FOR_storentdf = 9668,
|
||
|
CODE_FOR_storentv8di = 9669,
|
||
|
CODE_FOR_storentv4di = 9670,
|
||
|
CODE_FOR_storentv2di = 9671,
|
||
|
CODE_FOR_storentv16sf = 9672,
|
||
|
CODE_FOR_storentv8sf = 9673,
|
||
|
CODE_FOR_storentv4sf = 9674,
|
||
|
CODE_FOR_storentv8df = 9675,
|
||
|
CODE_FOR_storentv4df = 9676,
|
||
|
CODE_FOR_storentv2df = 9677,
|
||
|
CODE_FOR_kmovb = 9678,
|
||
|
CODE_FOR_kmovw = 9679,
|
||
|
CODE_FOR_kmovd = 9680,
|
||
|
CODE_FOR_kmovq = 9681,
|
||
|
CODE_FOR_absv32hf2 = 9682,
|
||
|
CODE_FOR_negv32hf2 = 9683,
|
||
|
CODE_FOR_absv16hf2 = 9684,
|
||
|
CODE_FOR_negv16hf2 = 9685,
|
||
|
CODE_FOR_absv8hf2 = 9686,
|
||
|
CODE_FOR_negv8hf2 = 9687,
|
||
|
CODE_FOR_absv16sf2 = 9688,
|
||
|
CODE_FOR_negv16sf2 = 9689,
|
||
|
CODE_FOR_absv8sf2 = 9690,
|
||
|
CODE_FOR_negv8sf2 = 9691,
|
||
|
CODE_FOR_absv4sf2 = 9692,
|
||
|
CODE_FOR_negv4sf2 = 9693,
|
||
|
CODE_FOR_absv8df2 = 9694,
|
||
|
CODE_FOR_negv8df2 = 9695,
|
||
|
CODE_FOR_absv4df2 = 9696,
|
||
|
CODE_FOR_negv4df2 = 9697,
|
||
|
CODE_FOR_absv2df2 = 9698,
|
||
|
CODE_FOR_negv2df2 = 9699,
|
||
|
CODE_FOR_cond_addv32hf = 9700,
|
||
|
CODE_FOR_cond_subv32hf = 9701,
|
||
|
CODE_FOR_cond_addv16hf = 9702,
|
||
|
CODE_FOR_cond_subv16hf = 9703,
|
||
|
CODE_FOR_cond_addv8hf = 9704,
|
||
|
CODE_FOR_cond_subv8hf = 9705,
|
||
|
CODE_FOR_cond_addv16sf = 9706,
|
||
|
CODE_FOR_cond_subv16sf = 9707,
|
||
|
CODE_FOR_cond_addv8sf = 9708,
|
||
|
CODE_FOR_cond_subv8sf = 9709,
|
||
|
CODE_FOR_cond_addv4sf = 9710,
|
||
|
CODE_FOR_cond_subv4sf = 9711,
|
||
|
CODE_FOR_cond_addv8df = 9712,
|
||
|
CODE_FOR_cond_subv8df = 9713,
|
||
|
CODE_FOR_cond_addv4df = 9714,
|
||
|
CODE_FOR_cond_subv4df = 9715,
|
||
|
CODE_FOR_cond_addv2df = 9716,
|
||
|
CODE_FOR_cond_subv2df = 9717,
|
||
|
CODE_FOR_addv32hf3 = 9718,
|
||
|
CODE_FOR_addv32hf3_round = 9719,
|
||
|
CODE_FOR_addv32hf3_mask = 9720,
|
||
|
CODE_FOR_addv32hf3_mask_round = 9721,
|
||
|
CODE_FOR_subv32hf3 = 9722,
|
||
|
CODE_FOR_subv32hf3_round = 9723,
|
||
|
CODE_FOR_subv32hf3_mask = 9724,
|
||
|
CODE_FOR_subv32hf3_mask_round = 9725,
|
||
|
CODE_FOR_addv16hf3 = 9726,
|
||
|
CODE_FOR_addv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv16hf3_mask = 9727,
|
||
|
CODE_FOR_addv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv16hf3 = 9728,
|
||
|
CODE_FOR_subv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv16hf3_mask = 9729,
|
||
|
CODE_FOR_subv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv8hf3 = 9730,
|
||
|
CODE_FOR_addv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv8hf3_mask = 9731,
|
||
|
CODE_FOR_addv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv8hf3 = 9732,
|
||
|
CODE_FOR_subv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv8hf3_mask = 9733,
|
||
|
CODE_FOR_subv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv16sf3 = 9734,
|
||
|
CODE_FOR_addv16sf3_round = 9735,
|
||
|
CODE_FOR_addv16sf3_mask = 9736,
|
||
|
CODE_FOR_addv16sf3_mask_round = 9737,
|
||
|
CODE_FOR_subv16sf3 = 9738,
|
||
|
CODE_FOR_subv16sf3_round = 9739,
|
||
|
CODE_FOR_subv16sf3_mask = 9740,
|
||
|
CODE_FOR_subv16sf3_mask_round = 9741,
|
||
|
CODE_FOR_addv8sf3 = 9742,
|
||
|
CODE_FOR_addv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv8sf3_mask = 9743,
|
||
|
CODE_FOR_addv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv8sf3 = 9744,
|
||
|
CODE_FOR_subv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv8sf3_mask = 9745,
|
||
|
CODE_FOR_subv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv4sf3 = 9746,
|
||
|
CODE_FOR_addv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv4sf3_mask = 9747,
|
||
|
CODE_FOR_addv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv4sf3 = 9748,
|
||
|
CODE_FOR_subv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv4sf3_mask = 9749,
|
||
|
CODE_FOR_subv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv8df3 = 9750,
|
||
|
CODE_FOR_addv8df3_round = 9751,
|
||
|
CODE_FOR_addv8df3_mask = 9752,
|
||
|
CODE_FOR_addv8df3_mask_round = 9753,
|
||
|
CODE_FOR_subv8df3 = 9754,
|
||
|
CODE_FOR_subv8df3_round = 9755,
|
||
|
CODE_FOR_subv8df3_mask = 9756,
|
||
|
CODE_FOR_subv8df3_mask_round = 9757,
|
||
|
CODE_FOR_addv4df3 = 9758,
|
||
|
CODE_FOR_addv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv4df3_mask = 9759,
|
||
|
CODE_FOR_addv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv4df3 = 9760,
|
||
|
CODE_FOR_subv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv4df3_mask = 9761,
|
||
|
CODE_FOR_subv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv2df3 = 9762,
|
||
|
CODE_FOR_addv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_addv2df3_mask = 9763,
|
||
|
CODE_FOR_addv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv2df3 = 9764,
|
||
|
CODE_FOR_subv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_subv2df3_mask = 9765,
|
||
|
CODE_FOR_subv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_cond_mulv32hf = 9766,
|
||
|
CODE_FOR_cond_mulv16hf = 9767,
|
||
|
CODE_FOR_cond_mulv8hf = 9768,
|
||
|
CODE_FOR_cond_mulv16sf = 9769,
|
||
|
CODE_FOR_cond_mulv8sf = 9770,
|
||
|
CODE_FOR_cond_mulv4sf = 9771,
|
||
|
CODE_FOR_cond_mulv8df = 9772,
|
||
|
CODE_FOR_cond_mulv4df = 9773,
|
||
|
CODE_FOR_cond_mulv2df = 9774,
|
||
|
CODE_FOR_mulv32hf3 = 9775,
|
||
|
CODE_FOR_mulv32hf3_round = 9776,
|
||
|
CODE_FOR_mulv32hf3_mask = 9777,
|
||
|
CODE_FOR_mulv32hf3_mask_round = 9778,
|
||
|
CODE_FOR_mulv16hf3 = 9779,
|
||
|
CODE_FOR_mulv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv16hf3_mask = 9780,
|
||
|
CODE_FOR_mulv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv8hf3 = 9781,
|
||
|
CODE_FOR_mulv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv8hf3_mask = 9782,
|
||
|
CODE_FOR_mulv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv16sf3 = 9783,
|
||
|
CODE_FOR_mulv16sf3_round = 9784,
|
||
|
CODE_FOR_mulv16sf3_mask = 9785,
|
||
|
CODE_FOR_mulv16sf3_mask_round = 9786,
|
||
|
CODE_FOR_mulv8sf3 = 9787,
|
||
|
CODE_FOR_mulv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv8sf3_mask = 9788,
|
||
|
CODE_FOR_mulv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv4sf3 = 9789,
|
||
|
CODE_FOR_mulv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv4sf3_mask = 9790,
|
||
|
CODE_FOR_mulv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv8df3 = 9791,
|
||
|
CODE_FOR_mulv8df3_round = 9792,
|
||
|
CODE_FOR_mulv8df3_mask = 9793,
|
||
|
CODE_FOR_mulv8df3_mask_round = 9794,
|
||
|
CODE_FOR_mulv4df3 = 9795,
|
||
|
CODE_FOR_mulv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv4df3_mask = 9796,
|
||
|
CODE_FOR_mulv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv2df3 = 9797,
|
||
|
CODE_FOR_mulv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_mulv2df3_mask = 9798,
|
||
|
CODE_FOR_mulv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_divv8df3 = 9799,
|
||
|
CODE_FOR_divv4df3 = 9800,
|
||
|
CODE_FOR_divv2df3 = 9801,
|
||
|
CODE_FOR_divv32hf3 = 9802,
|
||
|
CODE_FOR_divv16hf3 = 9803,
|
||
|
CODE_FOR_divv8hf3 = 9804,
|
||
|
CODE_FOR_divv16sf3 = 9805,
|
||
|
CODE_FOR_divv8sf3 = 9806,
|
||
|
CODE_FOR_divv4sf3 = 9807,
|
||
|
CODE_FOR_cond_divv32hf = 9808,
|
||
|
CODE_FOR_cond_divv16hf = 9809,
|
||
|
CODE_FOR_cond_divv8hf = 9810,
|
||
|
CODE_FOR_cond_divv16sf = 9811,
|
||
|
CODE_FOR_cond_divv8sf = 9812,
|
||
|
CODE_FOR_cond_divv4sf = 9813,
|
||
|
CODE_FOR_cond_divv8df = 9814,
|
||
|
CODE_FOR_cond_divv4df = 9815,
|
||
|
CODE_FOR_cond_divv2df = 9816,
|
||
|
CODE_FOR_sqrtv32hf2 = 9817,
|
||
|
CODE_FOR_sqrtv16hf2 = 9818,
|
||
|
CODE_FOR_sqrtv8hf2 = 9819,
|
||
|
CODE_FOR_sqrtv8df2 = 9820,
|
||
|
CODE_FOR_sqrtv4df2 = 9821,
|
||
|
CODE_FOR_sqrtv2df2 = 9822,
|
||
|
CODE_FOR_sqrtv16sf2 = 9823,
|
||
|
CODE_FOR_sqrtv8sf2 = 9824,
|
||
|
CODE_FOR_sqrtv4sf2 = 9825,
|
||
|
CODE_FOR_rsqrtv16sf2 = 9826,
|
||
|
CODE_FOR_rsqrtv8sf2 = 9827,
|
||
|
CODE_FOR_rsqrtv4sf2 = 9828,
|
||
|
CODE_FOR_rsqrtv32hf2 = 9829,
|
||
|
CODE_FOR_rsqrtv16hf2 = 9830,
|
||
|
CODE_FOR_rsqrtv8hf2 = 9831,
|
||
|
CODE_FOR_cond_smaxv32hf = 9832,
|
||
|
CODE_FOR_cond_sminv32hf = 9833,
|
||
|
CODE_FOR_cond_smaxv16hf = 9834,
|
||
|
CODE_FOR_cond_sminv16hf = 9835,
|
||
|
CODE_FOR_cond_smaxv8hf = 9836,
|
||
|
CODE_FOR_cond_sminv8hf = 9837,
|
||
|
CODE_FOR_cond_smaxv16sf = 9838,
|
||
|
CODE_FOR_cond_sminv16sf = 9839,
|
||
|
CODE_FOR_cond_smaxv8sf = 9840,
|
||
|
CODE_FOR_cond_sminv8sf = 9841,
|
||
|
CODE_FOR_cond_smaxv4sf = 9842,
|
||
|
CODE_FOR_cond_sminv4sf = 9843,
|
||
|
CODE_FOR_cond_smaxv8df = 9844,
|
||
|
CODE_FOR_cond_sminv8df = 9845,
|
||
|
CODE_FOR_cond_smaxv4df = 9846,
|
||
|
CODE_FOR_cond_sminv4df = 9847,
|
||
|
CODE_FOR_cond_smaxv2df = 9848,
|
||
|
CODE_FOR_cond_sminv2df = 9849,
|
||
|
CODE_FOR_smaxv32hf3 = 9850,
|
||
|
CODE_FOR_smaxv32hf3_round = 9851,
|
||
|
CODE_FOR_smaxv32hf3_mask = 9852,
|
||
|
CODE_FOR_smaxv32hf3_mask_round = 9853,
|
||
|
CODE_FOR_sminv32hf3 = 9854,
|
||
|
CODE_FOR_sminv32hf3_round = 9855,
|
||
|
CODE_FOR_sminv32hf3_mask = 9856,
|
||
|
CODE_FOR_sminv32hf3_mask_round = 9857,
|
||
|
CODE_FOR_smaxv16hf3 = 9858,
|
||
|
CODE_FOR_smaxv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv16hf3_mask = 9859,
|
||
|
CODE_FOR_smaxv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv16hf3 = 9860,
|
||
|
CODE_FOR_sminv16hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv16hf3_mask = 9861,
|
||
|
CODE_FOR_sminv16hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv8hf3 = 9862,
|
||
|
CODE_FOR_smaxv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv8hf3_mask = 9863,
|
||
|
CODE_FOR_smaxv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv8hf3 = 9864,
|
||
|
CODE_FOR_sminv8hf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv8hf3_mask = 9865,
|
||
|
CODE_FOR_sminv8hf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv16sf3 = 9866,
|
||
|
CODE_FOR_smaxv16sf3_round = 9867,
|
||
|
CODE_FOR_smaxv16sf3_mask = 9868,
|
||
|
CODE_FOR_smaxv16sf3_mask_round = 9869,
|
||
|
CODE_FOR_sminv16sf3 = 9870,
|
||
|
CODE_FOR_sminv16sf3_round = 9871,
|
||
|
CODE_FOR_sminv16sf3_mask = 9872,
|
||
|
CODE_FOR_sminv16sf3_mask_round = 9873,
|
||
|
CODE_FOR_smaxv8sf3 = 9874,
|
||
|
CODE_FOR_smaxv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv8sf3_mask = 9875,
|
||
|
CODE_FOR_smaxv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv8sf3 = 9876,
|
||
|
CODE_FOR_sminv8sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv8sf3_mask = 9877,
|
||
|
CODE_FOR_sminv8sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv4sf3 = 9878,
|
||
|
CODE_FOR_smaxv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv4sf3_mask = 9879,
|
||
|
CODE_FOR_smaxv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv4sf3 = 9880,
|
||
|
CODE_FOR_sminv4sf3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv4sf3_mask = 9881,
|
||
|
CODE_FOR_sminv4sf3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv8df3 = 9882,
|
||
|
CODE_FOR_smaxv8df3_round = 9883,
|
||
|
CODE_FOR_smaxv8df3_mask = 9884,
|
||
|
CODE_FOR_smaxv8df3_mask_round = 9885,
|
||
|
CODE_FOR_sminv8df3 = 9886,
|
||
|
CODE_FOR_sminv8df3_round = 9887,
|
||
|
CODE_FOR_sminv8df3_mask = 9888,
|
||
|
CODE_FOR_sminv8df3_mask_round = 9889,
|
||
|
CODE_FOR_smaxv4df3 = 9890,
|
||
|
CODE_FOR_smaxv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv4df3_mask = 9891,
|
||
|
CODE_FOR_smaxv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv4df3 = 9892,
|
||
|
CODE_FOR_sminv4df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv4df3_mask = 9893,
|
||
|
CODE_FOR_sminv4df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv2df3 = 9894,
|
||
|
CODE_FOR_smaxv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_smaxv2df3_mask = 9895,
|
||
|
CODE_FOR_smaxv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv2df3 = 9896,
|
||
|
CODE_FOR_sminv2df3_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sminv2df3_mask = 9897,
|
||
|
CODE_FOR_sminv2df3_mask_round = CODE_FOR_nothing,
|
||
|
CODE_FOR_sse3_haddv2df3 = 9898,
|
||
|
CODE_FOR_reduc_plus_scal_v2df = 9899,
|
||
|
CODE_FOR_reduc_plus_scal_v4sf = 9900,
|
||
|
CODE_FOR_reduc_plus_scal_v8hf = 9901,
|
||
|
CODE_FOR_reduc_plus_scal_v16qi = 9902,
|
||
|
CODE_FOR_reduc_plus_scal_v4df = 9903,
|
||
|
CODE_FOR_reduc_plus_scal_v8sf = 9904,
|
||
|
CODE_FOR_reduc_plus_scal_v16hf = 9905,
|
||
|
CODE_FOR_reduc_plus_scal_v8df = 9906,
|
||
|
CODE_FOR_reduc_plus_scal_v16sf = 9907,
|
||
|
CODE_FOR_reduc_plus_scal_v32hf = 9908,
|
||
|
CODE_FOR_reduc_plus_scal_v32qi = 9909,
|
||
|
CODE_FOR_reduc_plus_scal_v64qi = 9910,
|
||
|
CODE_FOR_reduc_smax_scal_v8hf = 9911,
|
||
|
CODE_FOR_reduc_smin_scal_v8hf = 9912,
|
||
|
CODE_FOR_reduc_smax_scal_v4sf = 9913,
|
||
|
CODE_FOR_reduc_smin_scal_v4sf = 9914,
|
||
|
CODE_FOR_reduc_smax_scal_v2df = 9915,
|
||
|
CODE_FOR_reduc_smin_scal_v2df = 9916,
|
||
|
CODE_FOR_reduc_smax_scal_v4si = 9917,
|
||
|
CODE_FOR_reduc_smin_scal_v4si = 9918,
|
||
|
CODE_FOR_reduc_smax_scal_v8hi = 9919,
|
||
|
CODE_FOR_reduc_smin_scal_v8hi = 9920,
|
||
|
CODE_FOR_reduc_smax_scal_v16qi = 9921,
|
||
|
CODE_FOR_reduc_smin_scal_v16qi = 9922,
|
||
|
CODE_FOR_reduc_smax_scal_v2di = 9923,
|
||
|
CODE_FOR_reduc_smin_scal_v2di = 9924,
|
||
|
CODE_FOR_reduc_smax_scal_v32qi = 9925,
|
||
|
CODE_FOR_reduc_smin_scal_v32qi = 9926,
|
||
|
CODE_FOR_reduc_smax_scal_v16hi = 9927,
|
||
|
CODE_FOR_reduc_smin_scal_v16hi = 9928,
|
||
|
CODE_FOR_reduc_smax_scal_v16hf = 9929,
|
||
|
CODE_FOR_reduc_smin_scal_v16hf = 9930,
|
||
|
CODE_FOR_reduc_smax_scal_v8si = 9931,
|
||
|
CODE_FOR_reduc_smin_scal_v8si = 9932,
|
||
|
CODE_FOR_reduc_smax_scal_v4di = 9933,
|
||
|
CODE_FOR_reduc_smin_scal_v4di = 9934,
|
||
|
CODE_FOR_reduc_smax_scal_v8sf = 9935,
|
||
|
CODE_FOR_reduc_smin_scal_v8sf = 9936,
|
||
|
CODE_FOR_reduc_smax_scal_v4df = 9937,
|
||
|
CODE_FOR_reduc_smin_scal_v4df = 9938,
|
||
|
CODE_FOR_reduc_smax_scal_v64qi = 9939,
|
||
|
CODE_FOR_reduc_smin_scal_v64qi = 9940,
|
||
|
CODE_FOR_reduc_smax_scal_v32hf = 9941,
|
||
|
CODE_FOR_reduc_smin_scal_v32hf = 9942,
|
||
|
CODE_FOR_reduc_smax_scal_v32hi = 9943,
|
||
|
CODE_FOR_reduc_smin_scal_v32hi = 9944,
|
||
|
CODE_FOR_reduc_smax_scal_v16si = 9945,
|
||
|
CODE_FOR_reduc_smin_scal_v16si = 9946,
|
||
|
CODE_FOR_reduc_smax_scal_v8di = 9947,
|
||
|
CODE_FOR_reduc_smin_scal_v8di = 9948,
|
||
|
CODE_FOR_reduc_smax_scal_v16sf = 9949,
|
||
|
CODE_FOR_reduc_smin_scal_v16sf = 9950,
|
||
|
CODE_FOR_reduc_smax_scal_v8df = 9951,
|
||
|
CODE_FOR_reduc_smin_scal_v8df = 9952,
|
||
|
CODE_FOR_reduc_umax_scal_v16si = 9953,
|
||
|
CODE_FOR_reduc_umin_scal_v16si = 9954,
|
||
|
CODE_FOR_reduc_umax_scal_v8di = 9955,
|
||
|
CODE_FOR_reduc_umin_scal_v8di = 9956,
|
||
|
CODE_FOR_reduc_umax_scal_v32hi = 9957,
|
||
|
CODE_FOR_reduc_umin_scal_v32hi = 9958,
|
||
|
CODE_FOR_reduc_umax_scal_v64qi = 9959,
|
||
|
CODE_FOR_reduc_umin_scal_v64qi = 9960,
|
||
|
CODE_FOR_reduc_umax_scal_v32qi = 9961,
|
||
|
CODE_FOR_reduc_umin_scal_v32qi = 9962,
|
||
|
CODE_FOR_reduc_umax_scal_v16hi = 9963,
|
||
|
CODE_FOR_reduc_umin_scal_v16hi = 9964,
|
||
|
CODE_FOR_reduc_umax_scal_v8si = 9965,
|
||
|
CODE_FOR_reduc_umin_scal_v8si = 9966,
|
||
|
CODE_FOR_reduc_umax_scal_v4di = 9967,
|
||
|
CODE_FOR_reduc_umin_scal_v4di = 9968,
|
||
|
CODE_FOR_reduc_umin_scal_v8hi = 9969,
|
||
|
CODE_FOR_vec_cmpv16sihi = 9970,
|
||
|
CODE_FOR_vec_cmpv8siqi = 9971,
|
||
|
CODE_FOR_vec_cmpv4siqi = 9972,
|
||
|
CODE_FOR_vec_cmpv8diqi = 9973,
|
||
|
CODE_FOR_vec_cmpv4diqi = 9974,
|
||
|
CODE_FOR_vec_cmpv2diqi = 9975,
|
||
|
CODE_FOR_vec_cmpv32hfsi = 9976,
|
||
|
CODE_FOR_vec_cmpv16hfhi = 9977,
|
||
|
CODE_FOR_vec_cmpv8hfqi = 9978,
|
||
|
CODE_FOR_vec_cmpv16sfhi = 9979,
|
||
|
CODE_FOR_vec_cmpv8sfqi = 9980,
|
||
|
CODE_FOR_vec_cmpv4sfqi = 9981,
|
||
|
CODE_FOR_vec_cmpv8dfqi = 9982,
|
||
|
CODE_FOR_vec_cmpv4dfqi = 9983,
|
||
|
CODE_FOR_vec_cmpv2dfqi = 9984,
|
||
|
CODE_FOR_vec_cmpv64qidi = 9985,
|
||
|
CODE_FOR_vec_cmpv16qihi = 9986,
|
||
|
CODE_FOR_vec_cmpv32qisi = 9987,
|
||
|
CODE_FOR_vec_cmpv32hisi = 9988,
|
||
|
CODE_FOR_vec_cmpv16hihi = 9989,
|
||
|
CODE_FOR_vec_cmpv8hiqi = 9990,
|
||
|
CODE_FOR_vec_cmpv32qiv32qi = 9991,
|
||
|
CODE_FOR_vec_cmpv16hiv16hi = 9992,
|
||
|
CODE_FOR_vec_cmpv8siv8si = 9993,
|
||
|
CODE_FOR_vec_cmpv4div4di = 9994,
|
||
|
CODE_FOR_vec_cmpv16qiv16qi = 9995,
|
||
|
CODE_FOR_vec_cmpv8hiv8hi = 9996,
|
||
|
CODE_FOR_vec_cmpv4siv4si = 9997,
|
||
|
CODE_FOR_vec_cmpv2div2di = 9998,
|
||
|
CODE_FOR_vec_cmpv8sfv8si = 9999,
|
||
|
CODE_FOR_vec_cmpv4dfv4di = 10000,
|
||
|
CODE_FOR_vec_cmpv4sfv4si = 10001,
|
||
|
CODE_FOR_vec_cmpv2dfv2di = 10002,
|
||
|
CODE_FOR_vec_cmpuv16sihi = 10003,
|
||
|
CODE_FOR_vec_cmpuv8siqi = 10004,
|
||
|
CODE_FOR_vec_cmpuv4siqi = 10005,
|
||
|
CODE_FOR_vec_cmpuv8diqi = 10006,
|
||
|
CODE_FOR_vec_cmpuv4diqi = 10007,
|
||
|
CODE_FOR_vec_cmpuv2diqi = 10008,
|
||
|
CODE_FOR_vec_cmpuv64qidi = 10009,
|
||
|
CODE_FOR_vec_cmpuv16qihi = 10010,
|
||
|
CODE_FOR_vec_cmpuv32qisi = 10011,
|
||
|
CODE_FOR_vec_cmpuv32hisi = 10012,
|
||
|
CODE_FOR_vec_cmpuv16hihi = 10013,
|
||
|
CODE_FOR_vec_cmpuv8hiqi = 10014,
|
||
|
CODE_FOR_vec_cmpuv32qiv32qi = 10015,
|
||
|
CODE_FOR_vec_cmpuv16hiv16hi = 10016,
|
||
|
CODE_FOR_vec_cmpuv8siv8si = 10017,
|
||
|
CODE_FOR_vec_cmpuv4div4di = 10018,
|
||
|
CODE_FOR_vec_cmpuv16qiv16qi = 10019,
|
||
|
CODE_FOR_vec_cmpuv8hiv8hi = 10020,
|
||
|
CODE_FOR_vec_cmpuv4siv4si = 10021,
|
||
|
CODE_FOR_vec_cmpuv2div2di = 10022,
|
||
|
CODE_FOR_vec_cmpeqv2div2di = 10023,
|
||
|
CODE_FOR_vcondv64qiv16sf = 10024,
|
||
|
CODE_FOR_vcondv64qiv8df = 10025,
|
||
|
CODE_FOR_vcondv32hiv16sf = 10026,
|
||
|
CODE_FOR_vcondv32hiv8df = 10027,
|
||
|
CODE_FOR_vcondv16siv16sf = 10028,
|
||
|
CODE_FOR_vcondv16siv8df = 10029,
|
||
|
CODE_FOR_vcondv8div16sf = 10030,
|
||
|
CODE_FOR_vcondv8div8df = 10031,
|
||
|
CODE_FOR_vcondv16sfv16sf = 10032,
|
||
|
CODE_FOR_vcondv16sfv8df = 10033,
|
||
|
CODE_FOR_vcondv8dfv16sf = 10034,
|
||
|
CODE_FOR_vcondv8dfv8df = 10035,
|
||
|
CODE_FOR_vcondv32qiv8sf = 10036,
|
||
|
CODE_FOR_vcondv32qiv4df = 10037,
|
||
|
CODE_FOR_vcondv16hiv8sf = 10038,
|
||
|
CODE_FOR_vcondv16hiv4df = 10039,
|
||
|
CODE_FOR_vcondv8siv8sf = 10040,
|
||
|
CODE_FOR_vcondv8siv4df = 10041,
|
||
|
CODE_FOR_vcondv4div8sf = 10042,
|
||
|
CODE_FOR_vcondv4div4df = 10043,
|
||
|
CODE_FOR_vcondv8sfv8sf = 10044,
|
||
|
CODE_FOR_vcondv8sfv4df = 10045,
|
||
|
CODE_FOR_vcondv4dfv8sf = 10046,
|
||
|
CODE_FOR_vcondv4dfv4df = 10047,
|
||
|
CODE_FOR_vcondv16qiv4sf = 10048,
|
||
|
CODE_FOR_vcondv8hiv4sf = 10049,
|
||
|
CODE_FOR_vcondv4siv4sf = 10050,
|
||
|
CODE_FOR_vcondv2div4sf = 10051,
|
||
|
CODE_FOR_vcondv4sfv4sf = 10052,
|
||
|
CODE_FOR_vcondv2dfv4sf = 10053,
|
||
|
CODE_FOR_vcondv16qiv2df = 10054,
|
||
|
CODE_FOR_vcondv8hiv2df = 10055,
|
||
|
CODE_FOR_vcondv4siv2df = 10056,
|
||
|
CODE_FOR_vcondv2div2df = 10057,
|
||
|
CODE_FOR_vcondv4sfv2df = 10058,
|
||
|
CODE_FOR_vcondv2dfv2df = 10059,
|
||
|
CODE_FOR_vcondv32hfv32hf = 10060,
|
||
|
CODE_FOR_vcondv16hfv16hf = 10061,
|
||
|
CODE_FOR_vcondv8hfv8hf = 10062,
|
||
|
CODE_FOR_vcondv32hfv32hi = 10063,
|
||
|
CODE_FOR_vcondv16hfv16hi = 10064,
|
||
|
CODE_FOR_vcondv8hfv8hi = 10065,
|
||
|
CODE_FOR_vcondv32hiv32hf = 10066,
|
||
|
CODE_FOR_vcondv16hiv16hf = 10067,
|
||
|
CODE_FOR_vcondv8hiv8hf = 10068,
|
||
|
CODE_FOR_vcond_mask_v16sihi = 10069,
|
||
|
CODE_FOR_vcond_mask_v8siqi = 10070,
|
||
|
CODE_FOR_vcond_mask_v4siqi = 10071,
|
||
|
CODE_FOR_vcond_mask_v8diqi = 10072,
|
||
|
CODE_FOR_vcond_mask_v4diqi = 10073,
|
||
|
CODE_FOR_vcond_mask_v2diqi = 10074,
|
||
|
CODE_FOR_vcond_mask_v16sfhi = 10075,
|
||
|
CODE_FOR_vcond_mask_v8sfqi = 10076,
|
||
|
CODE_FOR_vcond_mask_v4sfqi = 10077,
|
||
|
CODE_FOR_vcond_mask_v8dfqi = 10078,
|
||
|
CODE_FOR_vcond_mask_v4dfqi = 10079,
|
||
|
CODE_FOR_vcond_mask_v2dfqi = 10080,
|
||
|
CODE_FOR_vcond_mask_v64qidi = 10081,
|
||
|
CODE_FOR_vcond_mask_v16qihi = 10082,
|
||
|
CODE_FOR_vcond_mask_v32qisi = 10083,
|
||
|
CODE_FOR_vcond_mask_v32hisi = 10084,
|
||
|
CODE_FOR_vcond_mask_v16hihi = 10085,
|
||
|
CODE_FOR_vcond_mask_v8hiqi = 10086,
|
||
|
CODE_FOR_vcond_mask_v32hfsi = 10087,
|
||
|
CODE_FOR_vcond_mask_v16hfhi = 10088,
|
||
|
CODE_FOR_vcond_mask_v8hfqi = 10089,
|
||
|
CODE_FOR_vcond_mask_v32qiv32qi = 10090,
|
||
|
CODE_FOR_vcond_mask_v16hiv16hi = 10091,
|
||
|
CODE_FOR_vcond_mask_v8siv8si = 10092,
|
||
|
CODE_FOR_vcond_mask_v4div4di = 10093,
|
||
|
CODE_FOR_vcond_mask_v16qiv16qi = 10094,
|
||
|
CODE_FOR_vcond_mask_v8hiv8hi = 10095,
|
||
|
CODE_FOR_vcond_mask_v4siv4si = 10096,
|
||
|
CODE_FOR_vcond_mask_v2div2di = 10097,
|
||
|
CODE_FOR_vcond_mask_v8sfv8si = 10098,
|
||
|
CODE_FOR_vcond_mask_v4dfv4di = 10099,
|
||
|
CODE_FOR_vcond_mask_v4sfv4si = 10100,
|
||
|
CODE_FOR_vcond_mask_v2dfv2di = 10101,
|
||
|
CODE_FOR_andv16hf3 = 10102,
|
||
|
CODE_FOR_andv16hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_iorv16hf3 = 10103,
|
||
|
CODE_FOR_iorv16hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_xorv16hf3 = 10104,
|
||
|
CODE_FOR_xorv16hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_andv8hf3 = 10105,
|
||
|
CODE_FOR_andv8hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_iorv8hf3 = 10106,
|
||
|
CODE_FOR_iorv8hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_xorv8hf3 = 10107,
|
||
|
CODE_FOR_xorv8hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_andv8sf3 = 10108,
|
||
|
CODE_FOR_andv8sf3_mask = 10109,
|
||
|
CODE_FOR_iorv8sf3 = 10110,
|
||
|
CODE_FOR_iorv8sf3_mask = 10111,
|
||
|
CODE_FOR_xorv8sf3 = 10112,
|
||
|
CODE_FOR_xorv8sf3_mask = 10113,
|
||
|
CODE_FOR_andv4sf3 = 10114,
|
||
|
CODE_FOR_andv4sf3_mask = 10115,
|
||
|
CODE_FOR_iorv4sf3 = 10116,
|
||
|
CODE_FOR_iorv4sf3_mask = 10117,
|
||
|
CODE_FOR_xorv4sf3 = 10118,
|
||
|
CODE_FOR_xorv4sf3_mask = 10119,
|
||
|
CODE_FOR_andv4df3 = 10120,
|
||
|
CODE_FOR_andv4df3_mask = 10121,
|
||
|
CODE_FOR_iorv4df3 = 10122,
|
||
|
CODE_FOR_iorv4df3_mask = 10123,
|
||
|
CODE_FOR_xorv4df3 = 10124,
|
||
|
CODE_FOR_xorv4df3_mask = 10125,
|
||
|
CODE_FOR_andv2df3 = 10126,
|
||
|
CODE_FOR_andv2df3_mask = 10127,
|
||
|
CODE_FOR_iorv2df3 = 10128,
|
||
|
CODE_FOR_iorv2df3_mask = 10129,
|
||
|
CODE_FOR_xorv2df3 = 10130,
|
||
|
CODE_FOR_xorv2df3_mask = 10131,
|
||
|
CODE_FOR_andv32hf3 = 10132,
|
||
|
CODE_FOR_andv32hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_iorv32hf3 = 10133,
|
||
|
CODE_FOR_iorv32hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_xorv32hf3 = 10134,
|
||
|
CODE_FOR_xorv32hf3_mask = CODE_FOR_nothing,
|
||
|
CODE_FOR_andv16sf3 = 10135,
|
||
|
CODE_FOR_andv16sf3_mask = 10136,
|
||
|
CODE_FOR_iorv16sf3 = 10137,
|
||
|
CODE_FOR_iorv16sf3_mask = 10138,
|
||
|
CODE_FOR_xorv16sf3 = 10139,
|
||
|
CODE_FOR_xorv16sf3_mask = 10140,
|
||
|
CODE_FOR_andv8df3 = 10141,
|
||
|
CODE_FOR_andv8df3_mask = 10142,
|
||
|
CODE_FOR_iorv8df3 = 10143,
|
||
|
CODE_FOR_iorv8df3_mask = 10144,
|
||
|
CODE_FOR_xorv8df3 = 10145,
|
||
|
CODE_FOR_xorv8df3_mask = 10146,
|
||
|
CODE_FOR_copysignv32hf3 = 10147,
|
||
|
CODE_FOR_copysignv16hf3 = 10148,
|
||
|
CODE_FOR_copysignv8hf3 = 10149,
|
||
|
CODE_FOR_copysignv16sf3 = 10150,
|
||
|
CODE_FOR_copysignv8sf3 = 10151,
|
||
|
CODE_FOR_copysignv4sf3 = 10152,
|
||
|
CODE_FOR_copysignv8df3 = 10153,
|
||
|
CODE_FOR_copysignv4df3 = 10154,
|
||
|
CODE_FOR_copysignv2df3 = 10155,
|
||
|
CODE_FOR_xorsignv32hf3 = 10156,
|
||
|
CODE_FOR_xorsignv16hf3 = 10157,
|
||
|
CODE_FOR_xorsignv8hf3 = 10158,
|
||
|
CODE_FOR_xorsignv16sf3 = 10159,
|
||
|
CODE_FOR_xorsignv8sf3 = 10160,
|
||
|
CODE_FOR_xorsignv4sf3 = 10161,
|
||
|
CODE_FOR_xorsignv8df3 = 10162,
|
||
|
CODE_FOR_xorsignv4df3 = 10163,
|
||
|
CODE_FOR_xorsignv2df3 = 10164,
|
||
|
CODE_FOR_signbitv16sf2 = 10165,
|
||
|
CODE_FOR_signbitv8sf2 = 10166,
|
||
|
CODE_FOR_signbitv4sf2 = 10167,
|
||
|
CODE_FOR_andtf3 = 10168,
|
||
|
CODE_FOR_iortf3 = 10169,
|
||
|
CODE_FOR_xortf3 = 10170,
|
||
|
CODE_FOR_fmasf4 = 10171,
|
||
|
CODE_FOR_fmadf4 = 10172,
|
||
|
CODE_FOR_fmav4sf4 = 10173,
|
||
|
CODE_FOR_fmav2df4 = 10174,
|
||
|
CODE_FOR_fmav8sf4 = 10175,
|
||
|
CODE_FOR_fmav4df4 = 10176,
|
||
|
CODE_FOR_fmav16sf4 = 10177,
|
||
|
CODE_FOR_fmav8df4 = 10178,
|
||
|
CODE_FOR_fmahf4 = 10179,
|
||
|
CODE_FOR_fmav8hf4 = 10180,
|
||
|
CODE_FOR_fmav16hf4 = 10181,
|
||
|
CODE_FOR_fmav32hf4 = 10182,
|
||
|
CODE_FOR_fmssf4 = 10183,
|
||
|
CODE_FOR_fmsdf4 = 10184,
|
||
|
CODE_FOR_fmsv4sf4 = 10185,
|
||
|
CODE_FOR_fmsv2df4 = 10186,
|
||
|
CODE_FOR_fmsv8sf4 = 10187,
|
||
|
CODE_FOR_fmsv4df4 = 10188,
|
||
|
CODE_FOR_fmsv16sf4 = 10189,
|
||
|
CODE_FOR_fmsv8df4 = 10190,
|
||
|
CODE_FOR_fmshf4 = 10191,
|
||
|
CODE_FOR_fmsv8hf4 = 10192,
|
||
|
CODE_FOR_fmsv16hf4 = 10193,
|
||
|
CODE_FOR_fmsv32hf4 = 10194,
|
||
|
CODE_FOR_fnmasf4 = 10195,
|
||
|
CODE_FOR_fnmadf4 = 10196,
|
||
|
CODE_FOR_fnmav4sf4 = 10197,
|
||
|
CODE_FOR_fnmav2df4 = 10198,
|
||
|
CODE_FOR_fnmav8sf4 = 10199,
|
||
|
CODE_FOR_fnmav4df4 = 10200,
|
||
|
CODE_FOR_fnmav16sf4 = 10201,
|
||
|
CODE_FOR_fnmav8df4 = 10202,
|
||
|
CODE_FOR_fnmahf4 = 10203,
|
||
|
CODE_FOR_fnmav8hf4 = 10204,
|
||
|
CODE_FOR_fnmav16hf4 = 10205,
|
||
|
CODE_FOR_fnmav32hf4 = 10206,
|
||
|
CODE_FOR_fnmssf4 = 10207,
|
||
|
CODE_FOR_fnmsdf4 = 10208,
|
||
|
CODE_FOR_fnmsv4sf4 = 10209,
|
||
|
CODE_FOR_fnmsv2df4 = 10210,
|
||
|
CODE_FOR_fnmsv8sf4 = 10211,
|
||
|
CODE_FOR_fnmsv4df4 = 10212,
|
||
|
CODE_FOR_fnmsv16sf4 = 10213,
|
||
|
CODE_FOR_fnmsv8df4 = 10214,
|
||
|
CODE_FOR_fnmshf4 = 10215,
|
||
|
CODE_FOR_fnmsv8hf4 = 10216,
|
||
|
CODE_FOR_fnmsv16hf4 = 10217,
|
||
|
CODE_FOR_fnmsv32hf4 = 10218,
|
||
|
CODE_FOR_fma4i_fmadd_sf = 10219,
|
||
|
CODE_FOR_fma4i_fmadd_df = 10220,
|
||
|
CODE_FOR_fma4i_fmadd_v4sf = 10221,
|
||
|
CODE_FOR_fma4i_fmadd_v2df = 10222,
|
||
|
CODE_FOR_fma4i_fmadd_v8sf = 10223,
|
||
|
CODE_FOR_fma4i_fmadd_v4df = 10224,
|
||
|
CODE_FOR_fma4i_fmadd_v16sf = 10225,
|
||
|
CODE_FOR_fma4i_fmadd_v8df = 10226,
|
||
|
CODE_FOR_fma4i_fmsub_sf = 10227,
|
||
|
CODE_FOR_fma4i_fmsub_df = 10228,
|
||
|
CODE_FOR_fma4i_fmsub_v4sf = 10229,
|
||
|
CODE_FOR_fma4i_fmsub_v2df = 10230,
|
||
|
CODE_FOR_fma4i_fmsub_v8sf = 10231,
|
||
|
CODE_FOR_fma4i_fmsub_v4df = 10232,
|
||
|
CODE_FOR_fma4i_fmsub_v16sf = 10233,
|
||
|
CODE_FOR_fma4i_fmsub_v8df = 10234,
|
||
|
CODE_FOR_fma4i_fnmadd_sf = 10235,
|
||
|
CODE_FOR_fma4i_fnmadd_df = 10236,
|
||
|
CODE_FOR_fma4i_fnmadd_v4sf = 10237,
|
||
|
CODE_FOR_fma4i_fnmadd_v2df = 10238,
|
||
|
CODE_FOR_fma4i_fnmadd_v8sf = 10239,
|
||
|
CODE_FOR_fma4i_fnmadd_v4df = 10240,
|
||
|
CODE_FOR_fma4i_fnmadd_v16sf = 10241,
|
||
|
CODE_FOR_fma4i_fnmadd_v8df = 10242,
|
||
|
CODE_FOR_fma4i_fnmsub_sf = 10243,
|
||
|
CODE_FOR_fma4i_fnmsub_df = 10244,
|
||
|
CODE_FOR_fma4i_fnmsub_v4sf = 10245,
|
||
|
CODE_FOR_fma4i_fnmsub_v2df = 10246,
|
||
|
CODE_FOR_fma4i_fnmsub_v8sf = 10247,
|
||
|
CODE_FOR_fma4i_fnmsub_v4df = 10248,
|
||
|
CODE_FOR_fma4i_fnmsub_v16sf = 10249,
|
||
|
CODE_FOR_fma4i_fnmsub_v8df = 10250,
|
||
|
CODE_FOR_avx512bw_fmadd_v32hf_maskz = 10251,
|
||
|
CODE_FOR_avx512bw_fmadd_v32hf_maskz_round = 10252,
|
||
|
CODE_FOR_avx512vl_fmadd_v16hf_maskz = 10253,
|
||
|
CODE_FOR_avx512vl_fmadd_v16hf_maskz_round = 10254,
|
||
|
CODE_FOR_avx512fp16_fmadd_v8hf_maskz = 10255,
|
||
|
CODE_FOR_avx512fp16_fmadd_v8hf_maskz_round = 10256,
|
||
|
CODE_FOR_avx512f_fmadd_v16sf_maskz = 10257,
|
||
|
CODE_FOR_avx512f_fmadd_v16sf_maskz_round = 10258,
|
||
|
CODE_FOR_avx512vl_fmadd_v8sf_maskz = 10259,
|
||
|
CODE_FOR_avx512vl_fmadd_v8sf_maskz_round = 10260,
|
||
|
CODE_FOR_avx512vl_fmadd_v4sf_maskz = 10261,
|
||
|
CODE_FOR_avx512vl_fmadd_v4sf_maskz_round = 10262,
|
||
|
CODE_FOR_avx512f_fmadd_v8df_maskz = 10263,
|
||
|
CODE_FOR_avx512f_fmadd_v8df_maskz_round = 10264,
|
||
|
CODE_FOR_avx512vl_fmadd_v4df_maskz = 10265,
|
||
|
CODE_FOR_avx512vl_fmadd_v4df_maskz_round = 10266,
|
||
|
CODE_FOR_avx512vl_fmadd_v2df_maskz = 10267,
|
||
|
CODE_FOR_avx512vl_fmadd_v2df_maskz_round = 10268,
|
||
|
CODE_FOR_cond_fmav32hf = 10269,
|
||
|
CODE_FOR_cond_fmav16hf = 10270,
|
||
|
CODE_FOR_cond_fmav8hf = 10271,
|
||
|
CODE_FOR_cond_fmav16sf = 10272,
|
||
|
CODE_FOR_cond_fmav8sf = 10273,
|
||
|
CODE_FOR_cond_fmav4sf = 10274,
|
||
|
CODE_FOR_cond_fmav8df = 10275,
|
||
|
CODE_FOR_cond_fmav4df = 10276,
|
||
|
CODE_FOR_cond_fmav2df = 10277,
|
||
|
CODE_FOR_avx512bw_fmsub_v32hf_maskz = 10278,
|
||
|
CODE_FOR_avx512bw_fmsub_v32hf_maskz_round = 10279,
|
||
|
CODE_FOR_avx512vl_fmsub_v16hf_maskz = 10280,
|
||
|
CODE_FOR_avx512vl_fmsub_v16hf_maskz_round = 10281,
|
||
|
CODE_FOR_avx512fp16_fmsub_v8hf_maskz = 10282,
|
||
|
CODE_FOR_avx512fp16_fmsub_v8hf_maskz_round = 10283,
|
||
|
CODE_FOR_avx512f_fmsub_v16sf_maskz = 10284,
|
||
|
CODE_FOR_avx512f_fmsub_v16sf_maskz_round = 10285,
|
||
|
CODE_FOR_avx512vl_fmsub_v8sf_maskz = 10286,
|
||
|
CODE_FOR_avx512vl_fmsub_v8sf_maskz_round = 10287,
|
||
|
CODE_FOR_avx512vl_fmsub_v4sf_maskz = 10288,
|
||
|
CODE_FOR_avx512vl_fmsub_v4sf_maskz_round = 10289,
|
||
|
CODE_FOR_avx512f_fmsub_v8df_maskz = 10290,
|
||
|
CODE_FOR_avx512f_fmsub_v8df_maskz_round = 10291,
|
||
|
CODE_FOR_avx512vl_fmsub_v4df_maskz = 10292,
|
||
|
CODE_FOR_avx512vl_fmsub_v4df_maskz_round = 10293,
|
||
|
CODE_FOR_avx512vl_fmsub_v2df_maskz = 10294,
|
||
|
CODE_FOR_avx512vl_fmsub_v2df_maskz_round = 10295,
|
||
|
CODE_FOR_cond_fmsv32hf = 10296,
|
||
|
CODE_FOR_cond_fmsv16hf = 10297,
|
||
|
CODE_FOR_cond_fmsv8hf = 10298,
|
||
|
CODE_FOR_cond_fmsv16sf = 10299,
|
||
|
CODE_FOR_cond_fmsv8sf = 10300,
|
||
|
CODE_FOR_cond_fmsv4sf = 10301,
|
||
|
CODE_FOR_cond_fmsv8df = 10302,
|
||
|
CODE_FOR_cond_fmsv4df = 10303,
|
||
|
CODE_FOR_cond_fmsv2df = 10304,
|
||
|
CODE_FOR_avx512bw_fnmadd_v32hf_maskz = 10305,
|
||
|
CODE_FOR_avx512bw_fnmadd_v32hf_maskz_round = 10306,
|
||
|
CODE_FOR_avx512vl_fnmadd_v16hf_maskz = 10307,
|
||
|
CODE_FOR_avx512vl_fnmadd_v16hf_maskz_round = 10308,
|
||
|
CODE_FOR_avx512fp16_fnmadd_v8hf_maskz = 10309,
|
||
|
CODE_FOR_avx512fp16_fnmadd_v8hf_maskz_round = 10310,
|
||
|
CODE_FOR_avx512f_fnmadd_v16sf_maskz = 10311,
|
||
|
CODE_FOR_avx512f_fnmadd_v16sf_maskz_round = 10312,
|
||
|
CODE_FOR_avx512vl_fnmadd_v8sf_maskz = 10313,
|
||
|
CODE_FOR_avx512vl_fnmadd_v8sf_maskz_round = 10314,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4sf_maskz = 10315,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4sf_maskz_round = 10316,
|
||
|
CODE_FOR_avx512f_fnmadd_v8df_maskz = 10317,
|
||
|
CODE_FOR_avx512f_fnmadd_v8df_maskz_round = 10318,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4df_maskz = 10319,
|
||
|
CODE_FOR_avx512vl_fnmadd_v4df_maskz_round = 10320,
|
||
|
CODE_FOR_avx512vl_fnmadd_v2df_maskz = 10321,
|
||
|
CODE_FOR_avx512vl_fnmadd_v2df_maskz_round = 10322,
|
||
|
CODE_FOR_cond_fnmav32hf = 10323,
|
||
|
CODE_FOR_cond_fnmav16hf = 10324,
|
||
|
CODE_FOR_cond_fnmav8hf = 10325,
|
||
|
CODE_FOR_cond_fnmav16sf = 10326,
|
||
|
CODE_FOR_cond_fnmav8sf = 10327,
|
||
|
CODE_FOR_cond_fnmav4sf = 10328,
|
||
|
CODE_FOR_cond_fnmav8df = 10329,
|
||
|
CODE_FOR_cond_fnmav4df = 10330,
|
||
|
CODE_FOR_cond_fnmav2df = 10331,
|
||
|
CODE_FOR_avx512bw_fnmsub_v32hf_maskz = 10332,
|
||
|
CODE_FOR_avx512bw_fnmsub_v32hf_maskz_round = 10333,
|
||
|
CODE_FOR_avx512vl_fnmsub_v16hf_maskz = 10334,
|
||
|
CODE_FOR_avx512vl_fnmsub_v16hf_maskz_round = 10335,
|
||
|
CODE_FOR_avx512fp16_fnmsub_v8hf_maskz = 10336,
|
||
|
CODE_FOR_avx512fp16_fnmsub_v8hf_maskz_round = 10337,
|
||
|
CODE_FOR_avx512f_fnmsub_v16sf_maskz = 10338,
|
||
|
CODE_FOR_avx512f_fnmsub_v16sf_maskz_round = 10339,
|
||
|
CODE_FOR_avx512vl_fnmsub_v8sf_maskz = 10340,
|
||
|
CODE_FOR_avx512vl_fnmsub_v8sf_maskz_round = 10341,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4sf_maskz = 10342,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4sf_maskz_round = 10343,
|
||
|
CODE_FOR_avx512f_fnmsub_v8df_maskz = 10344,
|
||
|
CODE_FOR_avx512f_fnmsub_v8df_maskz_round = 10345,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4df_maskz = 10346,
|
||
|
CODE_FOR_avx512vl_fnmsub_v4df_maskz_round = 10347,
|
||
|
CODE_FOR_avx512vl_fnmsub_v2df_maskz = 10348,
|
||
|
CODE_FOR_avx512vl_fnmsub_v2df_maskz_round = 10349,
|
||
|
CODE_FOR_cond_fnmsv32hf = 10350,
|
||
|
CODE_FOR_cond_fnmsv16hf = 10351,
|
||
|
CODE_FOR_cond_fnmsv8hf = 10352,
|
||
|
CODE_FOR_cond_fnmsv16sf = 10353,
|
||
|
CODE_FOR_cond_fnmsv8sf = 10354,
|
||
|
CODE_FOR_cond_fnmsv4sf = 10355,
|
||
|
CODE_FOR_cond_fnmsv8df = 10356,
|
||
|
CODE_FOR_cond_fnmsv4df = 10357,
|
||
|
CODE_FOR_cond_fnmsv2df = 10358,
|
||
|
CODE_FOR_vec_fmaddsubv16sf4 = 10359,
|
||
|
CODE_FOR_vec_fmaddsubv8sf4 = 10360,
|
||
|
CODE_FOR_vec_fmaddsubv4sf4 = 10361,
|
||
|
CODE_FOR_vec_fmaddsubv8df4 = 10362,
|
||
|
CODE_FOR_vec_fmaddsubv4df4 = 10363,
|
||
|
CODE_FOR_vec_fmaddsubv2df4 = 10364,
|
||
|
CODE_FOR_vec_fmsubaddv16sf4 = 10365,
|
||
|
CODE_FOR_vec_fmsubaddv8sf4 = 10366,
|
||
|
CODE_FOR_vec_fmsubaddv4sf4 = 10367,
|
||
|
CODE_FOR_vec_fmsubaddv8df4 = 10368,
|
||
|
CODE_FOR_vec_fmsubaddv4df4 = 10369,
|
||
|
CODE_FOR_vec_fmsubaddv2df4 = 10370,
|
||
|
CODE_FOR_fmaddsub_v16sf = 10371,
|
||
|
CODE_FOR_fmaddsub_v8sf = 10372,
|
||
|
CODE_FOR_fmaddsub_v4sf = 10373,
|
||
|
CODE_FOR_fmaddsub_v8df = 10374,
|
||
|
CODE_FOR_fmaddsub_v4df = 10375,
|
||
|
CODE_FOR_fmaddsub_v2df = 10376,
|
||
|
CODE_FOR_avx512bw_fmaddsub_v32hf_maskz = 10377,
|
||
|
CODE_FOR_avx512bw_fmaddsub_v32hf_maskz_round = 10378,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v16hf_maskz = 10379,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v16hf_maskz_round = 10380,
|
||
|
CODE_FOR_avx512fp16_fmaddsub_v8hf_maskz = 10381,
|
||
|
CODE_FOR_avx512fp16_fmaddsub_v8hf_maskz_round = 10382,
|
||
|
CODE_FOR_avx512f_fmaddsub_v16sf_maskz = 10383,
|
||
|
CODE_FOR_avx512f_fmaddsub_v16sf_maskz_round = 10384,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v8sf_maskz = 10385,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v8sf_maskz_round = 10386,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4sf_maskz = 10387,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4sf_maskz_round = 10388,
|
||
|
CODE_FOR_avx512f_fmaddsub_v8df_maskz = 10389,
|
||
|
CODE_FOR_avx512f_fmaddsub_v8df_maskz_round = 10390,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4df_maskz = 10391,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v4df_maskz_round = 10392,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v2df_maskz = 10393,
|
||
|
CODE_FOR_avx512vl_fmaddsub_v2df_maskz_round = 10394,
|
||
|
CODE_FOR_avx512bw_fmsubadd_v32hf_maskz = 10395,
|
||
|
CODE_FOR_avx512bw_fmsubadd_v32hf_maskz_round = 10396,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v16hf_maskz = 10397,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v16hf_maskz_round = 10398,
|
||
|
CODE_FOR_avx512fp16_fmsubadd_v8hf_maskz = 10399,
|
||
|
CODE_FOR_avx512fp16_fmsubadd_v8hf_maskz_round = 10400,
|
||
|
CODE_FOR_avx512f_fmsubadd_v16sf_maskz = 10401,
|
||
|
CODE_FOR_avx512f_fmsubadd_v16sf_maskz_round = 10402,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v8sf_maskz = 10403,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v8sf_maskz_round = 10404,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4sf_maskz = 10405,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4sf_maskz_round = 10406,
|
||
|
CODE_FOR_avx512f_fmsubadd_v8df_maskz = 10407,
|
||
|
CODE_FOR_avx512f_fmsubadd_v8df_maskz_round = 10408,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4df_maskz = 10409,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v4df_maskz_round = 10410,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v2df_maskz = 10411,
|
||
|
CODE_FOR_avx512vl_fmsubadd_v2df_maskz_round = 10412,
|
||
|
CODE_FOR_fmai_vmfmadd_v8hf = 10413,
|
||
|
CODE_FOR_fmai_vmfmadd_v8hf_round = 10414,
|
||
|
CODE_FOR_fmai_vmfmadd_v4sf = 10415,
|
||
|
CODE_FOR_fmai_vmfmadd_v4sf_round = 10416,
|
||
|
CODE_FOR_fmai_vmfmadd_v2df = 10417,
|
||
|
CODE_FOR_fmai_vmfmadd_v2df_round = 10418,
|
||
|
CODE_FOR_fmai_vmfmsub_v8hf = 10419,
|
||
|
CODE_FOR_fmai_vmfmsub_v8hf_round = 10420,
|
||
|
CODE_FOR_fmai_vmfmsub_v4sf = 10421,
|
||
|
CODE_FOR_fmai_vmfmsub_v4sf_round = 10422,
|
||
|
CODE_FOR_fmai_vmfmsub_v2df = 10423,
|
||
|
CODE_FOR_fmai_vmfmsub_v2df_round = 10424,
|
||
|
CODE_FOR_fmai_vmfnmadd_v8hf = 10425,
|
||
|
CODE_FOR_fmai_vmfnmadd_v8hf_round = 10426,
|
||
|
CODE_FOR_fmai_vmfnmadd_v4sf = 10427,
|
||
|
CODE_FOR_fmai_vmfnmadd_v4sf_round = 10428,
|
||
|
CODE_FOR_fmai_vmfnmadd_v2df = 10429,
|
||
|
CODE_FOR_fmai_vmfnmadd_v2df_round = 10430,
|
||
|
CODE_FOR_fmai_vmfnmsub_v8hf = 10431,
|
||
|
CODE_FOR_fmai_vmfnmsub_v8hf_round = 10432,
|
||
|
CODE_FOR_fmai_vmfnmsub_v4sf = 10433,
|
||
|
CODE_FOR_fmai_vmfnmsub_v4sf_round = 10434,
|
||
|
CODE_FOR_fmai_vmfnmsub_v2df = 10435,
|
||
|
CODE_FOR_fmai_vmfnmsub_v2df_round = 10436,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_maskz = 10437,
|
||
|
CODE_FOR_avx512f_vmfmadd_v8hf_maskz_round = 10438,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_maskz = 10439,
|
||
|
CODE_FOR_avx512f_vmfmadd_v4sf_maskz_round = 10440,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_maskz = 10441,
|
||
|
CODE_FOR_avx512f_vmfmadd_v2df_maskz_round = 10442,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_maskz = 10443,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v8hf_maskz_round = 10444,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_maskz = 10445,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v4sf_maskz_round = 10446,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_maskz = 10447,
|
||
|
CODE_FOR_avx512f_vmfnmadd_v2df_maskz_round = 10448,
|
||
|
CODE_FOR_fma4i_vmfmadd_v4sf = 10449,
|
||
|
CODE_FOR_fma4i_vmfmadd_v2df = 10450,
|
||
|
CODE_FOR_avx512bw_fmaddc_v32hf_mask1 = 10451,
|
||
|
CODE_FOR_avx512bw_fmaddc_v32hf_mask1_round = 10452,
|
||
|
CODE_FOR_avx512vl_fmaddc_v16hf_mask1 = 10453,
|
||
|
CODE_FOR_avx512vl_fmaddc_v16hf_mask1_round = 10454,
|
||
|
CODE_FOR_avx512fp16_fmaddc_v8hf_mask1 = 10455,
|
||
|
CODE_FOR_avx512fp16_fmaddc_v8hf_mask1_round = 10456,
|
||
|
CODE_FOR_avx512bw_fmaddc_v32hf_maskz = 10457,
|
||
|
CODE_FOR_avx512bw_fmaddc_v32hf_maskz_round = 10458,
|
||
|
CODE_FOR_avx512vl_fmaddc_v16hf_maskz = 10459,
|
||
|
CODE_FOR_avx512vl_fmaddc_v16hf_maskz_round = 10460,
|
||
|
CODE_FOR_avx512fp16_fmaddc_v8hf_maskz = 10461,
|
||
|
CODE_FOR_avx512fp16_fmaddc_v8hf_maskz_round = 10462,
|
||
|
CODE_FOR_avx512bw_fcmaddc_v32hf_mask1 = 10463,
|
||
|
CODE_FOR_avx512bw_fcmaddc_v32hf_mask1_round = 10464,
|
||
|
CODE_FOR_avx512vl_fcmaddc_v16hf_mask1 = 10465,
|
||
|
CODE_FOR_avx512vl_fcmaddc_v16hf_mask1_round = 10466,
|
||
|
CODE_FOR_avx512fp16_fcmaddc_v8hf_mask1 = 10467,
|
||
|
CODE_FOR_avx512fp16_fcmaddc_v8hf_mask1_round = 10468,
|
||
|
CODE_FOR_avx512bw_fcmaddc_v32hf_maskz = 10469,
|
||
|
CODE_FOR_avx512bw_fcmaddc_v32hf_maskz_round = 10470,
|
||
|
CODE_FOR_avx512vl_fcmaddc_v16hf_maskz = 10471,
|
||
|
CODE_FOR_avx512vl_fcmaddc_v16hf_maskz_round = 10472,
|
||
|
CODE_FOR_avx512fp16_fcmaddc_v8hf_maskz = 10473,
|
||
|
CODE_FOR_avx512fp16_fcmaddc_v8hf_maskz_round = 10474,
|
||
|
CODE_FOR_cmlav32hf4 = 10475,
|
||
|
CODE_FOR_cmla_conjv32hf4 = 10476,
|
||
|
CODE_FOR_cmlav16hf4 = 10477,
|
||
|
CODE_FOR_cmla_conjv16hf4 = 10478,
|
||
|
CODE_FOR_cmlav8hf4 = 10479,
|
||
|
CODE_FOR_cmla_conjv8hf4 = 10480,
|
||
|
CODE_FOR_cmulv32hf3 = 10481,
|
||
|
CODE_FOR_cmul_conjv32hf3 = 10482,
|
||
|
CODE_FOR_cmulv16hf3 = 10483,
|
||
|
CODE_FOR_cmul_conjv16hf3 = 10484,
|
||
|
CODE_FOR_cmulv8hf3 = 10485,
|
||
|
CODE_FOR_cmul_conjv8hf3 = 10486,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_maskz = 10487,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_maskz_round = 10488,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_mask1 = 10489,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_mask1_round = 10490,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_maskz = 10491,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_maskz_round = 10492,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_mask1 = 10493,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_mask1_round = 10494,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_mask3 = 10495,
|
||
|
CODE_FOR_avx512fp16_fcmaddcsh_v8hf_mask3_round = 10496,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_mask3 = 10497,
|
||
|
CODE_FOR_avx512fp16_fmaddcsh_v8hf_mask3_round = 10498,
|
||
|
CODE_FOR_floatv8hiv8hf2 = 10499,
|
||
|
CODE_FOR_floatunsv8hiv8hf2 = 10500,
|
||
|
CODE_FOR_floatv16hiv16hf2 = 10501,
|
||
|
CODE_FOR_floatunsv16hiv16hf2 = 10502,
|
||
|
CODE_FOR_floatv32hiv32hf2 = 10503,
|
||
|
CODE_FOR_floatunsv32hiv32hf2 = 10504,
|
||
|
CODE_FOR_floatv8siv8hf2 = 10505,
|
||
|
CODE_FOR_floatunsv8siv8hf2 = 10506,
|
||
|
CODE_FOR_floatv16siv16hf2 = 10507,
|
||
|
CODE_FOR_floatunsv16siv16hf2 = 10508,
|
||
|
CODE_FOR_floatv8div8hf2 = 10509,
|
||
|
CODE_FOR_floatunsv8div8hf2 = 10510,
|
||
|
CODE_FOR_floatv4siv4hf2 = 10511,
|
||
|
CODE_FOR_floatunsv4siv4hf2 = 10512,
|
||
|
CODE_FOR_floatv4div4hf2 = 10513,
|
||
|
CODE_FOR_floatunsv4div4hf2 = 10514,
|
||
|
CODE_FOR_avx512fp16_floatv4siv4hf2 = 10515,
|
||
|
CODE_FOR_avx512fp16_floatunsv4siv4hf2 = 10516,
|
||
|
CODE_FOR_avx512fp16_floatv4div4hf2 = 10517,
|
||
|
CODE_FOR_avx512fp16_floatunsv4div4hf2 = 10518,
|
||
|
CODE_FOR_avx512fp16_vcvtdq2ph_v4si_mask = 10519,
|
||
|
CODE_FOR_avx512fp16_vcvtudq2ph_v4si_mask = 10520,
|
||
|
CODE_FOR_avx512fp16_vcvtqq2ph_v4di_mask = 10521,
|
||
|
CODE_FOR_avx512fp16_vcvtuqq2ph_v4di_mask = 10522,
|
||
|
CODE_FOR_floatv2div2hf2 = 10523,
|
||
|
CODE_FOR_floatunsv2div2hf2 = 10524,
|
||
|
CODE_FOR_avx512fp16_floatv2div2hf2 = 10525,
|
||
|
CODE_FOR_avx512fp16_floatunsv2div2hf2 = 10526,
|
||
|
CODE_FOR_avx512fp16_vcvtqq2ph_v2di_mask = 10527,
|
||
|
CODE_FOR_avx512fp16_vcvtuqq2ph_v2di_mask = 10528,
|
||
|
CODE_FOR_fix_truncv8hfv8hi2 = 10529,
|
||
|
CODE_FOR_fixuns_truncv8hfv8hi2 = 10530,
|
||
|
CODE_FOR_fix_truncv16hfv16hi2 = 10531,
|
||
|
CODE_FOR_fixuns_truncv16hfv16hi2 = 10532,
|
||
|
CODE_FOR_fix_truncv32hfv32hi2 = 10533,
|
||
|
CODE_FOR_fixuns_truncv32hfv32hi2 = 10534,
|
||
|
CODE_FOR_fix_truncv8hfv8si2 = 10535,
|
||
|
CODE_FOR_fixuns_truncv8hfv8si2 = 10536,
|
||
|
CODE_FOR_fix_truncv16hfv16si2 = 10537,
|
||
|
CODE_FOR_fixuns_truncv16hfv16si2 = 10538,
|
||
|
CODE_FOR_fix_truncv8hfv8di2 = 10539,
|
||
|
CODE_FOR_fixuns_truncv8hfv8di2 = 10540,
|
||
|
CODE_FOR_fix_truncv4hfv4si2 = 10541,
|
||
|
CODE_FOR_fixuns_truncv4hfv4si2 = 10542,
|
||
|
CODE_FOR_fix_truncv4hfv4di2 = 10543,
|
||
|
CODE_FOR_fixuns_truncv4hfv4di2 = 10544,
|
||
|
CODE_FOR_fix_truncv2hfv2di2 = 10545,
|
||
|
CODE_FOR_fixuns_truncv2hfv2di2 = 10546,
|
||
|
CODE_FOR_extendv8hfv8df2 = 10547,
|
||
|
CODE_FOR_extendv16hfv16sf2 = 10548,
|
||
|
CODE_FOR_extendv8hfv8sf2 = 10549,
|
||
|
CODE_FOR_extendv4hfv4df2 = 10550,
|
||
|
CODE_FOR_extendv4hfv4sf2 = 10551,
|
||
|
CODE_FOR_extendv2hfv2df2 = 10552,
|
||
|
CODE_FOR_truncv8dfv8hf2 = 10553,
|
||
|
CODE_FOR_truncv16sfv16hf2 = 10554,
|
||
|
CODE_FOR_truncv8sfv8hf2 = 10555,
|
||
|
CODE_FOR_truncv4dfv4hf2 = 10556,
|
||
|
CODE_FOR_truncv4sfv4hf2 = 10557,
|
||
|
CODE_FOR_avx512fp16_truncv4dfv4hf2 = 10558,
|
||
|
CODE_FOR_avx512fp16_truncv4sfv4hf2 = 10559,
|
||
|
CODE_FOR_avx512fp16_vcvtpd2ph_v4df_mask = 10560,
|
||
|
CODE_FOR_avx512fp16_vcvtps2ph_v4sf_mask = 10561,
|
||
|
CODE_FOR_truncv2dfv2hf2 = 10562,
|
||
|
CODE_FOR_avx512fp16_truncv2dfv2hf2 = 10563,
|
||
|
CODE_FOR_avx512fp16_vcvtpd2ph_v2df_mask = 10564,
|
||
|
CODE_FOR_floatunsv16siv16sf2 = 10565,
|
||
|
CODE_FOR_floatunsv8siv8sf2 = 10566,
|
||
|
CODE_FOR_floatunsv4siv4sf2 = 10567,
|
||
|
CODE_FOR_fixuns_truncv16sfv16si2 = 10568,
|
||
|
CODE_FOR_fixuns_truncv8sfv8si2 = 10569,
|
||
|
CODE_FOR_fixuns_truncv4sfv4si2 = 10570,
|
||
|
CODE_FOR_floatv2siv2df2 = 10571,
|
||
|
CODE_FOR_fix_truncv2dfv2si2 = 10572,
|
||
|
CODE_FOR_avx512dq_floatv2div2sf2 = 10573,
|
||
|
CODE_FOR_avx512dq_floatunsv2div2sf2 = 10574,
|
||
|
CODE_FOR_floatv2div2sf2 = 10575,
|
||
|
CODE_FOR_floatunsv2div2sf2 = 10576,
|
||
|
CODE_FOR_vec_packs_float_v8di = 10577,
|
||
|
CODE_FOR_vec_packu_float_v8di = 10578,
|
||
|
CODE_FOR_vec_packs_float_v4di = 10579,
|
||
|
CODE_FOR_vec_packu_float_v4di = 10580,
|
||
|
CODE_FOR_vec_packs_float_v2di = 10581,
|
||
|
CODE_FOR_vec_packu_float_v2di = 10582,
|
||
|
CODE_FOR_floatv2div2sf2_mask = 10583,
|
||
|
CODE_FOR_floatunsv2div2sf2_mask = 10584,
|
||
|
CODE_FOR_avx_cvtpd2dq256_2 = 10585,
|
||
|
CODE_FOR_fix_truncv2sfv2di2 = 10586,
|
||
|
CODE_FOR_fixuns_truncv2sfv2di2 = 10587,
|
||
|
CODE_FOR_vec_unpack_sfix_trunc_lo_v16sf = 10588,
|
||
|
CODE_FOR_vec_unpack_ufix_trunc_lo_v16sf = 10589,
|
||
|
CODE_FOR_vec_unpack_sfix_trunc_lo_v8sf = 10590,
|
||
|
CODE_FOR_vec_unpack_ufix_trunc_lo_v8sf = 10591,
|
||
|
CODE_FOR_vec_unpack_sfix_trunc_lo_v4sf = 10592,
|
||
|
CODE_FOR_vec_unpack_ufix_trunc_lo_v4sf = 10593,
|
||
|
CODE_FOR_vec_unpack_sfix_trunc_hi_v16sf = 10594,
|
||
|
CODE_FOR_vec_unpack_ufix_trunc_hi_v16sf = 10595,
|
||
|
CODE_FOR_vec_unpack_sfix_trunc_hi_v8sf = 10596,
|
||
|
CODE_FOR_vec_unpack_ufix_trunc_hi_v8sf = 10597,
|
||
|
CODE_FOR_vec_unpack_sfix_trunc_hi_v4sf = 10598,
|
||
|
CODE_FOR_vec_unpack_ufix_trunc_hi_v4sf = 10599,
|
||
|
CODE_FOR_avx_cvttpd2dq256_2 = 10600,
|
||
|
CODE_FOR_sse2_cvtpd2ps = 10601,
|
||
|
CODE_FOR_sse2_cvtpd2ps_mask = 10602,
|
||
|
CODE_FOR_truncv8dfv8sf2 = 10603,
|
||
|
CODE_FOR_truncv4dfv4sf2 = 10604,
|
||
|
CODE_FOR_extendv8sfv8df2 = 10605,
|
||
|
CODE_FOR_extendv4sfv4df2 = 10606,
|
||
|
CODE_FOR_avx512bw_cvtmask2bv64qi = 10607,
|
||
|
CODE_FOR_avx512vl_cvtmask2bv16qi = 10608,
|
||
|
CODE_FOR_avx512vl_cvtmask2bv32qi = 10609,
|
||
|
CODE_FOR_avx512bw_cvtmask2wv32hi = 10610,
|
||
|
CODE_FOR_avx512vl_cvtmask2wv16hi = 10611,
|
||
|
CODE_FOR_avx512vl_cvtmask2wv8hi = 10612,
|
||
|
CODE_FOR_avx512f_cvtmask2dv16si = 10613,
|
||
|
CODE_FOR_avx512vl_cvtmask2dv8si = 10614,
|
||
|
CODE_FOR_avx512vl_cvtmask2dv4si = 10615,
|
||
|
CODE_FOR_avx512f_cvtmask2qv8di = 10616,
|
||
|
CODE_FOR_avx512vl_cvtmask2qv4di = 10617,
|
||
|
CODE_FOR_avx512vl_cvtmask2qv2di = 10618,
|
||
|
CODE_FOR_vec_unpacks_hi_v4sf = 10619,
|
||
|
CODE_FOR_vec_unpacks_hi_v8sf = 10620,
|
||
|
CODE_FOR_vec_unpacks_hi_v16sf = 10621,
|
||
|
CODE_FOR_vec_unpacks_lo_v4sf = 10622,
|
||
|
CODE_FOR_vec_unpacks_lo_v8sf = 10623,
|
||
|
CODE_FOR_vec_unpacks_float_hi_v32hi = 10624,
|
||
|
CODE_FOR_vec_unpacks_float_hi_v16hi = 10625,
|
||
|
CODE_FOR_vec_unpacks_float_hi_v8hi = 10626,
|
||
|
CODE_FOR_vec_unpacks_float_lo_v32hi = 10627,
|
||
|
CODE_FOR_vec_unpacks_float_lo_v16hi = 10628,
|
||
|
CODE_FOR_vec_unpacks_float_lo_v8hi = 10629,
|
||
|
CODE_FOR_vec_unpacku_float_hi_v32hi = 10630,
|
||
|
CODE_FOR_vec_unpacku_float_hi_v16hi = 10631,
|
||
|
CODE_FOR_vec_unpacku_float_hi_v8hi = 10632,
|
||
|
CODE_FOR_vec_unpacku_float_lo_v32hi = 10633,
|
||
|
CODE_FOR_vec_unpacku_float_lo_v16hi = 10634,
|
||
|
CODE_FOR_vec_unpacku_float_lo_v8hi = 10635,
|
||
|
CODE_FOR_vec_unpacks_float_hi_v4si = 10636,
|
||
|
CODE_FOR_vec_unpacks_float_lo_v4si = 10637,
|
||
|
CODE_FOR_vec_unpacks_float_hi_v8si = 10638,
|
||
|
CODE_FOR_vec_unpacks_float_lo_v8si = 10639,
|
||
|
CODE_FOR_vec_unpacks_float_hi_v16si = 10640,
|
||
|
CODE_FOR_vec_unpacks_float_lo_v16si = 10641,
|
||
|
CODE_FOR_vec_unpacku_float_hi_v4si = 10642,
|
||
|
CODE_FOR_vec_unpacku_float_lo_v4si = 10643,
|
||
|
CODE_FOR_vec_unpacku_float_hi_v8si = 10644,
|
||
|
CODE_FOR_vec_unpacku_float_hi_v16si = 10645,
|
||
|
CODE_FOR_vec_unpacku_float_lo_v8si = 10646,
|
||
|
CODE_FOR_vec_unpacku_float_lo_v16si = 10647,
|
||
|
CODE_FOR_vec_pack_trunc_v8df = 10648,
|
||
|
CODE_FOR_vec_pack_trunc_v4df = 10649,
|
||
|
CODE_FOR_vec_pack_trunc_v2df = 10650,
|
||
|
CODE_FOR_vec_pack_sfix_trunc_v8df = 10651,
|
||
|
CODE_FOR_vec_pack_sfix_trunc_v4df = 10652,
|
||
|
CODE_FOR_vec_pack_sfix_trunc_v2df = 10653,
|
||
|
CODE_FOR_vec_pack_ufix_trunc_v8df = 10654,
|
||
|
CODE_FOR_vec_pack_ufix_trunc_v4df = 10655,
|
||
|
CODE_FOR_vec_pack_ufix_trunc_v2df = 10656,
|
||
|
CODE_FOR_avx512f_vec_pack_sfix_v8df = 10657,
|
||
|
CODE_FOR_vec_pack_sfix_v4df = 10658,
|
||
|
CODE_FOR_vec_pack_sfix_v2df = 10659,
|
||
|
CODE_FOR_sse_movhlps_exp = 10660,
|
||
|
CODE_FOR_sse_movlhps_exp = 10661,
|
||
|
CODE_FOR_vec_interleave_highv8sf = 10662,
|
||
|
CODE_FOR_vec_interleave_lowv8sf = 10663,
|
||
|
CODE_FOR_avx_shufps256 = 10664,
|
||
|
CODE_FOR_avx_shufps256_mask = 10665,
|
||
|
CODE_FOR_sse_shufps = 10666,
|
||
|
CODE_FOR_sse_shufps_mask = 10667,
|
||
|
CODE_FOR_sse_loadhps_exp = 10668,
|
||
|
CODE_FOR_sse_loadlps_exp = 10669,
|
||
|
CODE_FOR_vec_setv16qi = 10670,
|
||
|
CODE_FOR_vec_setv8hi = 10671,
|
||
|
CODE_FOR_vec_setv4si = 10672,
|
||
|
CODE_FOR_vec_setv2di = 10673,
|
||
|
CODE_FOR_vec_setv4sf = 10674,
|
||
|
CODE_FOR_vec_setv2df = 10675,
|
||
|
CODE_FOR_vec_setv8hf = 10676,
|
||
|
CODE_FOR_vec_setv32qi = 10677,
|
||
|
CODE_FOR_vec_setv16hi = 10678,
|
||
|
CODE_FOR_vec_setv16hf = 10679,
|
||
|
CODE_FOR_vec_setv8si = 10680,
|
||
|
CODE_FOR_vec_setv4di = 10681,
|
||
|
CODE_FOR_vec_setv8sf = 10682,
|
||
|
CODE_FOR_vec_setv4df = 10683,
|
||
|
CODE_FOR_vec_setv64qi = 10684,
|
||
|
CODE_FOR_vec_setv32hi = 10685,
|
||
|
CODE_FOR_vec_setv32hf = 10686,
|
||
|
CODE_FOR_vec_setv16si = 10687,
|
||
|
CODE_FOR_vec_setv8di = 10688,
|
||
|
CODE_FOR_vec_setv16sf = 10689,
|
||
|
CODE_FOR_vec_setv8df = 10690,
|
||
|
CODE_FOR_avx512dq_vextractf64x2_mask = 10691,
|
||
|
CODE_FOR_avx512dq_vextracti64x2_mask = 10692,
|
||
|
CODE_FOR_avx512f_vextractf32x4_mask = 10693,
|
||
|
CODE_FOR_avx512f_vextracti32x4_mask = 10694,
|
||
|
CODE_FOR_avx512dq_vextractf32x8_mask = 10695,
|
||
|
CODE_FOR_avx512dq_vextracti32x8_mask = 10696,
|
||
|
CODE_FOR_avx512f_vextractf64x4_mask = 10697,
|
||
|
CODE_FOR_avx512f_vextracti64x4_mask = 10698,
|
||
|
CODE_FOR_avx512vl_vextractf128v8si = 10699,
|
||
|
CODE_FOR_avx512vl_vextractf128v8sf = 10700,
|
||
|
CODE_FOR_avx512vl_vextractf128v4di = 10701,
|
||
|
CODE_FOR_avx512vl_vextractf128v4df = 10702,
|
||
|
CODE_FOR_avx_vextractf128v32qi = 10703,
|
||
|
CODE_FOR_avx_vextractf128v16hi = 10704,
|
||
|
CODE_FOR_avx_vextractf128v8si = 10705,
|
||
|
CODE_FOR_avx_vextractf128v4di = 10706,
|
||
|
CODE_FOR_avx_vextractf128v8sf = 10707,
|
||
|
CODE_FOR_avx_vextractf128v4df = 10708,
|
||
|
CODE_FOR_avx_vextractf128v16hf = 10709,
|
||
|
CODE_FOR_vec_extractv64qiqi = 10710,
|
||
|
CODE_FOR_vec_extractv32qiqi = 10711,
|
||
|
CODE_FOR_vec_extractv16qiqi = 10712,
|
||
|
CODE_FOR_vec_extractv32hihi = 10713,
|
||
|
CODE_FOR_vec_extractv16hihi = 10714,
|
||
|
CODE_FOR_vec_extractv8hihi = 10715,
|
||
|
CODE_FOR_vec_extractv16sisi = 10716,
|
||
|
CODE_FOR_vec_extractv8sisi = 10717,
|
||
|
CODE_FOR_vec_extractv4sisi = 10718,
|
||
|
CODE_FOR_vec_extractv8didi = 10719,
|
||
|
CODE_FOR_vec_extractv4didi = 10720,
|
||
|
CODE_FOR_vec_extractv2didi = 10721,
|
||
|
CODE_FOR_vec_extractv32hfhf = 10722,
|
||
|
CODE_FOR_vec_extractv16hfhf = 10723,
|
||
|
CODE_FOR_vec_extractv8hfhf = 10724,
|
||
|
CODE_FOR_vec_extractv16sfsf = 10725,
|
||
|
CODE_FOR_vec_extractv8sfsf = 10726,
|
||
|
CODE_FOR_vec_extractv4sfsf = 10727,
|
||
|
CODE_FOR_vec_extractv8dfdf = 10728,
|
||
|
CODE_FOR_vec_extractv4dfdf = 10729,
|
||
|
CODE_FOR_vec_extractv2dfdf = 10730,
|
||
|
CODE_FOR_vec_extractv4titi = 10731,
|
||
|
CODE_FOR_vec_extractv2titi = 10732,
|
||
|
CODE_FOR_vec_extractv32qiv16qi = 10733,
|
||
|
CODE_FOR_vec_extractv16hiv8hi = 10734,
|
||
|
CODE_FOR_vec_extractv16hfv8hf = 10735,
|
||
|
CODE_FOR_vec_extractv8siv4si = 10736,
|
||
|
CODE_FOR_vec_extractv4div2di = 10737,
|
||
|
CODE_FOR_vec_extractv8sfv4sf = 10738,
|
||
|
CODE_FOR_vec_extractv4dfv2df = 10739,
|
||
|
CODE_FOR_vec_extractv64qiv32qi = 10740,
|
||
|
CODE_FOR_vec_extractv32hiv16hi = 10741,
|
||
|
CODE_FOR_vec_extractv32hfv16hf = 10742,
|
||
|
CODE_FOR_vec_extractv16siv8si = 10743,
|
||
|
CODE_FOR_vec_extractv8div4di = 10744,
|
||
|
CODE_FOR_vec_extractv16sfv8sf = 10745,
|
||
|
CODE_FOR_vec_extractv8dfv4df = 10746,
|
||
|
CODE_FOR_vec_interleave_highv4df = 10747,
|
||
|
CODE_FOR_vec_interleave_highv2df = 10748,
|
||
|
CODE_FOR_avx512f_movddup512 = 10749,
|
||
|
CODE_FOR_avx512f_movddup512_mask = 10750,
|
||
|
CODE_FOR_avx512f_unpcklpd512 = 10751,
|
||
|
CODE_FOR_avx512f_unpcklpd512_mask = 10752,
|
||
|
CODE_FOR_avx_movddup256 = 10753,
|
||
|
CODE_FOR_avx_movddup256_mask = 10754,
|
||
|
CODE_FOR_avx_unpcklpd256 = 10755,
|
||
|
CODE_FOR_avx_unpcklpd256_mask = 10756,
|
||
|
CODE_FOR_vec_interleave_lowv4df = 10757,
|
||
|
CODE_FOR_vec_interleave_lowv2df = 10758,
|
||
|
CODE_FOR_avx512f_vternlogv16si_maskz = 10759,
|
||
|
CODE_FOR_avx512vl_vternlogv8si_maskz = 10760,
|
||
|
CODE_FOR_avx512vl_vternlogv4si_maskz = 10761,
|
||
|
CODE_FOR_avx512f_vternlogv8di_maskz = 10762,
|
||
|
CODE_FOR_avx512vl_vternlogv4di_maskz = 10763,
|
||
|
CODE_FOR_avx512vl_vternlogv2di_maskz = 10764,
|
||
|
CODE_FOR_avx512f_shufps512_mask = 10765,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_maskz = 10766,
|
||
|
CODE_FOR_avx512f_fixupimmv16sf_maskz_round = 10767,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_maskz = 10768,
|
||
|
CODE_FOR_avx512vl_fixupimmv8sf_maskz_round = 10769,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_maskz = 10770,
|
||
|
CODE_FOR_avx512vl_fixupimmv4sf_maskz_round = 10771,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_maskz = 10772,
|
||
|
CODE_FOR_avx512f_fixupimmv8df_maskz_round = 10773,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_maskz = 10774,
|
||
|
CODE_FOR_avx512vl_fixupimmv4df_maskz_round = 10775,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_maskz = 10776,
|
||
|
CODE_FOR_avx512vl_fixupimmv2df_maskz_round = 10777,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_maskz = 10778,
|
||
|
CODE_FOR_avx512f_sfixupimmv4sf_maskz_round = 10779,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_maskz = 10780,
|
||
|
CODE_FOR_avx512f_sfixupimmv2df_maskz_round = 10781,
|
||
|
CODE_FOR_avx512f_shufpd512_mask = 10782,
|
||
|
CODE_FOR_avx_shufpd256 = 10783,
|
||
|
CODE_FOR_avx_shufpd256_mask = 10784,
|
||
|
CODE_FOR_sse2_shufpd = 10785,
|
||
|
CODE_FOR_sse2_shufpd_mask = 10786,
|
||
|
CODE_FOR_sse2_loadhpd_exp = 10787,
|
||
|
CODE_FOR_sse2_loadlpd_exp = 10788,
|
||
|
CODE_FOR_truncv16siv16qi2 = 10789,
|
||
|
CODE_FOR_truncv16siv16hi2 = 10790,
|
||
|
CODE_FOR_truncv8div8si2 = 10791,
|
||
|
CODE_FOR_truncv8div8hi2 = 10792,
|
||
|
CODE_FOR_avx512f_ss_truncatev16siv16qi2_mask_store = 10793,
|
||
|
CODE_FOR_avx512f_truncatev16siv16qi2_mask_store = 10794,
|
||
|
CODE_FOR_avx512f_us_truncatev16siv16qi2_mask_store = 10795,
|
||
|
CODE_FOR_avx512f_ss_truncatev16siv16hi2_mask_store = 10796,
|
||
|
CODE_FOR_avx512f_truncatev16siv16hi2_mask_store = 10797,
|
||
|
CODE_FOR_avx512f_us_truncatev16siv16hi2_mask_store = 10798,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div8si2_mask_store = 10799,
|
||
|
CODE_FOR_avx512f_truncatev8div8si2_mask_store = 10800,
|
||
|
CODE_FOR_avx512f_us_truncatev8div8si2_mask_store = 10801,
|
||
|
CODE_FOR_avx512f_ss_truncatev8div8hi2_mask_store = 10802,
|
||
|
CODE_FOR_avx512f_truncatev8div8hi2_mask_store = 10803,
|
||
|
CODE_FOR_avx512f_us_truncatev8div8hi2_mask_store = 10804,
|
||
|
CODE_FOR_truncv32hiv32qi2 = 10805,
|
||
|
CODE_FOR_avx512bw_ss_truncatev32hiv32qi2_mask_store = 10806,
|
||
|
CODE_FOR_avx512bw_truncatev32hiv32qi2_mask_store = 10807,
|
||
|
CODE_FOR_avx512bw_us_truncatev32hiv32qi2_mask_store = 10808,
|
||
|
CODE_FOR_truncv4div4si2 = 10809,
|
||
|
CODE_FOR_truncv8siv8hi2 = 10810,
|
||
|
CODE_FOR_truncv16hiv16qi2 = 10811,
|
||
|
CODE_FOR_avx512vl_ss_truncatev4div4si2_mask_store = 10812,
|
||
|
CODE_FOR_avx512vl_truncatev4div4si2_mask_store = 10813,
|
||
|
CODE_FOR_avx512vl_us_truncatev4div4si2_mask_store = 10814,
|
||
|
CODE_FOR_avx512vl_ss_truncatev8siv8hi2_mask_store = 10815,
|
||
|
CODE_FOR_avx512vl_truncatev8siv8hi2_mask_store = 10816,
|
||
|
CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask_store = 10817,
|
||
|
CODE_FOR_avx512vl_ss_truncatev16hiv16qi2_mask_store = 10818,
|
||
|
CODE_FOR_avx512vl_truncatev16hiv16qi2_mask_store = 10819,
|
||
|
CODE_FOR_avx512vl_us_truncatev16hiv16qi2_mask_store = 10820,
|
||
|
CODE_FOR_truncv4div4qi2 = 10821,
|
||
|
CODE_FOR_truncv2div2qi2 = 10822,
|
||
|
CODE_FOR_truncv8siv8qi2 = 10823,
|
||
|
CODE_FOR_truncv4siv4qi2 = 10824,
|
||
|
CODE_FOR_truncv8hiv8qi2 = 10825,
|
||
|
CODE_FOR_truncv4div4hi2 = 10826,
|
||
|
CODE_FOR_truncv2div2hi2 = 10827,
|
||
|
CODE_FOR_truncv4siv4hi2 = 10828,
|
||
|
CODE_FOR_truncv2div2si2 = 10829,
|
||
|
CODE_FOR_truncv8div8qi2 = 10830,
|
||
|
CODE_FOR_negv64qi2 = 10831,
|
||
|
CODE_FOR_negv32qi2 = 10832,
|
||
|
CODE_FOR_negv16qi2 = 10833,
|
||
|
CODE_FOR_negv32hi2 = 10834,
|
||
|
CODE_FOR_negv16hi2 = 10835,
|
||
|
CODE_FOR_negv8hi2 = 10836,
|
||
|
CODE_FOR_negv16si2 = 10837,
|
||
|
CODE_FOR_negv8si2 = 10838,
|
||
|
CODE_FOR_negv4si2 = 10839,
|
||
|
CODE_FOR_negv8di2 = 10840,
|
||
|
CODE_FOR_negv4di2 = 10841,
|
||
|
CODE_FOR_negv2di2 = 10842,
|
||
|
CODE_FOR_addv64qi3 = 10843,
|
||
|
CODE_FOR_subv64qi3 = 10844,
|
||
|
CODE_FOR_addv32qi3 = 10845,
|
||
|
CODE_FOR_subv32qi3 = 10846,
|
||
|
CODE_FOR_addv16qi3 = 10847,
|
||
|
CODE_FOR_subv16qi3 = 10848,
|
||
|
CODE_FOR_addv32hi3 = 10849,
|
||
|
CODE_FOR_subv32hi3 = 10850,
|
||
|
CODE_FOR_addv16hi3 = 10851,
|
||
|
CODE_FOR_subv16hi3 = 10852,
|
||
|
CODE_FOR_addv8hi3 = 10853,
|
||
|
CODE_FOR_subv8hi3 = 10854,
|
||
|
CODE_FOR_addv16si3 = 10855,
|
||
|
CODE_FOR_subv16si3 = 10856,
|
||
|
CODE_FOR_addv8si3 = 10857,
|
||
|
CODE_FOR_subv8si3 = 10858,
|
||
|
CODE_FOR_addv4si3 = 10859,
|
||
|
CODE_FOR_subv4si3 = 10860,
|
||
|
CODE_FOR_addv8di3 = 10861,
|
||
|
CODE_FOR_subv8di3 = 10862,
|
||
|
CODE_FOR_addv4di3 = 10863,
|
||
|
CODE_FOR_subv4di3 = 10864,
|
||
|
CODE_FOR_addv2di3 = 10865,
|
||
|
CODE_FOR_subv2di3 = 10866,
|
||
|
CODE_FOR_cond_addv64qi = 10867,
|
||
|
CODE_FOR_cond_subv64qi = 10868,
|
||
|
CODE_FOR_cond_addv32qi = 10869,
|
||
|
CODE_FOR_cond_subv32qi = 10870,
|
||
|
CODE_FOR_cond_addv16qi = 10871,
|
||
|
CODE_FOR_cond_subv16qi = 10872,
|
||
|
CODE_FOR_cond_addv32hi = 10873,
|
||
|
CODE_FOR_cond_subv32hi = 10874,
|
||
|
CODE_FOR_cond_addv16hi = 10875,
|
||
|
CODE_FOR_cond_subv16hi = 10876,
|
||
|
CODE_FOR_cond_addv8hi = 10877,
|
||
|
CODE_FOR_cond_subv8hi = 10878,
|
||
|
CODE_FOR_cond_addv16si = 10879,
|
||
|
CODE_FOR_cond_subv16si = 10880,
|
||
|
CODE_FOR_cond_addv8si = 10881,
|
||
|
CODE_FOR_cond_subv8si = 10882,
|
||
|
CODE_FOR_cond_addv4si = 10883,
|
||
|
CODE_FOR_cond_subv4si = 10884,
|
||
|
CODE_FOR_cond_addv8di = 10885,
|
||
|
CODE_FOR_cond_subv8di = 10886,
|
||
|
CODE_FOR_cond_addv4di = 10887,
|
||
|
CODE_FOR_cond_subv4di = 10888,
|
||
|
CODE_FOR_cond_addv2di = 10889,
|
||
|
CODE_FOR_cond_subv2di = 10890,
|
||
|
CODE_FOR_addv16si3_mask = 10891,
|
||
|
CODE_FOR_subv16si3_mask = 10892,
|
||
|
CODE_FOR_addv8si3_mask = 10893,
|
||
|
CODE_FOR_subv8si3_mask = 10894,
|
||
|
CODE_FOR_addv4si3_mask = 10895,
|
||
|
CODE_FOR_subv4si3_mask = 10896,
|
||
|
CODE_FOR_addv8di3_mask = 10897,
|
||
|
CODE_FOR_subv8di3_mask = 10898,
|
||
|
CODE_FOR_addv4di3_mask = 10899,
|
||
|
CODE_FOR_subv4di3_mask = 10900,
|
||
|
CODE_FOR_addv2di3_mask = 10901,
|
||
|
CODE_FOR_subv2di3_mask = 10902,
|
||
|
CODE_FOR_addv64qi3_mask = 10903,
|
||
|
CODE_FOR_subv64qi3_mask = 10904,
|
||
|
CODE_FOR_addv16qi3_mask = 10905,
|
||
|
CODE_FOR_subv16qi3_mask = 10906,
|
||
|
CODE_FOR_addv32qi3_mask = 10907,
|
||
|
CODE_FOR_subv32qi3_mask = 10908,
|
||
|
CODE_FOR_addv32hi3_mask = 10909,
|
||
|
CODE_FOR_subv32hi3_mask = 10910,
|
||
|
CODE_FOR_addv16hi3_mask = 10911,
|
||
|
CODE_FOR_subv16hi3_mask = 10912,
|
||
|
CODE_FOR_addv8hi3_mask = 10913,
|
||
|
CODE_FOR_subv8hi3_mask = 10914,
|
||
|
CODE_FOR_avx512bw_ssaddv64qi3 = 10915,
|
||
|
CODE_FOR_avx512bw_ssaddv64qi3_mask = 10916,
|
||
|
CODE_FOR_avx512bw_usaddv64qi3 = 10917,
|
||
|
CODE_FOR_avx512bw_usaddv64qi3_mask = 10918,
|
||
|
CODE_FOR_avx512bw_sssubv64qi3 = 10919,
|
||
|
CODE_FOR_avx512bw_sssubv64qi3_mask = 10920,
|
||
|
CODE_FOR_avx512bw_ussubv64qi3 = 10921,
|
||
|
CODE_FOR_avx512bw_ussubv64qi3_mask = 10922,
|
||
|
CODE_FOR_avx2_ssaddv32qi3 = 10923,
|
||
|
CODE_FOR_avx2_ssaddv32qi3_mask = 10924,
|
||
|
CODE_FOR_avx2_usaddv32qi3 = 10925,
|
||
|
CODE_FOR_avx2_usaddv32qi3_mask = 10926,
|
||
|
CODE_FOR_avx2_sssubv32qi3 = 10927,
|
||
|
CODE_FOR_avx2_sssubv32qi3_mask = 10928,
|
||
|
CODE_FOR_avx2_ussubv32qi3 = 10929,
|
||
|
CODE_FOR_avx2_ussubv32qi3_mask = 10930,
|
||
|
CODE_FOR_sse2_ssaddv16qi3 = 10931,
|
||
|
CODE_FOR_sse2_ssaddv16qi3_mask = 10932,
|
||
|
CODE_FOR_sse2_usaddv16qi3 = 10933,
|
||
|
CODE_FOR_sse2_usaddv16qi3_mask = 10934,
|
||
|
CODE_FOR_sse2_sssubv16qi3 = 10935,
|
||
|
CODE_FOR_sse2_sssubv16qi3_mask = 10936,
|
||
|
CODE_FOR_sse2_ussubv16qi3 = 10937,
|
||
|
CODE_FOR_sse2_ussubv16qi3_mask = 10938,
|
||
|
CODE_FOR_avx512bw_ssaddv32hi3 = 10939,
|
||
|
CODE_FOR_avx512bw_ssaddv32hi3_mask = 10940,
|
||
|
CODE_FOR_avx512bw_usaddv32hi3 = 10941,
|
||
|
CODE_FOR_avx512bw_usaddv32hi3_mask = 10942,
|
||
|
CODE_FOR_avx512bw_sssubv32hi3 = 10943,
|
||
|
CODE_FOR_avx512bw_sssubv32hi3_mask = 10944,
|
||
|
CODE_FOR_avx512bw_ussubv32hi3 = 10945,
|
||
|
CODE_FOR_avx512bw_ussubv32hi3_mask = 10946,
|
||
|
CODE_FOR_avx2_ssaddv16hi3 = 10947,
|
||
|
CODE_FOR_avx2_ssaddv16hi3_mask = 10948,
|
||
|
CODE_FOR_avx2_usaddv16hi3 = 10949,
|
||
|
CODE_FOR_avx2_usaddv16hi3_mask = 10950,
|
||
|
CODE_FOR_avx2_sssubv16hi3 = 10951,
|
||
|
CODE_FOR_avx2_sssubv16hi3_mask = 10952,
|
||
|
CODE_FOR_avx2_ussubv16hi3 = 10953,
|
||
|
CODE_FOR_avx2_ussubv16hi3_mask = 10954,
|
||
|
CODE_FOR_sse2_ssaddv8hi3 = 10955,
|
||
|
CODE_FOR_sse2_ssaddv8hi3_mask = 10956,
|
||
|
CODE_FOR_sse2_usaddv8hi3 = 10957,
|
||
|
CODE_FOR_sse2_usaddv8hi3_mask = 10958,
|
||
|
CODE_FOR_sse2_sssubv8hi3 = 10959,
|
||
|
CODE_FOR_sse2_sssubv8hi3_mask = 10960,
|
||
|
CODE_FOR_sse2_ussubv8hi3 = 10961,
|
||
|
CODE_FOR_sse2_ussubv8hi3_mask = 10962,
|
||
|
CODE_FOR_mulv8qi3 = 10963,
|
||
|
CODE_FOR_mulv64qi3 = 10964,
|
||
|
CODE_FOR_mulv32qi3 = 10965,
|
||
|
CODE_FOR_mulv16qi3 = 10966,
|
||
|
CODE_FOR_cond_mulv8hi = 10967,
|
||
|
CODE_FOR_cond_mulv16hi = 10968,
|
||
|
CODE_FOR_cond_mulv32hi = 10969,
|
||
|
CODE_FOR_mulv32hi3 = 10970,
|
||
|
CODE_FOR_mulv32hi3_mask = 10971,
|
||
|
CODE_FOR_mulv16hi3 = 10972,
|
||
|
CODE_FOR_mulv16hi3_mask = 10973,
|
||
|
CODE_FOR_mulv8hi3 = 10974,
|
||
|
CODE_FOR_mulv8hi3_mask = 10975,
|
||
|
CODE_FOR_smulv32hi3_highpart = 10976,
|
||
|
CODE_FOR_smulv32hi3_highpart_mask = 10977,
|
||
|
CODE_FOR_umulv32hi3_highpart = 10978,
|
||
|
CODE_FOR_umulv32hi3_highpart_mask = 10979,
|
||
|
CODE_FOR_smulv16hi3_highpart = 10980,
|
||
|
CODE_FOR_smulv16hi3_highpart_mask = 10981,
|
||
|
CODE_FOR_umulv16hi3_highpart = 10982,
|
||
|
CODE_FOR_umulv16hi3_highpart_mask = 10983,
|
||
|
CODE_FOR_smulv8hi3_highpart = 10984,
|
||
|
CODE_FOR_smulv8hi3_highpart_mask = 10985,
|
||
|
CODE_FOR_umulv8hi3_highpart = 10986,
|
||
|
CODE_FOR_umulv8hi3_highpart_mask = 10987,
|
||
|
CODE_FOR_vec_widen_umult_even_v16si = 10988,
|
||
|
CODE_FOR_vec_widen_umult_even_v16si_mask = 10989,
|
||
|
CODE_FOR_vec_widen_umult_even_v8si = 10990,
|
||
|
CODE_FOR_vec_widen_umult_even_v8si_mask = 10991,
|
||
|
CODE_FOR_vec_widen_umult_even_v4si = 10992,
|
||
|
CODE_FOR_vec_widen_umult_even_v4si_mask = 10993,
|
||
|
CODE_FOR_vec_widen_smult_even_v16si = 10994,
|
||
|
CODE_FOR_vec_widen_smult_even_v16si_mask = 10995,
|
||
|
CODE_FOR_vec_widen_smult_even_v8si = 10996,
|
||
|
CODE_FOR_vec_widen_smult_even_v8si_mask = 10997,
|
||
|
CODE_FOR_sse4_1_mulv2siv2di3 = 10998,
|
||
|
CODE_FOR_sse4_1_mulv2siv2di3_mask = 10999,
|
||
|
CODE_FOR_avx2_pmaddwd = 11000,
|
||
|
CODE_FOR_sse2_pmaddwd = 11001,
|
||
|
CODE_FOR_cond_mulv8di = 11002,
|
||
|
CODE_FOR_cond_mulv4di = 11003,
|
||
|
CODE_FOR_cond_mulv2di = 11004,
|
||
|
CODE_FOR_avx512dq_mulv8di3 = 11005,
|
||
|
CODE_FOR_avx512dq_mulv8di3_mask = 11006,
|
||
|
CODE_FOR_avx512dq_mulv4di3 = 11007,
|
||
|
CODE_FOR_avx512dq_mulv4di3_mask = 11008,
|
||
|
CODE_FOR_avx512dq_mulv2di3 = 11009,
|
||
|
CODE_FOR_avx512dq_mulv2di3_mask = 11010,
|
||
|
CODE_FOR_cond_mulv16si = 11011,
|
||
|
CODE_FOR_cond_mulv8si = 11012,
|
||
|
CODE_FOR_cond_mulv4si = 11013,
|
||
|
CODE_FOR_mulv16si3 = 11014,
|
||
|
CODE_FOR_mulv16si3_mask = 11015,
|
||
|
CODE_FOR_mulv8si3 = 11016,
|
||
|
CODE_FOR_mulv8si3_mask = 11017,
|
||
|
CODE_FOR_mulv4si3 = 11018,
|
||
|
CODE_FOR_mulv4si3_mask = 11019,
|
||
|
CODE_FOR_mulv8di3 = 11020,
|
||
|
CODE_FOR_mulv4di3 = 11021,
|
||
|
CODE_FOR_mulv2di3 = 11022,
|
||
|
CODE_FOR_vec_widen_smult_hi_v32qi = 11023,
|
||
|
CODE_FOR_vec_widen_umult_hi_v32qi = 11024,
|
||
|
CODE_FOR_vec_widen_smult_hi_v16qi = 11025,
|
||
|
CODE_FOR_vec_widen_umult_hi_v16qi = 11026,
|
||
|
CODE_FOR_vec_widen_smult_hi_v16hi = 11027,
|
||
|
CODE_FOR_vec_widen_umult_hi_v16hi = 11028,
|
||
|
CODE_FOR_vec_widen_smult_hi_v8hi = 11029,
|
||
|
CODE_FOR_vec_widen_umult_hi_v8hi = 11030,
|
||
|
CODE_FOR_vec_widen_smult_hi_v8si = 11031,
|
||
|
CODE_FOR_vec_widen_umult_hi_v8si = 11032,
|
||
|
CODE_FOR_vec_widen_smult_hi_v4si = 11033,
|
||
|
CODE_FOR_vec_widen_umult_hi_v4si = 11034,
|
||
|
CODE_FOR_vec_widen_smult_lo_v32qi = 11035,
|
||
|
CODE_FOR_vec_widen_umult_lo_v32qi = 11036,
|
||
|
CODE_FOR_vec_widen_smult_lo_v16qi = 11037,
|
||
|
CODE_FOR_vec_widen_umult_lo_v16qi = 11038,
|
||
|
CODE_FOR_vec_widen_smult_lo_v16hi = 11039,
|
||
|
CODE_FOR_vec_widen_umult_lo_v16hi = 11040,
|
||
|
CODE_FOR_vec_widen_smult_lo_v8hi = 11041,
|
||
|
CODE_FOR_vec_widen_umult_lo_v8hi = 11042,
|
||
|
CODE_FOR_vec_widen_smult_lo_v8si = 11043,
|
||
|
CODE_FOR_vec_widen_umult_lo_v8si = 11044,
|
||
|
CODE_FOR_vec_widen_smult_lo_v4si = 11045,
|
||
|
CODE_FOR_vec_widen_umult_lo_v4si = 11046,
|
||
|
CODE_FOR_vec_widen_smult_even_v4si = 11047,
|
||
|
CODE_FOR_vec_widen_smult_odd_v16si = 11048,
|
||
|
CODE_FOR_vec_widen_umult_odd_v16si = 11049,
|
||
|
CODE_FOR_vec_widen_smult_odd_v8si = 11050,
|
||
|
CODE_FOR_vec_widen_umult_odd_v8si = 11051,
|
||
|
CODE_FOR_vec_widen_smult_odd_v4si = 11052,
|
||
|
CODE_FOR_vec_widen_umult_odd_v4si = 11053,
|
||
|
CODE_FOR_sdot_prodv32hi = 11054,
|
||
|
CODE_FOR_sdot_prodv16hi = 11055,
|
||
|
CODE_FOR_sdot_prodv8hi = 11056,
|
||
|
CODE_FOR_sdot_prodv4si = 11057,
|
||
|
CODE_FOR_uavgv64qi3_ceil = 11058,
|
||
|
CODE_FOR_uavgv32qi3_ceil = 11059,
|
||
|
CODE_FOR_uavgv16qi3_ceil = 11060,
|
||
|
CODE_FOR_uavgv32hi3_ceil = 11061,
|
||
|
CODE_FOR_uavgv16hi3_ceil = 11062,
|
||
|
CODE_FOR_uavgv8hi3_ceil = 11063,
|
||
|
CODE_FOR_usadv16qi = 11064,
|
||
|
CODE_FOR_usadv32qi = 11065,
|
||
|
CODE_FOR_usadv64qi = 11066,
|
||
|
CODE_FOR_ashrv32hi3 = 11067,
|
||
|
CODE_FOR_ashrv16si3 = 11068,
|
||
|
CODE_FOR_ashrv8di3 = 11069,
|
||
|
CODE_FOR_ashrv4di3 = 11070,
|
||
|
CODE_FOR_vec_shl_v16qi = 11071,
|
||
|
CODE_FOR_vec_shl_v8hi = 11072,
|
||
|
CODE_FOR_vec_shl_v4si = 11073,
|
||
|
CODE_FOR_vec_shl_v2di = 11074,
|
||
|
CODE_FOR_vec_shl_v4sf = 11075,
|
||
|
CODE_FOR_vec_shl_v2df = 11076,
|
||
|
CODE_FOR_vec_shr_v16qi = 11077,
|
||
|
CODE_FOR_vec_shr_v8hi = 11078,
|
||
|
CODE_FOR_vec_shr_v4si = 11079,
|
||
|
CODE_FOR_vec_shr_v2di = 11080,
|
||
|
CODE_FOR_vec_shr_v4sf = 11081,
|
||
|
CODE_FOR_vec_shr_v2df = 11082,
|
||
|
CODE_FOR_ashlv1ti3 = 11083,
|
||
|
CODE_FOR_lshrv1ti3 = 11084,
|
||
|
CODE_FOR_ashrv1ti3 = 11085,
|
||
|
CODE_FOR_rotlv1ti3 = 11086,
|
||
|
CODE_FOR_rotrv1ti3 = 11087,
|
||
|
CODE_FOR_smaxv32qi3 = 11088,
|
||
|
CODE_FOR_sminv32qi3 = 11089,
|
||
|
CODE_FOR_umaxv32qi3 = 11090,
|
||
|
CODE_FOR_uminv32qi3 = 11091,
|
||
|
CODE_FOR_smaxv16hi3 = 11092,
|
||
|
CODE_FOR_sminv16hi3 = 11093,
|
||
|
CODE_FOR_umaxv16hi3 = 11094,
|
||
|
CODE_FOR_uminv16hi3 = 11095,
|
||
|
CODE_FOR_smaxv8si3 = 11096,
|
||
|
CODE_FOR_sminv8si3 = 11097,
|
||
|
CODE_FOR_umaxv8si3 = 11098,
|
||
|
CODE_FOR_uminv8si3 = 11099,
|
||
|
CODE_FOR_smaxv64qi3 = 11100,
|
||
|
CODE_FOR_sminv64qi3 = 11101,
|
||
|
CODE_FOR_umaxv64qi3 = 11102,
|
||
|
CODE_FOR_uminv64qi3 = 11103,
|
||
|
CODE_FOR_smaxv32hi3 = 11104,
|
||
|
CODE_FOR_sminv32hi3 = 11105,
|
||
|
CODE_FOR_umaxv32hi3 = 11106,
|
||
|
CODE_FOR_uminv32hi3 = 11107,
|
||
|
CODE_FOR_smaxv16si3 = 11108,
|
||
|
CODE_FOR_sminv16si3 = 11109,
|
||
|
CODE_FOR_umaxv16si3 = 11110,
|
||
|
CODE_FOR_uminv16si3 = 11111,
|
||
|
CODE_FOR_cond_smaxv64qi = 11112,
|
||
|
CODE_FOR_cond_sminv64qi = 11113,
|
||
|
CODE_FOR_cond_umaxv64qi = 11114,
|
||
|
CODE_FOR_cond_uminv64qi = 11115,
|
||
|
CODE_FOR_cond_smaxv32qi = 11116,
|
||
|
CODE_FOR_cond_sminv32qi = 11117,
|
||
|
CODE_FOR_cond_umaxv32qi = 11118,
|
||
|
CODE_FOR_cond_uminv32qi = 11119,
|
||
|
CODE_FOR_cond_smaxv16qi = 11120,
|
||
|
CODE_FOR_cond_sminv16qi = 11121,
|
||
|
CODE_FOR_cond_umaxv16qi = 11122,
|
||
|
CODE_FOR_cond_uminv16qi = 11123,
|
||
|
CODE_FOR_cond_smaxv32hi = 11124,
|
||
|
CODE_FOR_cond_sminv32hi = 11125,
|
||
|
CODE_FOR_cond_umaxv32hi = 11126,
|
||
|
CODE_FOR_cond_uminv32hi = 11127,
|
||
|
CODE_FOR_cond_smaxv16hi = 11128,
|
||
|
CODE_FOR_cond_sminv16hi = 11129,
|
||
|
CODE_FOR_cond_umaxv16hi = 11130,
|
||
|
CODE_FOR_cond_uminv16hi = 11131,
|
||
|
CODE_FOR_cond_smaxv8hi = 11132,
|
||
|
CODE_FOR_cond_sminv8hi = 11133,
|
||
|
CODE_FOR_cond_umaxv8hi = 11134,
|
||
|
CODE_FOR_cond_uminv8hi = 11135,
|
||
|
CODE_FOR_cond_smaxv16si = 11136,
|
||
|
CODE_FOR_cond_sminv16si = 11137,
|
||
|
CODE_FOR_cond_umaxv16si = 11138,
|
||
|
CODE_FOR_cond_uminv16si = 11139,
|
||
|
CODE_FOR_cond_smaxv8si = 11140,
|
||
|
CODE_FOR_cond_sminv8si = 11141,
|
||
|
CODE_FOR_cond_umaxv8si = 11142,
|
||
|
CODE_FOR_cond_uminv8si = 11143,
|
||
|
CODE_FOR_cond_smaxv4si = 11144,
|
||
|
CODE_FOR_cond_sminv4si = 11145,
|
||
|
CODE_FOR_cond_umaxv4si = 11146,
|
||
|
CODE_FOR_cond_uminv4si = 11147,
|
||
|
CODE_FOR_cond_smaxv8di = 11148,
|
||
|
CODE_FOR_cond_sminv8di = 11149,
|
||
|
CODE_FOR_cond_umaxv8di = 11150,
|
||
|
CODE_FOR_cond_uminv8di = 11151,
|
||
|
CODE_FOR_cond_smaxv4di = 11152,
|
||
|
CODE_FOR_cond_sminv4di = 11153,
|
||
|
CODE_FOR_cond_umaxv4di = 11154,
|
||
|
CODE_FOR_cond_uminv4di = 11155,
|
||
|
CODE_FOR_cond_smaxv2di = 11156,
|
||
|
CODE_FOR_cond_sminv2di = 11157,
|
||
|
CODE_FOR_cond_umaxv2di = 11158,
|
||
|
CODE_FOR_cond_uminv2di = 11159,
|
||
|
CODE_FOR_smaxv16si3_mask = 11160,
|
||
|
CODE_FOR_sminv16si3_mask = 11161,
|
||
|
CODE_FOR_umaxv16si3_mask = 11162,
|
||
|
CODE_FOR_uminv16si3_mask = 11163,
|
||
|
CODE_FOR_smaxv8si3_mask = 11164,
|
||
|
CODE_FOR_sminv8si3_mask = 11165,
|
||
|
CODE_FOR_umaxv8si3_mask = 11166,
|
||
|
CODE_FOR_uminv8si3_mask = 11167,
|
||
|
CODE_FOR_smaxv4si3_mask = 11168,
|
||
|
CODE_FOR_sminv4si3_mask = 11169,
|
||
|
CODE_FOR_umaxv4si3_mask = 11170,
|
||
|
CODE_FOR_uminv4si3_mask = 11171,
|
||
|
CODE_FOR_smaxv8di3_mask = 11172,
|
||
|
CODE_FOR_sminv8di3_mask = 11173,
|
||
|
CODE_FOR_umaxv8di3_mask = 11174,
|
||
|
CODE_FOR_uminv8di3_mask = 11175,
|
||
|
CODE_FOR_smaxv4di3_mask = 11176,
|
||
|
CODE_FOR_sminv4di3_mask = 11177,
|
||
|
CODE_FOR_umaxv4di3_mask = 11178,
|
||
|
CODE_FOR_uminv4di3_mask = 11179,
|
||
|
CODE_FOR_smaxv2di3_mask = 11180,
|
||
|
CODE_FOR_sminv2di3_mask = 11181,
|
||
|
CODE_FOR_umaxv2di3_mask = 11182,
|
||
|
CODE_FOR_uminv2di3_mask = 11183,
|
||
|
CODE_FOR_smaxv8di3 = 11184,
|
||
|
CODE_FOR_sminv8di3 = 11185,
|
||
|
CODE_FOR_umaxv8di3 = 11186,
|
||
|
CODE_FOR_uminv8di3 = 11187,
|
||
|
CODE_FOR_smaxv4di3 = 11188,
|
||
|
CODE_FOR_sminv4di3 = 11189,
|
||
|
CODE_FOR_umaxv4di3 = 11190,
|
||
|
CODE_FOR_uminv4di3 = 11191,
|
||
|
CODE_FOR_smaxv2di3 = 11192,
|
||
|
CODE_FOR_sminv2di3 = 11193,
|
||
|
CODE_FOR_umaxv2di3 = 11194,
|
||
|
CODE_FOR_uminv2di3 = 11195,
|
||
|
CODE_FOR_smaxv16qi3 = 11196,
|
||
|
CODE_FOR_sminv16qi3 = 11197,
|
||
|
CODE_FOR_smaxv8hi3 = 11198,
|
||
|
CODE_FOR_sminv8hi3 = 11199,
|
||
|
CODE_FOR_smaxv4si3 = 11200,
|
||
|
CODE_FOR_sminv4si3 = 11201,
|
||
|
CODE_FOR_umaxv16qi3 = 11202,
|
||
|
CODE_FOR_uminv16qi3 = 11203,
|
||
|
CODE_FOR_umaxv8hi3 = 11204,
|
||
|
CODE_FOR_uminv8hi3 = 11205,
|
||
|
CODE_FOR_umaxv4si3 = 11206,
|
||
|
CODE_FOR_uminv4si3 = 11207,
|
||
|
CODE_FOR_avx512bw_eqv64qi3 = 11208,
|
||
|
CODE_FOR_avx512bw_eqv64qi3_mask = 11209,
|
||
|
CODE_FOR_avx512vl_eqv16qi3 = 11210,
|
||
|
CODE_FOR_avx512vl_eqv16qi3_mask = 11211,
|
||
|
CODE_FOR_avx512vl_eqv32qi3 = 11212,
|
||
|
CODE_FOR_avx512vl_eqv32qi3_mask = 11213,
|
||
|
CODE_FOR_avx512bw_eqv32hi3 = 11214,
|
||
|
CODE_FOR_avx512bw_eqv32hi3_mask = 11215,
|
||
|
CODE_FOR_avx512vl_eqv16hi3 = 11216,
|
||
|
CODE_FOR_avx512vl_eqv16hi3_mask = 11217,
|
||
|
CODE_FOR_avx512vl_eqv8hi3 = 11218,
|
||
|
CODE_FOR_avx512vl_eqv8hi3_mask = 11219,
|
||
|
CODE_FOR_avx512f_eqv16si3 = 11220,
|
||
|
CODE_FOR_avx512f_eqv16si3_mask = 11221,
|
||
|
CODE_FOR_avx512vl_eqv8si3 = 11222,
|
||
|
CODE_FOR_avx512vl_eqv8si3_mask = 11223,
|
||
|
CODE_FOR_avx512vl_eqv4si3 = 11224,
|
||
|
CODE_FOR_avx512vl_eqv4si3_mask = 11225,
|
||
|
CODE_FOR_avx512f_eqv8di3 = 11226,
|
||
|
CODE_FOR_avx512f_eqv8di3_mask = 11227,
|
||
|
CODE_FOR_avx512vl_eqv4di3 = 11228,
|
||
|
CODE_FOR_avx512vl_eqv4di3_mask = 11229,
|
||
|
CODE_FOR_avx512vl_eqv2di3 = 11230,
|
||
|
CODE_FOR_avx512vl_eqv2di3_mask = 11231,
|
||
|
CODE_FOR_avx512f_gtv16si3 = 11232,
|
||
|
CODE_FOR_avx512f_gtv16si3_mask = 11233,
|
||
|
CODE_FOR_avx512vl_gtv8si3 = 11234,
|
||
|
CODE_FOR_avx512vl_gtv8si3_mask = 11235,
|
||
|
CODE_FOR_avx512vl_gtv4si3 = 11236,
|
||
|
CODE_FOR_avx512vl_gtv4si3_mask = 11237,
|
||
|
CODE_FOR_avx512f_gtv8di3 = 11238,
|
||
|
CODE_FOR_avx512f_gtv8di3_mask = 11239,
|
||
|
CODE_FOR_avx512vl_gtv4di3 = 11240,
|
||
|
CODE_FOR_avx512vl_gtv4di3_mask = 11241,
|
||
|
CODE_FOR_avx512vl_gtv2di3 = 11242,
|
||
|
CODE_FOR_avx512vl_gtv2di3_mask = 11243,
|
||
|
CODE_FOR_avx512bw_gtv64qi3 = 11244,
|
||
|
CODE_FOR_avx512bw_gtv64qi3_mask = 11245,
|
||
|
CODE_FOR_avx512vl_gtv16qi3 = 11246,
|
||
|
CODE_FOR_avx512vl_gtv16qi3_mask = 11247,
|
||
|
CODE_FOR_avx512vl_gtv32qi3 = 11248,
|
||
|
CODE_FOR_avx512vl_gtv32qi3_mask = 11249,
|
||
|
CODE_FOR_avx512bw_gtv32hi3 = 11250,
|
||
|
CODE_FOR_avx512bw_gtv32hi3_mask = 11251,
|
||
|
CODE_FOR_avx512vl_gtv16hi3 = 11252,
|
||
|
CODE_FOR_avx512vl_gtv16hi3_mask = 11253,
|
||
|
CODE_FOR_avx512vl_gtv8hi3 = 11254,
|
||
|
CODE_FOR_avx512vl_gtv8hi3_mask = 11255,
|
||
|
CODE_FOR_vcondv64qiv16si = 11256,
|
||
|
CODE_FOR_vcondv64qiv8di = 11257,
|
||
|
CODE_FOR_vcondv64qiv32hi = 11258,
|
||
|
CODE_FOR_vcondv64qiv64qi = 11259,
|
||
|
CODE_FOR_vcondv32hiv16si = 11260,
|
||
|
CODE_FOR_vcondv32hiv8di = 11261,
|
||
|
CODE_FOR_vcondv32hiv32hi = 11262,
|
||
|
CODE_FOR_vcondv32hiv64qi = 11263,
|
||
|
CODE_FOR_vcondv16siv16si = 11264,
|
||
|
CODE_FOR_vcondv16siv8di = 11265,
|
||
|
CODE_FOR_vcondv16siv32hi = 11266,
|
||
|
CODE_FOR_vcondv16siv64qi = 11267,
|
||
|
CODE_FOR_vcondv8div16si = 11268,
|
||
|
CODE_FOR_vcondv8div8di = 11269,
|
||
|
CODE_FOR_vcondv8div32hi = 11270,
|
||
|
CODE_FOR_vcondv8div64qi = 11271,
|
||
|
CODE_FOR_vcondv16sfv16si = 11272,
|
||
|
CODE_FOR_vcondv16sfv8di = 11273,
|
||
|
CODE_FOR_vcondv16sfv32hi = 11274,
|
||
|
CODE_FOR_vcondv16sfv64qi = 11275,
|
||
|
CODE_FOR_vcondv8dfv16si = 11276,
|
||
|
CODE_FOR_vcondv8dfv8di = 11277,
|
||
|
CODE_FOR_vcondv8dfv32hi = 11278,
|
||
|
CODE_FOR_vcondv8dfv64qi = 11279,
|
||
|
CODE_FOR_vcondv32qiv32qi = 11280,
|
||
|
CODE_FOR_vcondv32qiv16hi = 11281,
|
||
|
CODE_FOR_vcondv32qiv8si = 11282,
|
||
|
CODE_FOR_vcondv32qiv4di = 11283,
|
||
|
CODE_FOR_vcondv16hiv32qi = 11284,
|
||
|
CODE_FOR_vcondv16hiv16hi = 11285,
|
||
|
CODE_FOR_vcondv16hiv8si = 11286,
|
||
|
CODE_FOR_vcondv16hiv4di = 11287,
|
||
|
CODE_FOR_vcondv8siv32qi = 11288,
|
||
|
CODE_FOR_vcondv8siv16hi = 11289,
|
||
|
CODE_FOR_vcondv8siv8si = 11290,
|
||
|
CODE_FOR_vcondv8siv4di = 11291,
|
||
|
CODE_FOR_vcondv4div32qi = 11292,
|
||
|
CODE_FOR_vcondv4div16hi = 11293,
|
||
|
CODE_FOR_vcondv4div8si = 11294,
|
||
|
CODE_FOR_vcondv4div4di = 11295,
|
||
|
CODE_FOR_vcondv8sfv32qi = 11296,
|
||
|
CODE_FOR_vcondv8sfv16hi = 11297,
|
||
|
CODE_FOR_vcondv8sfv8si = 11298,
|
||
|
CODE_FOR_vcondv8sfv4di = 11299,
|
||
|
CODE_FOR_vcondv4dfv32qi = 11300,
|
||
|
CODE_FOR_vcondv4dfv16hi = 11301,
|
||
|
CODE_FOR_vcondv4dfv8si = 11302,
|
||
|
CODE_FOR_vcondv4dfv4di = 11303,
|
||
|
CODE_FOR_vcondv16qiv16qi = 11304,
|
||
|
CODE_FOR_vcondv8hiv16qi = 11305,
|
||
|
CODE_FOR_vcondv4siv16qi = 11306,
|
||
|
CODE_FOR_vcondv2div16qi = 11307,
|
||
|
CODE_FOR_vcondv4sfv16qi = 11308,
|
||
|
CODE_FOR_vcondv2dfv16qi = 11309,
|
||
|
CODE_FOR_vcondv16qiv8hi = 11310,
|
||
|
CODE_FOR_vcondv8hiv8hi = 11311,
|
||
|
CODE_FOR_vcondv4siv8hi = 11312,
|
||
|
CODE_FOR_vcondv2div8hi = 11313,
|
||
|
CODE_FOR_vcondv4sfv8hi = 11314,
|
||
|
CODE_FOR_vcondv2dfv8hi = 11315,
|
||
|
CODE_FOR_vcondv16qiv4si = 11316,
|
||
|
CODE_FOR_vcondv8hiv4si = 11317,
|
||
|
CODE_FOR_vcondv4siv4si = 11318,
|
||
|
CODE_FOR_vcondv2div4si = 11319,
|
||
|
CODE_FOR_vcondv4sfv4si = 11320,
|
||
|
CODE_FOR_vcondv2dfv4si = 11321,
|
||
|
CODE_FOR_vcondv2div2di = 11322,
|
||
|
CODE_FOR_vcondv2dfv2di = 11323,
|
||
|
CODE_FOR_vconduv64qiv16si = 11324,
|
||
|
CODE_FOR_vconduv64qiv8di = 11325,
|
||
|
CODE_FOR_vconduv64qiv32hi = 11326,
|
||
|
CODE_FOR_vconduv64qiv64qi = 11327,
|
||
|
CODE_FOR_vconduv32hiv16si = 11328,
|
||
|
CODE_FOR_vconduv32hiv8di = 11329,
|
||
|
CODE_FOR_vconduv32hiv32hi = 11330,
|
||
|
CODE_FOR_vconduv32hiv64qi = 11331,
|
||
|
CODE_FOR_vconduv16siv16si = 11332,
|
||
|
CODE_FOR_vconduv16siv8di = 11333,
|
||
|
CODE_FOR_vconduv16siv32hi = 11334,
|
||
|
CODE_FOR_vconduv16siv64qi = 11335,
|
||
|
CODE_FOR_vconduv8div16si = 11336,
|
||
|
CODE_FOR_vconduv8div8di = 11337,
|
||
|
CODE_FOR_vconduv8div32hi = 11338,
|
||
|
CODE_FOR_vconduv8div64qi = 11339,
|
||
|
CODE_FOR_vconduv16sfv16si = 11340,
|
||
|
CODE_FOR_vconduv16sfv8di = 11341,
|
||
|
CODE_FOR_vconduv16sfv32hi = 11342,
|
||
|
CODE_FOR_vconduv16sfv64qi = 11343,
|
||
|
CODE_FOR_vconduv8dfv16si = 11344,
|
||
|
CODE_FOR_vconduv8dfv8di = 11345,
|
||
|
CODE_FOR_vconduv8dfv32hi = 11346,
|
||
|
CODE_FOR_vconduv8dfv64qi = 11347,
|
||
|
CODE_FOR_vconduv32qiv32qi = 11348,
|
||
|
CODE_FOR_vconduv32qiv16hi = 11349,
|
||
|
CODE_FOR_vconduv32qiv8si = 11350,
|
||
|
CODE_FOR_vconduv32qiv4di = 11351,
|
||
|
CODE_FOR_vconduv16hiv32qi = 11352,
|
||
|
CODE_FOR_vconduv16hiv16hi = 11353,
|
||
|
CODE_FOR_vconduv16hiv8si = 11354,
|
||
|
CODE_FOR_vconduv16hiv4di = 11355,
|
||
|
CODE_FOR_vconduv8siv32qi = 11356,
|
||
|
CODE_FOR_vconduv8siv16hi = 11357,
|
||
|
CODE_FOR_vconduv8siv8si = 11358,
|
||
|
CODE_FOR_vconduv8siv4di = 11359,
|
||
|
CODE_FOR_vconduv4div32qi = 11360,
|
||
|
CODE_FOR_vconduv4div16hi = 11361,
|
||
|
CODE_FOR_vconduv4div8si = 11362,
|
||
|
CODE_FOR_vconduv4div4di = 11363,
|
||
|
CODE_FOR_vconduv8sfv32qi = 11364,
|
||
|
CODE_FOR_vconduv8sfv16hi = 11365,
|
||
|
CODE_FOR_vconduv8sfv8si = 11366,
|
||
|
CODE_FOR_vconduv8sfv4di = 11367,
|
||
|
CODE_FOR_vconduv4dfv32qi = 11368,
|
||
|
CODE_FOR_vconduv4dfv16hi = 11369,
|
||
|
CODE_FOR_vconduv4dfv8si = 11370,
|
||
|
CODE_FOR_vconduv4dfv4di = 11371,
|
||
|
CODE_FOR_vconduv16qiv16qi = 11372,
|
||
|
CODE_FOR_vconduv8hiv16qi = 11373,
|
||
|
CODE_FOR_vconduv4siv16qi = 11374,
|
||
|
CODE_FOR_vconduv2div16qi = 11375,
|
||
|
CODE_FOR_vconduv4sfv16qi = 11376,
|
||
|
CODE_FOR_vconduv2dfv16qi = 11377,
|
||
|
CODE_FOR_vconduv16qiv8hi = 11378,
|
||
|
CODE_FOR_vconduv8hiv8hi = 11379,
|
||
|
CODE_FOR_vconduv4siv8hi = 11380,
|
||
|
CODE_FOR_vconduv2div8hi = 11381,
|
||
|
CODE_FOR_vconduv4sfv8hi = 11382,
|
||
|
CODE_FOR_vconduv2dfv8hi = 11383,
|
||
|
CODE_FOR_vconduv16qiv4si = 11384,
|
||
|
CODE_FOR_vconduv8hiv4si = 11385,
|
||
|
CODE_FOR_vconduv4siv4si = 11386,
|
||
|
CODE_FOR_vconduv2div4si = 11387,
|
||
|
CODE_FOR_vconduv4sfv4si = 11388,
|
||
|
CODE_FOR_vconduv2dfv4si = 11389,
|
||
|
CODE_FOR_vconduv2div2di = 11390,
|
||
|
CODE_FOR_vconduv2dfv2di = 11391,
|
||
|
CODE_FOR_vconduv32hfv32hi = 11392,
|
||
|
CODE_FOR_vconduv16hfv16hi = 11393,
|
||
|
CODE_FOR_vconduv8hfv8hi = 11394,
|
||
|
CODE_FOR_vcondeqv2div2di = 11395,
|
||
|
CODE_FOR_vcondeqv2dfv2di = 11396,
|
||
|
CODE_FOR_vec_permv16qi = 11397,
|
||
|
CODE_FOR_vec_permv8hi = 11398,
|
||
|
CODE_FOR_vec_permv4si = 11399,
|
||
|
CODE_FOR_vec_permv2di = 11400,
|
||
|
CODE_FOR_vec_permv4sf = 11401,
|
||
|
CODE_FOR_vec_permv2df = 11402,
|
||
|
CODE_FOR_vec_permv8hf = 11403,
|
||
|
CODE_FOR_vec_permv32qi = 11404,
|
||
|
CODE_FOR_vec_permv16hi = 11405,
|
||
|
CODE_FOR_vec_permv8si = 11406,
|
||
|
CODE_FOR_vec_permv4di = 11407,
|
||
|
CODE_FOR_vec_permv8sf = 11408,
|
||
|
CODE_FOR_vec_permv4df = 11409,
|
||
|
CODE_FOR_vec_permv16hf = 11410,
|
||
|
CODE_FOR_vec_permv16sf = 11411,
|
||
|
CODE_FOR_vec_permv8df = 11412,
|
||
|
CODE_FOR_vec_permv16si = 11413,
|
||
|
CODE_FOR_vec_permv8di = 11414,
|
||
|
CODE_FOR_vec_permv32hi = 11415,
|
||
|
CODE_FOR_vec_permv64qi = 11416,
|
||
|
CODE_FOR_vec_permv32hf = 11417,
|
||
|
CODE_FOR_one_cmplv16si2 = 11418,
|
||
|
CODE_FOR_one_cmplv8di2 = 11419,
|
||
|
CODE_FOR_one_cmplv64qi2 = 11420,
|
||
|
CODE_FOR_one_cmplv32qi2 = 11421,
|
||
|
CODE_FOR_one_cmplv16qi2 = 11422,
|
||
|
CODE_FOR_one_cmplv32hi2 = 11423,
|
||
|
CODE_FOR_one_cmplv16hi2 = 11424,
|
||
|
CODE_FOR_one_cmplv8hi2 = 11425,
|
||
|
CODE_FOR_one_cmplv8si2 = 11426,
|
||
|
CODE_FOR_one_cmplv4si2 = 11427,
|
||
|
CODE_FOR_one_cmplv4di2 = 11428,
|
||
|
CODE_FOR_one_cmplv2di2 = 11429,
|
||
|
CODE_FOR_avx512bw_andnotv64qi3 = 11430,
|
||
|
CODE_FOR_avx2_andnotv32qi3 = 11431,
|
||
|
CODE_FOR_sse2_andnotv16qi3 = 11432,
|
||
|
CODE_FOR_avx512bw_andnotv32hi3 = 11433,
|
||
|
CODE_FOR_avx2_andnotv16hi3 = 11434,
|
||
|
CODE_FOR_sse2_andnotv8hi3 = 11435,
|
||
|
CODE_FOR_avx512f_andnotv16si3 = 11436,
|
||
|
CODE_FOR_avx2_andnotv8si3 = 11437,
|
||
|
CODE_FOR_sse2_andnotv4si3 = 11438,
|
||
|
CODE_FOR_avx512f_andnotv8di3 = 11439,
|
||
|
CODE_FOR_avx2_andnotv4di3 = 11440,
|
||
|
CODE_FOR_sse2_andnotv2di3 = 11441,
|
||
|
CODE_FOR_avx512f_andnotv16si3_mask = 11442,
|
||
|
CODE_FOR_avx2_andnotv8si3_mask = 11443,
|
||
|
CODE_FOR_sse2_andnotv4si3_mask = 11444,
|
||
|
CODE_FOR_avx512f_andnotv8di3_mask = 11445,
|
||
|
CODE_FOR_avx2_andnotv4di3_mask = 11446,
|
||
|
CODE_FOR_sse2_andnotv2di3_mask = 11447,
|
||
|
CODE_FOR_andv16si3 = 11448,
|
||
|
CODE_FOR_iorv16si3 = 11449,
|
||
|
CODE_FOR_xorv16si3 = 11450,
|
||
|
CODE_FOR_andv8di3 = 11451,
|
||
|
CODE_FOR_iorv8di3 = 11452,
|
||
|
CODE_FOR_xorv8di3 = 11453,
|
||
|
CODE_FOR_andv64qi3 = 11454,
|
||
|
CODE_FOR_iorv64qi3 = 11455,
|
||
|
CODE_FOR_xorv64qi3 = 11456,
|
||
|
CODE_FOR_andv32qi3 = 11457,
|
||
|
CODE_FOR_iorv32qi3 = 11458,
|
||
|
CODE_FOR_xorv32qi3 = 11459,
|
||
|
CODE_FOR_andv16qi3 = 11460,
|
||
|
CODE_FOR_iorv16qi3 = 11461,
|
||
|
CODE_FOR_xorv16qi3 = 11462,
|
||
|
CODE_FOR_andv32hi3 = 11463,
|
||
|
CODE_FOR_iorv32hi3 = 11464,
|
||
|
CODE_FOR_xorv32hi3 = 11465,
|
||
|
CODE_FOR_andv16hi3 = 11466,
|
||
|
CODE_FOR_iorv16hi3 = 11467,
|
||
|
CODE_FOR_xorv16hi3 = 11468,
|
||
|
CODE_FOR_andv8hi3 = 11469,
|
||
|
CODE_FOR_iorv8hi3 = 11470,
|
||
|
CODE_FOR_xorv8hi3 = 11471,
|
||
|
CODE_FOR_andv8si3 = 11472,
|
||
|
CODE_FOR_iorv8si3 = 11473,
|
||
|
CODE_FOR_xorv8si3 = 11474,
|
||
|
CODE_FOR_andv4si3 = 11475,
|
||
|
CODE_FOR_iorv4si3 = 11476,
|
||
|
CODE_FOR_xorv4si3 = 11477,
|
||
|
CODE_FOR_andv4di3 = 11478,
|
||
|
CODE_FOR_iorv4di3 = 11479,
|
||
|
CODE_FOR_xorv4di3 = 11480,
|
||
|
CODE_FOR_andv2di3 = 11481,
|
||
|
CODE_FOR_iorv2di3 = 11482,
|
||
|
CODE_FOR_xorv2di3 = 11483,
|
||
|
CODE_FOR_cond_andv16si = 11484,
|
||
|
CODE_FOR_cond_iorv16si = 11485,
|
||
|
CODE_FOR_cond_xorv16si = 11486,
|
||
|
CODE_FOR_cond_andv8si = 11487,
|
||
|
CODE_FOR_cond_iorv8si = 11488,
|
||
|
CODE_FOR_cond_xorv8si = 11489,
|
||
|
CODE_FOR_cond_andv4si = 11490,
|
||
|
CODE_FOR_cond_iorv4si = 11491,
|
||
|
CODE_FOR_cond_xorv4si = 11492,
|
||
|
CODE_FOR_cond_andv8di = 11493,
|
||
|
CODE_FOR_cond_iorv8di = 11494,
|
||
|
CODE_FOR_cond_xorv8di = 11495,
|
||
|
CODE_FOR_cond_andv4di = 11496,
|
||
|
CODE_FOR_cond_iorv4di = 11497,
|
||
|
CODE_FOR_cond_xorv4di = 11498,
|
||
|
CODE_FOR_cond_andv2di = 11499,
|
||
|
CODE_FOR_cond_iorv2di = 11500,
|
||
|
CODE_FOR_cond_xorv2di = 11501,
|
||
|
CODE_FOR_andv16si3_mask = 11502,
|
||
|
CODE_FOR_iorv16si3_mask = 11503,
|
||
|
CODE_FOR_xorv16si3_mask = 11504,
|
||
|
CODE_FOR_andv8si3_mask = 11505,
|
||
|
CODE_FOR_iorv8si3_mask = 11506,
|
||
|
CODE_FOR_xorv8si3_mask = 11507,
|
||
|
CODE_FOR_andv4si3_mask = 11508,
|
||
|
CODE_FOR_iorv4si3_mask = 11509,
|
||
|
CODE_FOR_xorv4si3_mask = 11510,
|
||
|
CODE_FOR_andv8di3_mask = 11511,
|
||
|
CODE_FOR_iorv8di3_mask = 11512,
|
||
|
CODE_FOR_xorv8di3_mask = 11513,
|
||
|
CODE_FOR_andv4di3_mask = 11514,
|
||
|
CODE_FOR_iorv4di3_mask = 11515,
|
||
|
CODE_FOR_xorv4di3_mask = 11516,
|
||
|
CODE_FOR_andv2di3_mask = 11517,
|
||
|
CODE_FOR_iorv2di3_mask = 11518,
|
||
|
CODE_FOR_xorv2di3_mask = 11519,
|
||
|
CODE_FOR_one_cmplv1ti2 = 11520,
|
||
|
CODE_FOR_vec_pack_trunc_v32hi = 11521,
|
||
|
CODE_FOR_vec_pack_trunc_v16hi = 11522,
|
||
|
CODE_FOR_vec_pack_trunc_v8hi = 11523,
|
||
|
CODE_FOR_vec_pack_trunc_v16si = 11524,
|
||
|
CODE_FOR_vec_pack_trunc_v8si = 11525,
|
||
|
CODE_FOR_vec_pack_trunc_v4si = 11526,
|
||
|
CODE_FOR_vec_pack_trunc_v8di = 11527,
|
||
|
CODE_FOR_vec_pack_trunc_v4di = 11528,
|
||
|
CODE_FOR_vec_pack_trunc_v2di = 11529,
|
||
|
CODE_FOR_vec_pack_trunc_qi = 11530,
|
||
|
CODE_FOR_vec_pack_trunc_hi = 11531,
|
||
|
CODE_FOR_vec_pack_trunc_si = 11532,
|
||
|
CODE_FOR_vec_pack_sbool_trunc_qi = 11533,
|
||
|
CODE_FOR_vec_interleave_highv32qi = 11534,
|
||
|
CODE_FOR_vec_interleave_highv16hi = 11535,
|
||
|
CODE_FOR_vec_interleave_highv8si = 11536,
|
||
|
CODE_FOR_vec_interleave_highv4di = 11537,
|
||
|
CODE_FOR_vec_interleave_lowv32qi = 11538,
|
||
|
CODE_FOR_vec_interleave_lowv16hi = 11539,
|
||
|
CODE_FOR_vec_interleave_lowv8si = 11540,
|
||
|
CODE_FOR_vec_interleave_lowv4di = 11541,
|
||
|
CODE_FOR_avx512dq_vinsertf64x2_mask = 11542,
|
||
|
CODE_FOR_avx512dq_vinserti64x2_mask = 11543,
|
||
|
CODE_FOR_avx512f_vinsertf32x4_mask = 11544,
|
||
|
CODE_FOR_avx512f_vinserti32x4_mask = 11545,
|
||
|
CODE_FOR_avx512dq_vinsertf32x8_mask = 11546,
|
||
|
CODE_FOR_avx512dq_vinserti32x8_mask = 11547,
|
||
|
CODE_FOR_avx512f_vinsertf64x4_mask = 11548,
|
||
|
CODE_FOR_avx512f_vinserti64x4_mask = 11549,
|
||
|
CODE_FOR_avx512dq_shuf_i64x2_mask = 11550,
|
||
|
CODE_FOR_avx512dq_shuf_f64x2_mask = 11551,
|
||
|
CODE_FOR_avx512f_shuf_f64x2_mask = 11552,
|
||
|
CODE_FOR_avx512f_shuf_i64x2_mask = 11553,
|
||
|
CODE_FOR_avx512vl_shuf_i32x4_mask = 11554,
|
||
|
CODE_FOR_avx512vl_shuf_f32x4_mask = 11555,
|
||
|
CODE_FOR_avx512f_shuf_f32x4_mask = 11556,
|
||
|
CODE_FOR_avx512f_shuf_i32x4_mask = 11557,
|
||
|
CODE_FOR_avx512f_pshufdv3_mask = 11558,
|
||
|
CODE_FOR_avx512vl_pshufdv3_mask = 11559,
|
||
|
CODE_FOR_avx2_pshufdv3 = 11560,
|
||
|
CODE_FOR_avx512vl_pshufd_mask = 11561,
|
||
|
CODE_FOR_sse2_pshufd = 11562,
|
||
|
CODE_FOR_avx512vl_pshuflwv3_mask = 11563,
|
||
|
CODE_FOR_avx2_pshuflwv3 = 11564,
|
||
|
CODE_FOR_avx512vl_pshuflw_mask = 11565,
|
||
|
CODE_FOR_sse2_pshuflw = 11566,
|
||
|
CODE_FOR_avx2_pshufhwv3 = 11567,
|
||
|
CODE_FOR_avx512vl_pshufhwv3_mask = 11568,
|
||
|
CODE_FOR_avx512vl_pshufhw_mask = 11569,
|
||
|
CODE_FOR_sse2_pshufhw = 11570,
|
||
|
CODE_FOR_sse2_loadd = 11571,
|
||
|
CODE_FOR_vec_unpacks_lo_v64qi = 11572,
|
||
|
CODE_FOR_vec_unpacks_lo_v32qi = 11573,
|
||
|
CODE_FOR_vec_unpacks_lo_v16qi = 11574,
|
||
|
CODE_FOR_vec_unpacks_lo_v32hi = 11575,
|
||
|
CODE_FOR_vec_unpacks_lo_v16hi = 11576,
|
||
|
CODE_FOR_vec_unpacks_lo_v8hi = 11577,
|
||
|
CODE_FOR_vec_unpacks_lo_v16si = 11578,
|
||
|
CODE_FOR_vec_unpacks_lo_v8si = 11579,
|
||
|
CODE_FOR_vec_unpacks_lo_v4si = 11580,
|
||
|
CODE_FOR_vec_unpacks_hi_v64qi = 11581,
|
||
|
CODE_FOR_vec_unpacks_hi_v32qi = 11582,
|
||
|
CODE_FOR_vec_unpacks_hi_v16qi = 11583,
|
||
|
CODE_FOR_vec_unpacks_hi_v32hi = 11584,
|
||
|
CODE_FOR_vec_unpacks_hi_v16hi = 11585,
|
||
|
CODE_FOR_vec_unpacks_hi_v8hi = 11586,
|
||
|
CODE_FOR_vec_unpacks_hi_v16si = 11587,
|
||
|
CODE_FOR_vec_unpacks_hi_v8si = 11588,
|
||
|
CODE_FOR_vec_unpacks_hi_v4si = 11589,
|
||
|
CODE_FOR_vec_unpacku_lo_v64qi = 11590,
|
||
|
CODE_FOR_vec_unpacku_lo_v32qi = 11591,
|
||
|
CODE_FOR_vec_unpacku_lo_v16qi = 11592,
|
||
|
CODE_FOR_vec_unpacku_lo_v32hi = 11593,
|
||
|
CODE_FOR_vec_unpacku_lo_v16hi = 11594,
|
||
|
CODE_FOR_vec_unpacku_lo_v8hi = 11595,
|
||
|
CODE_FOR_vec_unpacku_lo_v16si = 11596,
|
||
|
CODE_FOR_vec_unpacku_lo_v8si = 11597,
|
||
|
CODE_FOR_vec_unpacku_lo_v4si = 11598,
|
||
|
CODE_FOR_vec_unpacks_sbool_lo_qi = 11599,
|
||
|
CODE_FOR_vec_unpacks_lo_hi = 11600,
|
||
|
CODE_FOR_vec_unpacks_lo_si = 11601,
|
||
|
CODE_FOR_vec_unpacks_lo_di = 11602,
|
||
|
CODE_FOR_vec_unpacku_hi_v64qi = 11603,
|
||
|
CODE_FOR_vec_unpacku_hi_v32qi = 11604,
|
||
|
CODE_FOR_vec_unpacku_hi_v16qi = 11605,
|
||
|
CODE_FOR_vec_unpacku_hi_v32hi = 11606,
|
||
|
CODE_FOR_vec_unpacku_hi_v16hi = 11607,
|
||
|
CODE_FOR_vec_unpacku_hi_v8hi = 11608,
|
||
|
CODE_FOR_vec_unpacku_hi_v16si = 11609,
|
||
|
CODE_FOR_vec_unpacku_hi_v8si = 11610,
|
||
|
CODE_FOR_vec_unpacku_hi_v4si = 11611,
|
||
|
CODE_FOR_vec_unpacks_sbool_hi_qi = 11612,
|
||
|
CODE_FOR_vec_unpacks_hi_hi = 11613,
|
||
|
CODE_FOR_vec_unpacks_hi_si = 11614,
|
||
|
CODE_FOR_vec_unpacks_hi_di = 11615,
|
||
|
CODE_FOR_avx512bw_uavgv64qi3 = 11616,
|
||
|
CODE_FOR_avx512bw_uavgv64qi3_mask = 11617,
|
||
|
CODE_FOR_avx2_uavgv32qi3 = 11618,
|
||
|
CODE_FOR_avx2_uavgv32qi3_mask = 11619,
|
||
|
CODE_FOR_sse2_uavgv16qi3 = 11620,
|
||
|
CODE_FOR_sse2_uavgv16qi3_mask = 11621,
|
||
|
CODE_FOR_avx512bw_uavgv32hi3 = 11622,
|
||
|
CODE_FOR_avx512bw_uavgv32hi3_mask = 11623,
|
||
|
CODE_FOR_avx2_uavgv16hi3 = 11624,
|
||
|
CODE_FOR_avx2_uavgv16hi3_mask = 11625,
|
||
|
CODE_FOR_sse2_uavgv8hi3 = 11626,
|
||
|
CODE_FOR_sse2_uavgv8hi3_mask = 11627,
|
||
|
CODE_FOR_sse2_maskmovdqu = 11628,
|
||
|
CODE_FOR_ssse3_pmulhrswv8hi3_mask = 11629,
|
||
|
CODE_FOR_avx2_pmulhrswv16hi3_mask = 11630,
|
||
|
CODE_FOR_ssse3_pmulhrswv8hi3 = 11631,
|
||
|
CODE_FOR_avx2_pmulhrswv16hi3 = 11632,
|
||
|
CODE_FOR_smulhrsv32hi3 = 11633,
|
||
|
CODE_FOR_smulhrsv16hi3 = 11634,
|
||
|
CODE_FOR_smulhrsv8hi3 = 11635,
|
||
|
CODE_FOR_smulhrsv4hi3 = 11636,
|
||
|
CODE_FOR_ssse3_pmulhrswv4hi3 = 11637,
|
||
|
CODE_FOR_smulhrsv2hi3 = 11638,
|
||
|
CODE_FOR_ssse3_pshufbv8qi3 = 11639,
|
||
|
CODE_FOR_absv64qi2 = 11640,
|
||
|
CODE_FOR_absv32qi2 = 11641,
|
||
|
CODE_FOR_absv16qi2 = 11642,
|
||
|
CODE_FOR_absv32hi2 = 11643,
|
||
|
CODE_FOR_absv16hi2 = 11644,
|
||
|
CODE_FOR_absv8hi2 = 11645,
|
||
|
CODE_FOR_absv16si2 = 11646,
|
||
|
CODE_FOR_absv8si2 = 11647,
|
||
|
CODE_FOR_absv4si2 = 11648,
|
||
|
CODE_FOR_absv8di2 = 11649,
|
||
|
CODE_FOR_absv4di2 = 11650,
|
||
|
CODE_FOR_absv2di2 = 11651,
|
||
|
CODE_FOR_avx2_pblendw = 11652,
|
||
|
CODE_FOR_avx2_pblendph = 11653,
|
||
|
CODE_FOR_avx2_pblendw_1 = 11654,
|
||
|
CODE_FOR_avx2_pblendph_1 = 11655,
|
||
|
CODE_FOR_extendv16qiv16hi2 = 11656,
|
||
|
CODE_FOR_zero_extendv16qiv16hi2 = 11657,
|
||
|
CODE_FOR_extendv32qiv32hi2 = 11658,
|
||
|
CODE_FOR_zero_extendv32qiv32hi2 = 11659,
|
||
|
CODE_FOR_extendv8qiv8hi2 = 11660,
|
||
|
CODE_FOR_zero_extendv8qiv8hi2 = 11661,
|
||
|
CODE_FOR_extendv16qiv16si2 = 11662,
|
||
|
CODE_FOR_zero_extendv16qiv16si2 = 11663,
|
||
|
CODE_FOR_extendv8qiv8si2 = 11664,
|
||
|
CODE_FOR_zero_extendv8qiv8si2 = 11665,
|
||
|
CODE_FOR_extendv4qiv4si2 = 11666,
|
||
|
CODE_FOR_zero_extendv4qiv4si2 = 11667,
|
||
|
CODE_FOR_extendv16hiv16si2 = 11668,
|
||
|
CODE_FOR_zero_extendv16hiv16si2 = 11669,
|
||
|
CODE_FOR_extendv8hiv8si2 = 11670,
|
||
|
CODE_FOR_zero_extendv8hiv8si2 = 11671,
|
||
|
CODE_FOR_extendv4hiv4si2 = 11672,
|
||
|
CODE_FOR_zero_extendv4hiv4si2 = 11673,
|
||
|
CODE_FOR_extendv8qiv8di2 = 11674,
|
||
|
CODE_FOR_zero_extendv8qiv8di2 = 11675,
|
||
|
CODE_FOR_extendv4qiv4di2 = 11676,
|
||
|
CODE_FOR_zero_extendv4qiv4di2 = 11677,
|
||
|
CODE_FOR_extendv2qiv2di2 = 11678,
|
||
|
CODE_FOR_zero_extendv2qiv2di2 = 11679,
|
||
|
CODE_FOR_extendv8hiv8di2 = 11680,
|
||
|
CODE_FOR_zero_extendv8hiv8di2 = 11681,
|
||
|
CODE_FOR_extendv4hiv4di2 = 11682,
|
||
|
CODE_FOR_zero_extendv4hiv4di2 = 11683,
|
||
|
CODE_FOR_extendv2hiv2di2 = 11684,
|
||
|
CODE_FOR_zero_extendv2hiv2di2 = 11685,
|
||
|
CODE_FOR_extendv8siv8di2 = 11686,
|
||
|
CODE_FOR_zero_extendv8siv8di2 = 11687,
|
||
|
CODE_FOR_extendv4siv4di2 = 11688,
|
||
|
CODE_FOR_zero_extendv4siv4di2 = 11689,
|
||
|
CODE_FOR_extendv2siv2di2 = 11690,
|
||
|
CODE_FOR_zero_extendv2siv2di2 = 11691,
|
||
|
CODE_FOR_nearbyintv32hf2 = 11692,
|
||
|
CODE_FOR_nearbyintv16hf2 = 11693,
|
||
|
CODE_FOR_nearbyintv8hf2 = 11694,
|
||
|
CODE_FOR_nearbyintv16sf2 = 11695,
|
||
|
CODE_FOR_nearbyintv8sf2 = 11696,
|
||
|
CODE_FOR_nearbyintv4sf2 = 11697,
|
||
|
CODE_FOR_nearbyintv8df2 = 11698,
|
||
|
CODE_FOR_nearbyintv4df2 = 11699,
|
||
|
CODE_FOR_nearbyintv2df2 = 11700,
|
||
|
CODE_FOR_rintv32hf2 = 11701,
|
||
|
CODE_FOR_rintv16hf2 = 11702,
|
||
|
CODE_FOR_rintv8hf2 = 11703,
|
||
|
CODE_FOR_rintv16sf2 = 11704,
|
||
|
CODE_FOR_rintv8sf2 = 11705,
|
||
|
CODE_FOR_rintv4sf2 = 11706,
|
||
|
CODE_FOR_rintv8df2 = 11707,
|
||
|
CODE_FOR_rintv4df2 = 11708,
|
||
|
CODE_FOR_rintv2df2 = 11709,
|
||
|
CODE_FOR_avx_roundps_sfix256 = 11710,
|
||
|
CODE_FOR_sse4_1_roundps_sfix = 11711,
|
||
|
CODE_FOR_avx512f_roundps512 = 11712,
|
||
|
CODE_FOR_avx512f_roundpd512 = 11713,
|
||
|
CODE_FOR_avx512f_roundps512_sfix = 11714,
|
||
|
CODE_FOR_avx512f_roundpd_vec_pack_sfix512 = 11715,
|
||
|
CODE_FOR_avx_roundpd_vec_pack_sfix256 = 11716,
|
||
|
CODE_FOR_sse4_1_roundpd_vec_pack_sfix = 11717,
|
||
|
CODE_FOR_roundv16sf2 = 11718,
|
||
|
CODE_FOR_roundv8sf2 = 11719,
|
||
|
CODE_FOR_roundv4sf2 = 11720,
|
||
|
CODE_FOR_roundv8df2 = 11721,
|
||
|
CODE_FOR_roundv4df2 = 11722,
|
||
|
CODE_FOR_roundv2df2 = 11723,
|
||
|
CODE_FOR_roundv16sf2_sfix = 11724,
|
||
|
CODE_FOR_roundv8sf2_sfix = 11725,
|
||
|
CODE_FOR_roundv4sf2_sfix = 11726,
|
||
|
CODE_FOR_roundv8df2_vec_pack_sfix = 11727,
|
||
|
CODE_FOR_roundv4df2_vec_pack_sfix = 11728,
|
||
|
CODE_FOR_roundv2df2_vec_pack_sfix = 11729,
|
||
|
CODE_FOR_avx512pf_gatherpfv16sisf = 11730,
|
||
|
CODE_FOR_avx512pf_gatherpfv8disf = 11731,
|
||
|
CODE_FOR_avx512pf_gatherpfv8sidf = 11732,
|
||
|
CODE_FOR_avx512pf_gatherpfv8didf = 11733,
|
||
|
CODE_FOR_avx512pf_scatterpfv16sisf = 11734,
|
||
|
CODE_FOR_avx512pf_scatterpfv8disf = 11735,
|
||
|
CODE_FOR_avx512pf_scatterpfv8sidf = 11736,
|
||
|
CODE_FOR_avx512pf_scatterpfv8didf = 11737,
|
||
|
CODE_FOR_rotlv16qi3 = 11738,
|
||
|
CODE_FOR_rotlv8hi3 = 11739,
|
||
|
CODE_FOR_rotlv4si3 = 11740,
|
||
|
CODE_FOR_rotlv2di3 = 11741,
|
||
|
CODE_FOR_rotrv16qi3 = 11742,
|
||
|
CODE_FOR_rotrv8hi3 = 11743,
|
||
|
CODE_FOR_rotrv4si3 = 11744,
|
||
|
CODE_FOR_rotrv2di3 = 11745,
|
||
|
CODE_FOR_vrotrv16qi3 = 11746,
|
||
|
CODE_FOR_vrotrv8hi3 = 11747,
|
||
|
CODE_FOR_vrotrv4si3 = 11748,
|
||
|
CODE_FOR_vrotrv2di3 = 11749,
|
||
|
CODE_FOR_vrotlv16qi3 = 11750,
|
||
|
CODE_FOR_vrotlv8hi3 = 11751,
|
||
|
CODE_FOR_vrotlv4si3 = 11752,
|
||
|
CODE_FOR_vrotlv2di3 = 11753,
|
||
|
CODE_FOR_vlshrv16qi3 = 11754,
|
||
|
CODE_FOR_vlshrv8hi3 = 11755,
|
||
|
CODE_FOR_vlshrv4si3 = 11756,
|
||
|
CODE_FOR_vlshrv2di3 = 11757,
|
||
|
CODE_FOR_vashlv64qi3 = 11758,
|
||
|
CODE_FOR_vlshrv64qi3 = 11759,
|
||
|
CODE_FOR_vashrv64qi3 = 11760,
|
||
|
CODE_FOR_vashlv32qi3 = 11761,
|
||
|
CODE_FOR_vlshrv32qi3 = 11762,
|
||
|
CODE_FOR_vashrv32qi3 = 11763,
|
||
|
CODE_FOR_vashlv32hi3 = 11764,
|
||
|
CODE_FOR_vlshrv32hi3 = 11765,
|
||
|
CODE_FOR_vashrv32hi3 = 11766,
|
||
|
CODE_FOR_vashlv16hi3 = 11767,
|
||
|
CODE_FOR_vlshrv16hi3 = 11768,
|
||
|
CODE_FOR_vashrv16hi3 = 11769,
|
||
|
CODE_FOR_vashlv8qi3 = 11770,
|
||
|
CODE_FOR_vlshrv8qi3 = 11771,
|
||
|
CODE_FOR_vashrv8qi3 = 11772,
|
||
|
CODE_FOR_vlshrv16si3 = 11773,
|
||
|
CODE_FOR_vlshrv8di3 = 11774,
|
||
|
CODE_FOR_vlshrv8si3 = 11775,
|
||
|
CODE_FOR_vlshrv4di3 = 11776,
|
||
|
CODE_FOR_vashrv8di3 = 11777,
|
||
|
CODE_FOR_vashrv4di3 = 11778,
|
||
|
CODE_FOR_vashrv16qi3 = 11779,
|
||
|
CODE_FOR_vashrv8hi3 = 11780,
|
||
|
CODE_FOR_vashrv2di3 = 11781,
|
||
|
CODE_FOR_vashrv4si3 = 11782,
|
||
|
CODE_FOR_vashrv16si3 = 11783,
|
||
|
CODE_FOR_vashrv8si3 = 11784,
|
||
|
CODE_FOR_vashlv16qi3 = 11785,
|
||
|
CODE_FOR_vashlv8hi3 = 11786,
|
||
|
CODE_FOR_vashlv4si3 = 11787,
|
||
|
CODE_FOR_vashlv2di3 = 11788,
|
||
|
CODE_FOR_vashlv16si3 = 11789,
|
||
|
CODE_FOR_vashlv8di3 = 11790,
|
||
|
CODE_FOR_vashlv8si3 = 11791,
|
||
|
CODE_FOR_vashlv4di3 = 11792,
|
||
|
CODE_FOR_ashlv64qi3 = 11793,
|
||
|
CODE_FOR_lshrv64qi3 = 11794,
|
||
|
CODE_FOR_ashrv64qi3 = 11795,
|
||
|
CODE_FOR_ashlv32qi3 = 11796,
|
||
|
CODE_FOR_lshrv32qi3 = 11797,
|
||
|
CODE_FOR_ashrv32qi3 = 11798,
|
||
|
CODE_FOR_ashlv16qi3 = 11799,
|
||
|
CODE_FOR_lshrv16qi3 = 11800,
|
||
|
CODE_FOR_ashrv16qi3 = 11801,
|
||
|
CODE_FOR_ashrv2di3 = 11802,
|
||
|
CODE_FOR_xop_vmfrczv4sf2 = 11803,
|
||
|
CODE_FOR_xop_vmfrczv2df2 = 11804,
|
||
|
CODE_FOR_avx_vzeroall = 11805,
|
||
|
CODE_FOR_avx_vzeroupper = 11806,
|
||
|
CODE_FOR_avx512f_vpermilv8df = 11807,
|
||
|
CODE_FOR_avx512f_vpermilv8df_mask = 11808,
|
||
|
CODE_FOR_avx_vpermilv4df = 11809,
|
||
|
CODE_FOR_avx_vpermilv4df_mask = 11810,
|
||
|
CODE_FOR_avx_vpermilv2df = 11811,
|
||
|
CODE_FOR_avx_vpermilv2df_mask = 11812,
|
||
|
CODE_FOR_avx512f_vpermilv16sf = 11813,
|
||
|
CODE_FOR_avx512f_vpermilv16sf_mask = 11814,
|
||
|
CODE_FOR_avx_vpermilv8sf = 11815,
|
||
|
CODE_FOR_avx_vpermilv8sf_mask = 11816,
|
||
|
CODE_FOR_avx_vpermilv4sf = 11817,
|
||
|
CODE_FOR_avx_vpermilv4sf_mask = 11818,
|
||
|
CODE_FOR_avx2_permv4di = 11819,
|
||
|
CODE_FOR_avx2_permv4df = 11820,
|
||
|
CODE_FOR_avx512vl_permv4di_mask = 11821,
|
||
|
CODE_FOR_avx512vl_permv4df_mask = 11822,
|
||
|
CODE_FOR_avx512f_permv8df = 11823,
|
||
|
CODE_FOR_avx512f_permv8di = 11824,
|
||
|
CODE_FOR_avx512f_permv8df_mask = 11825,
|
||
|
CODE_FOR_avx512f_permv8di_mask = 11826,
|
||
|
CODE_FOR_avx512f_vpermi2varv16si3_mask = 11827,
|
||
|
CODE_FOR_avx512f_vpermi2varv16sf3_mask = 11828,
|
||
|
CODE_FOR_avx512f_vpermi2varv8di3_mask = 11829,
|
||
|
CODE_FOR_avx512f_vpermi2varv8df3_mask = 11830,
|
||
|
CODE_FOR_avx512vl_vpermi2varv8si3_mask = 11831,
|
||
|
CODE_FOR_avx512vl_vpermi2varv8sf3_mask = 11832,
|
||
|
CODE_FOR_avx512vl_vpermi2varv4di3_mask = 11833,
|
||
|
CODE_FOR_avx512vl_vpermi2varv4df3_mask = 11834,
|
||
|
CODE_FOR_avx512vl_vpermi2varv4si3_mask = 11835,
|
||
|
CODE_FOR_avx512vl_vpermi2varv4sf3_mask = 11836,
|
||
|
CODE_FOR_avx512vl_vpermi2varv2di3_mask = 11837,
|
||
|
CODE_FOR_avx512vl_vpermi2varv2df3_mask = 11838,
|
||
|
CODE_FOR_avx512bw_vpermi2varv32hi3_mask = 11839,
|
||
|
CODE_FOR_avx512vl_vpermi2varv16hi3_mask = 11840,
|
||
|
CODE_FOR_avx512vl_vpermi2varv8hi3_mask = 11841,
|
||
|
CODE_FOR_avx512bw_vpermi2varv64qi3_mask = 11842,
|
||
|
CODE_FOR_avx512vl_vpermi2varv32qi3_mask = 11843,
|
||
|
CODE_FOR_avx512vl_vpermi2varv16qi3_mask = 11844,
|
||
|
CODE_FOR_avx512f_vpermt2varv16si3_maskz = 11845,
|
||
|
CODE_FOR_avx512f_vpermt2varv16sf3_maskz = 11846,
|
||
|
CODE_FOR_avx512f_vpermt2varv8di3_maskz = 11847,
|
||
|
CODE_FOR_avx512f_vpermt2varv8df3_maskz = 11848,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8si3_maskz = 11849,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8sf3_maskz = 11850,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4di3_maskz = 11851,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4df3_maskz = 11852,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4si3_maskz = 11853,
|
||
|
CODE_FOR_avx512vl_vpermt2varv4sf3_maskz = 11854,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2di3_maskz = 11855,
|
||
|
CODE_FOR_avx512vl_vpermt2varv2df3_maskz = 11856,
|
||
|
CODE_FOR_avx512bw_vpermt2varv32hi3_maskz = 11857,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16hi3_maskz = 11858,
|
||
|
CODE_FOR_avx512vl_vpermt2varv8hi3_maskz = 11859,
|
||
|
CODE_FOR_avx512bw_vpermt2varv64qi3_maskz = 11860,
|
||
|
CODE_FOR_avx512vl_vpermt2varv32qi3_maskz = 11861,
|
||
|
CODE_FOR_avx512vl_vpermt2varv16qi3_maskz = 11862,
|
||
|
CODE_FOR_avx_vperm2f128v8si3 = 11863,
|
||
|
CODE_FOR_avx_vperm2f128v8sf3 = 11864,
|
||
|
CODE_FOR_avx_vperm2f128v4df3 = 11865,
|
||
|
CODE_FOR_avx512vl_vinsertv8si = 11866,
|
||
|
CODE_FOR_avx512vl_vinsertv8sf = 11867,
|
||
|
CODE_FOR_avx512vl_vinsertv4di = 11868,
|
||
|
CODE_FOR_avx512vl_vinsertv4df = 11869,
|
||
|
CODE_FOR_avx_vinsertf128v32qi = 11870,
|
||
|
CODE_FOR_avx_vinsertf128v16hi = 11871,
|
||
|
CODE_FOR_avx_vinsertf128v8si = 11872,
|
||
|
CODE_FOR_avx_vinsertf128v4di = 11873,
|
||
|
CODE_FOR_avx_vinsertf128v8sf = 11874,
|
||
|
CODE_FOR_avx_vinsertf128v4df = 11875,
|
||
|
CODE_FOR_maskloadv4sfv4si = 11876,
|
||
|
CODE_FOR_maskloadv2dfv2di = 11877,
|
||
|
CODE_FOR_maskloadv8sfv8si = 11878,
|
||
|
CODE_FOR_maskloadv4dfv4di = 11879,
|
||
|
CODE_FOR_maskloadv4siv4si = 11880,
|
||
|
CODE_FOR_maskloadv2div2di = 11881,
|
||
|
CODE_FOR_maskloadv8siv8si = 11882,
|
||
|
CODE_FOR_maskloadv4div4di = 11883,
|
||
|
CODE_FOR_maskloadv16sihi = 11884,
|
||
|
CODE_FOR_maskloadv8siqi = 11885,
|
||
|
CODE_FOR_maskloadv4siqi = 11886,
|
||
|
CODE_FOR_maskloadv8diqi = 11887,
|
||
|
CODE_FOR_maskloadv4diqi = 11888,
|
||
|
CODE_FOR_maskloadv2diqi = 11889,
|
||
|
CODE_FOR_maskloadv32hfsi = 11890,
|
||
|
CODE_FOR_maskloadv16hfhi = 11891,
|
||
|
CODE_FOR_maskloadv8hfqi = 11892,
|
||
|
CODE_FOR_maskloadv16sfhi = 11893,
|
||
|
CODE_FOR_maskloadv8sfqi = 11894,
|
||
|
CODE_FOR_maskloadv4sfqi = 11895,
|
||
|
CODE_FOR_maskloadv8dfqi = 11896,
|
||
|
CODE_FOR_maskloadv4dfqi = 11897,
|
||
|
CODE_FOR_maskloadv2dfqi = 11898,
|
||
|
CODE_FOR_maskloadv64qidi = 11899,
|
||
|
CODE_FOR_maskloadv16qihi = 11900,
|
||
|
CODE_FOR_maskloadv32qisi = 11901,
|
||
|
CODE_FOR_maskloadv32hisi = 11902,
|
||
|
CODE_FOR_maskloadv16hihi = 11903,
|
||
|
CODE_FOR_maskloadv8hiqi = 11904,
|
||
|
CODE_FOR_maskstorev4sfv4si = 11905,
|
||
|
CODE_FOR_maskstorev2dfv2di = 11906,
|
||
|
CODE_FOR_maskstorev8sfv8si = 11907,
|
||
|
CODE_FOR_maskstorev4dfv4di = 11908,
|
||
|
CODE_FOR_maskstorev4siv4si = 11909,
|
||
|
CODE_FOR_maskstorev2div2di = 11910,
|
||
|
CODE_FOR_maskstorev8siv8si = 11911,
|
||
|
CODE_FOR_maskstorev4div4di = 11912,
|
||
|
CODE_FOR_maskstorev16sihi = 11913,
|
||
|
CODE_FOR_maskstorev8siqi = 11914,
|
||
|
CODE_FOR_maskstorev4siqi = 11915,
|
||
|
CODE_FOR_maskstorev8diqi = 11916,
|
||
|
CODE_FOR_maskstorev4diqi = 11917,
|
||
|
CODE_FOR_maskstorev2diqi = 11918,
|
||
|
CODE_FOR_maskstorev32hfsi = 11919,
|
||
|
CODE_FOR_maskstorev16hfhi = 11920,
|
||
|
CODE_FOR_maskstorev8hfqi = 11921,
|
||
|
CODE_FOR_maskstorev16sfhi = 11922,
|
||
|
CODE_FOR_maskstorev8sfqi = 11923,
|
||
|
CODE_FOR_maskstorev4sfqi = 11924,
|
||
|
CODE_FOR_maskstorev8dfqi = 11925,
|
||
|
CODE_FOR_maskstorev4dfqi = 11926,
|
||
|
CODE_FOR_maskstorev2dfqi = 11927,
|
||
|
CODE_FOR_maskstorev64qidi = 11928,
|
||
|
CODE_FOR_maskstorev16qihi = 11929,
|
||
|
CODE_FOR_maskstorev32qisi = 11930,
|
||
|
CODE_FOR_maskstorev32hisi = 11931,
|
||
|
CODE_FOR_maskstorev16hihi = 11932,
|
||
|
CODE_FOR_maskstorev8hiqi = 11933,
|
||
|
CODE_FOR_cbranchv4si4 = 11934,
|
||
|
CODE_FOR_cbranchv2di4 = 11935,
|
||
|
CODE_FOR_cbranchv8si4 = 11936,
|
||
|
CODE_FOR_cbranchv4di4 = 11937,
|
||
|
CODE_FOR_vec_initv64qiqi = 11938,
|
||
|
CODE_FOR_vec_initv32qiqi = 11939,
|
||
|
CODE_FOR_vec_initv16qiqi = 11940,
|
||
|
CODE_FOR_vec_initv32hihi = 11941,
|
||
|
CODE_FOR_vec_initv16hihi = 11942,
|
||
|
CODE_FOR_vec_initv8hihi = 11943,
|
||
|
CODE_FOR_vec_initv16sisi = 11944,
|
||
|
CODE_FOR_vec_initv8sisi = 11945,
|
||
|
CODE_FOR_vec_initv4sisi = 11946,
|
||
|
CODE_FOR_vec_initv8didi = 11947,
|
||
|
CODE_FOR_vec_initv4didi = 11948,
|
||
|
CODE_FOR_vec_initv2didi = 11949,
|
||
|
CODE_FOR_vec_initv32hfhf = 11950,
|
||
|
CODE_FOR_vec_initv16hfhf = 11951,
|
||
|
CODE_FOR_vec_initv8hfhf = 11952,
|
||
|
CODE_FOR_vec_initv16sfsf = 11953,
|
||
|
CODE_FOR_vec_initv8sfsf = 11954,
|
||
|
CODE_FOR_vec_initv4sfsf = 11955,
|
||
|
CODE_FOR_vec_initv8dfdf = 11956,
|
||
|
CODE_FOR_vec_initv4dfdf = 11957,
|
||
|
CODE_FOR_vec_initv2dfdf = 11958,
|
||
|
CODE_FOR_vec_initv4titi = 11959,
|
||
|
CODE_FOR_vec_initv2titi = 11960,
|
||
|
CODE_FOR_vec_initv64qiv32qi = 11961,
|
||
|
CODE_FOR_vec_initv32qiv16qi = 11962,
|
||
|
CODE_FOR_vec_initv16qiv8qi = 11963,
|
||
|
CODE_FOR_vec_initv32hiv16hi = 11964,
|
||
|
CODE_FOR_vec_initv16hiv8hi = 11965,
|
||
|
CODE_FOR_vec_initv8hiv4hi = 11966,
|
||
|
CODE_FOR_vec_initv16siv8si = 11967,
|
||
|
CODE_FOR_vec_initv8siv4si = 11968,
|
||
|
CODE_FOR_vec_initv4siv2si = 11969,
|
||
|
CODE_FOR_vec_initv8div4di = 11970,
|
||
|
CODE_FOR_vec_initv4div2di = 11971,
|
||
|
CODE_FOR_vec_initv32hfv16hf = 11972,
|
||
|
CODE_FOR_vec_initv16hfv8hf = 11973,
|
||
|
CODE_FOR_vec_initv8hfv4hf = 11974,
|
||
|
CODE_FOR_vec_initv16sfv8sf = 11975,
|
||
|
CODE_FOR_vec_initv8sfv4sf = 11976,
|
||
|
CODE_FOR_vec_initv4sfv2sf = 11977,
|
||
|
CODE_FOR_vec_initv8dfv4df = 11978,
|
||
|
CODE_FOR_vec_initv4dfv2df = 11979,
|
||
|
CODE_FOR_vec_initv4tiv2ti = 11980,
|
||
|
CODE_FOR_cond_ashlv32hi = 11981,
|
||
|
CODE_FOR_cond_lshrv32hi = 11982,
|
||
|
CODE_FOR_cond_ashrv32hi = 11983,
|
||
|
CODE_FOR_cond_ashlv16hi = 11984,
|
||
|
CODE_FOR_cond_lshrv16hi = 11985,
|
||
|
CODE_FOR_cond_ashrv16hi = 11986,
|
||
|
CODE_FOR_cond_ashlv8hi = 11987,
|
||
|
CODE_FOR_cond_lshrv8hi = 11988,
|
||
|
CODE_FOR_cond_ashrv8hi = 11989,
|
||
|
CODE_FOR_cond_ashlv16si = 11990,
|
||
|
CODE_FOR_cond_lshrv16si = 11991,
|
||
|
CODE_FOR_cond_ashrv16si = 11992,
|
||
|
CODE_FOR_cond_ashlv8si = 11993,
|
||
|
CODE_FOR_cond_lshrv8si = 11994,
|
||
|
CODE_FOR_cond_ashrv8si = 11995,
|
||
|
CODE_FOR_cond_ashlv4si = 11996,
|
||
|
CODE_FOR_cond_lshrv4si = 11997,
|
||
|
CODE_FOR_cond_ashrv4si = 11998,
|
||
|
CODE_FOR_cond_ashlv8di = 11999,
|
||
|
CODE_FOR_cond_lshrv8di = 12000,
|
||
|
CODE_FOR_cond_ashrv8di = 12001,
|
||
|
CODE_FOR_cond_ashlv4di = 12002,
|
||
|
CODE_FOR_cond_lshrv4di = 12003,
|
||
|
CODE_FOR_cond_ashrv4di = 12004,
|
||
|
CODE_FOR_cond_ashlv2di = 12005,
|
||
|
CODE_FOR_cond_lshrv2di = 12006,
|
||
|
CODE_FOR_cond_ashrv2di = 12007,
|
||
|
CODE_FOR_vcvtps2ph_mask = 12008,
|
||
|
CODE_FOR_vcvtps2ph = 12009,
|
||
|
CODE_FOR_avx2_gathersiv2di = 12010,
|
||
|
CODE_FOR_avx2_gathersiv2df = 12011,
|
||
|
CODE_FOR_avx2_gathersiv4di = 12012,
|
||
|
CODE_FOR_avx2_gathersiv4df = 12013,
|
||
|
CODE_FOR_avx2_gathersiv4si = 12014,
|
||
|
CODE_FOR_avx2_gathersiv4sf = 12015,
|
||
|
CODE_FOR_avx2_gathersiv8si = 12016,
|
||
|
CODE_FOR_avx2_gathersiv8sf = 12017,
|
||
|
CODE_FOR_avx2_gatherdiv2di = 12018,
|
||
|
CODE_FOR_avx2_gatherdiv2df = 12019,
|
||
|
CODE_FOR_avx2_gatherdiv4di = 12020,
|
||
|
CODE_FOR_avx2_gatherdiv4df = 12021,
|
||
|
CODE_FOR_avx2_gatherdiv4si = 12022,
|
||
|
CODE_FOR_avx2_gatherdiv4sf = 12023,
|
||
|
CODE_FOR_avx2_gatherdiv8si = 12024,
|
||
|
CODE_FOR_avx2_gatherdiv8sf = 12025,
|
||
|
CODE_FOR_avx512f_gathersiv16si = 12026,
|
||
|
CODE_FOR_avx512f_gathersiv16sf = 12027,
|
||
|
CODE_FOR_avx512f_gathersiv8di = 12028,
|
||
|
CODE_FOR_avx512f_gathersiv8df = 12029,
|
||
|
CODE_FOR_avx512vl_gathersiv8si = 12030,
|
||
|
CODE_FOR_avx512vl_gathersiv8sf = 12031,
|
||
|
CODE_FOR_avx512vl_gathersiv4di = 12032,
|
||
|
CODE_FOR_avx512vl_gathersiv4df = 12033,
|
||
|
CODE_FOR_avx512vl_gathersiv4si = 12034,
|
||
|
CODE_FOR_avx512vl_gathersiv4sf = 12035,
|
||
|
CODE_FOR_avx512vl_gathersiv2di = 12036,
|
||
|
CODE_FOR_avx512vl_gathersiv2df = 12037,
|
||
|
CODE_FOR_avx512f_gatherdiv16si = 12038,
|
||
|
CODE_FOR_avx512f_gatherdiv16sf = 12039,
|
||
|
CODE_FOR_avx512f_gatherdiv8di = 12040,
|
||
|
CODE_FOR_avx512f_gatherdiv8df = 12041,
|
||
|
CODE_FOR_avx512vl_gatherdiv8si = 12042,
|
||
|
CODE_FOR_avx512vl_gatherdiv8sf = 12043,
|
||
|
CODE_FOR_avx512vl_gatherdiv4di = 12044,
|
||
|
CODE_FOR_avx512vl_gatherdiv4df = 12045,
|
||
|
CODE_FOR_avx512vl_gatherdiv4si = 12046,
|
||
|
CODE_FOR_avx512vl_gatherdiv4sf = 12047,
|
||
|
CODE_FOR_avx512vl_gatherdiv2di = 12048,
|
||
|
CODE_FOR_avx512vl_gatherdiv2df = 12049,
|
||
|
CODE_FOR_avx512f_scattersiv16si = 12050,
|
||
|
CODE_FOR_avx512f_scattersiv16sf = 12051,
|
||
|
CODE_FOR_avx512f_scattersiv8di = 12052,
|
||
|
CODE_FOR_avx512f_scattersiv8df = 12053,
|
||
|
CODE_FOR_avx512vl_scattersiv8si = 12054,
|
||
|
CODE_FOR_avx512vl_scattersiv8sf = 12055,
|
||
|
CODE_FOR_avx512vl_scattersiv4di = 12056,
|
||
|
CODE_FOR_avx512vl_scattersiv4df = 12057,
|
||
|
CODE_FOR_avx512vl_scattersiv4si = 12058,
|
||
|
CODE_FOR_avx512vl_scattersiv4sf = 12059,
|
||
|
CODE_FOR_avx512vl_scattersiv2di = 12060,
|
||
|
CODE_FOR_avx512vl_scattersiv2df = 12061,
|
||
|
CODE_FOR_avx512f_scatterdiv16si = 12062,
|
||
|
CODE_FOR_avx512f_scatterdiv16sf = 12063,
|
||
|
CODE_FOR_avx512f_scatterdiv8di = 12064,
|
||
|
CODE_FOR_avx512f_scatterdiv8df = 12065,
|
||
|
CODE_FOR_avx512vl_scatterdiv8si = 12066,
|
||
|
CODE_FOR_avx512vl_scatterdiv8sf = 12067,
|
||
|
CODE_FOR_avx512vl_scatterdiv4di = 12068,
|
||
|
CODE_FOR_avx512vl_scatterdiv4df = 12069,
|
||
|
CODE_FOR_avx512vl_scatterdiv4si = 12070,
|
||
|
CODE_FOR_avx512vl_scatterdiv4sf = 12071,
|
||
|
CODE_FOR_avx512vl_scatterdiv2di = 12072,
|
||
|
CODE_FOR_avx512vl_scatterdiv2df = 12073,
|
||
|
CODE_FOR_avx512f_expandv16si_maskz = 12074,
|
||
|
CODE_FOR_avx512f_expandv16sf_maskz = 12075,
|
||
|
CODE_FOR_avx512f_expandv8di_maskz = 12076,
|
||
|
CODE_FOR_avx512f_expandv8df_maskz = 12077,
|
||
|
CODE_FOR_avx512vl_expandv8si_maskz = 12078,
|
||
|
CODE_FOR_avx512vl_expandv8sf_maskz = 12079,
|
||
|
CODE_FOR_avx512vl_expandv4di_maskz = 12080,
|
||
|
CODE_FOR_avx512vl_expandv4df_maskz = 12081,
|
||
|
CODE_FOR_avx512vl_expandv4si_maskz = 12082,
|
||
|
CODE_FOR_avx512vl_expandv4sf_maskz = 12083,
|
||
|
CODE_FOR_avx512vl_expandv2di_maskz = 12084,
|
||
|
CODE_FOR_avx512vl_expandv2df_maskz = 12085,
|
||
|
CODE_FOR_expandv64qi_maskz = 12086,
|
||
|
CODE_FOR_expandv16qi_maskz = 12087,
|
||
|
CODE_FOR_expandv32qi_maskz = 12088,
|
||
|
CODE_FOR_expandv32hi_maskz = 12089,
|
||
|
CODE_FOR_expandv16hi_maskz = 12090,
|
||
|
CODE_FOR_expandv8hi_maskz = 12091,
|
||
|
CODE_FOR_vpamdd52huqv8di_maskz = 12092,
|
||
|
CODE_FOR_vpamdd52huqv4di_maskz = 12093,
|
||
|
CODE_FOR_vpamdd52huqv2di_maskz = 12094,
|
||
|
CODE_FOR_vpamdd52luqv8di_maskz = 12095,
|
||
|
CODE_FOR_vpamdd52luqv4di_maskz = 12096,
|
||
|
CODE_FOR_vpamdd52luqv2di_maskz = 12097,
|
||
|
CODE_FOR_movv64sf = 12098,
|
||
|
CODE_FOR_movv64si = 12099,
|
||
|
CODE_FOR_popcountv16si2 = 12100,
|
||
|
CODE_FOR_popcountv8si2 = 12101,
|
||
|
CODE_FOR_popcountv4si2 = 12102,
|
||
|
CODE_FOR_popcountv8di2 = 12103,
|
||
|
CODE_FOR_popcountv4di2 = 12104,
|
||
|
CODE_FOR_popcountv2di2 = 12105,
|
||
|
CODE_FOR_popcountv64qi2 = 12106,
|
||
|
CODE_FOR_popcountv16qi2 = 12107,
|
||
|
CODE_FOR_popcountv32qi2 = 12108,
|
||
|
CODE_FOR_popcountv32hi2 = 12109,
|
||
|
CODE_FOR_popcountv16hi2 = 12110,
|
||
|
CODE_FOR_popcountv8hi2 = 12111,
|
||
|
CODE_FOR_vpshrdv_v32hi_maskz = 12112,
|
||
|
CODE_FOR_vpshrdv_v16si_maskz = 12113,
|
||
|
CODE_FOR_vpshrdv_v8di_maskz = 12114,
|
||
|
CODE_FOR_vpshrdv_v16hi_maskz = 12115,
|
||
|
CODE_FOR_vpshrdv_v8si_maskz = 12116,
|
||
|
CODE_FOR_vpshrdv_v4di_maskz = 12117,
|
||
|
CODE_FOR_vpshrdv_v8hi_maskz = 12118,
|
||
|
CODE_FOR_vpshrdv_v4si_maskz = 12119,
|
||
|
CODE_FOR_vpshrdv_v2di_maskz = 12120,
|
||
|
CODE_FOR_vpshldv_v32hi_maskz = 12121,
|
||
|
CODE_FOR_vpshldv_v16si_maskz = 12122,
|
||
|
CODE_FOR_vpshldv_v8di_maskz = 12123,
|
||
|
CODE_FOR_vpshldv_v16hi_maskz = 12124,
|
||
|
CODE_FOR_vpshldv_v8si_maskz = 12125,
|
||
|
CODE_FOR_vpshldv_v4di_maskz = 12126,
|
||
|
CODE_FOR_vpshldv_v8hi_maskz = 12127,
|
||
|
CODE_FOR_vpshldv_v4si_maskz = 12128,
|
||
|
CODE_FOR_vpshldv_v2di_maskz = 12129,
|
||
|
CODE_FOR_usdot_prodv64qi = 12130,
|
||
|
CODE_FOR_usdot_prodv32qi = 12131,
|
||
|
CODE_FOR_usdot_prodv16qi = 12132,
|
||
|
CODE_FOR_vpdpbusd_v16si_maskz = 12133,
|
||
|
CODE_FOR_vpdpbusd_v8si_maskz = 12134,
|
||
|
CODE_FOR_vpdpbusd_v4si_maskz = 12135,
|
||
|
CODE_FOR_vpdpbusds_v16si_maskz = 12136,
|
||
|
CODE_FOR_vpdpbusds_v8si_maskz = 12137,
|
||
|
CODE_FOR_vpdpbusds_v4si_maskz = 12138,
|
||
|
CODE_FOR_vpdpwssd_v16si_maskz = 12139,
|
||
|
CODE_FOR_vpdpwssd_v8si_maskz = 12140,
|
||
|
CODE_FOR_vpdpwssd_v4si_maskz = 12141,
|
||
|
CODE_FOR_vpdpwssds_v16si_maskz = 12142,
|
||
|
CODE_FOR_vpdpwssds_v8si_maskz = 12143,
|
||
|
CODE_FOR_vpdpwssds_v4si_maskz = 12144,
|
||
|
CODE_FOR_movp2qi = 12145,
|
||
|
CODE_FOR_movp2hi = 12146,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v32hi_maskz = 12147,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v16hi_maskz = 12148,
|
||
|
CODE_FOR_avx512f_cvtne2ps2bf16_v8hi_maskz = 12149,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v16sf_maskz = 12150,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v8sf_maskz = 12151,
|
||
|
CODE_FOR_avx512f_cvtneps2bf16_v4sf_maskz = 12152,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v16sf_maskz = 12153,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v8sf_maskz = 12154,
|
||
|
CODE_FOR_avx512f_dpbf16ps_v4sf_maskz = 12155,
|
||
|
CODE_FOR_encodekey128u32 = 12156,
|
||
|
CODE_FOR_encodekey256u32 = 12157,
|
||
|
CODE_FOR_aesdecwide128klu8 = 12158,
|
||
|
CODE_FOR_aesdecwide256klu8 = 12159,
|
||
|
CODE_FOR_aesencwide128klu8 = 12160,
|
||
|
CODE_FOR_aesencwide256klu8 = 12161,
|
||
|
CODE_FOR_vec_duplicatev64qi = 12162,
|
||
|
CODE_FOR_vec_duplicatev32qi = 12163,
|
||
|
CODE_FOR_vec_duplicatev16qi = 12164,
|
||
|
CODE_FOR_vec_duplicatev32hi = 12165,
|
||
|
CODE_FOR_vec_duplicatev16hi = 12166,
|
||
|
CODE_FOR_vec_duplicatev8hi = 12167,
|
||
|
CODE_FOR_vec_duplicatev16si = 12168,
|
||
|
CODE_FOR_vec_duplicatev8si = 12169,
|
||
|
CODE_FOR_vec_duplicatev4si = 12170,
|
||
|
CODE_FOR_vec_duplicatev8di = 12171,
|
||
|
CODE_FOR_vec_duplicatev4di = 12172,
|
||
|
CODE_FOR_vec_duplicatev2di = 12173,
|
||
|
CODE_FOR_sse2_lfence = 12174,
|
||
|
CODE_FOR_sse_sfence = 12175,
|
||
|
CODE_FOR_sse2_mfence = 12176,
|
||
|
CODE_FOR_mem_thread_fence = 12177,
|
||
|
CODE_FOR_atomic_loadqi = 12178,
|
||
|
CODE_FOR_atomic_loadhi = 12179,
|
||
|
CODE_FOR_atomic_loadsi = 12180,
|
||
|
CODE_FOR_atomic_loaddi = 12181,
|
||
|
CODE_FOR_atomic_storeqi = 12182,
|
||
|
CODE_FOR_atomic_storehi = 12183,
|
||
|
CODE_FOR_atomic_storesi = 12184,
|
||
|
CODE_FOR_atomic_storedi = 12185,
|
||
|
CODE_FOR_atomic_compare_and_swapqi = 12186,
|
||
|
CODE_FOR_atomic_compare_and_swaphi = 12187,
|
||
|
CODE_FOR_atomic_compare_and_swapsi = 12188,
|
||
|
CODE_FOR_atomic_compare_and_swapdi = 12189,
|
||
|
CODE_FOR_atomic_compare_and_swapti = 12190,
|
||
|
CODE_FOR_atomic_fetch_andqi = 12191,
|
||
|
CODE_FOR_atomic_fetch_orqi = 12192,
|
||
|
CODE_FOR_atomic_fetch_xorqi = 12193,
|
||
|
CODE_FOR_atomic_fetch_andhi = 12194,
|
||
|
CODE_FOR_atomic_fetch_orhi = 12195,
|
||
|
CODE_FOR_atomic_fetch_xorhi = 12196,
|
||
|
CODE_FOR_atomic_fetch_andsi = 12197,
|
||
|
CODE_FOR_atomic_fetch_orsi = 12198,
|
||
|
CODE_FOR_atomic_fetch_xorsi = 12199,
|
||
|
CODE_FOR_atomic_and_fetchqi = 12200,
|
||
|
CODE_FOR_atomic_or_fetchqi = 12201,
|
||
|
CODE_FOR_atomic_xor_fetchqi = 12202,
|
||
|
CODE_FOR_atomic_and_fetchhi = 12203,
|
||
|
CODE_FOR_atomic_or_fetchhi = 12204,
|
||
|
CODE_FOR_atomic_xor_fetchhi = 12205,
|
||
|
CODE_FOR_atomic_and_fetchsi = 12206,
|
||
|
CODE_FOR_atomic_or_fetchsi = 12207,
|
||
|
CODE_FOR_atomic_xor_fetchsi = 12208,
|
||
|
CODE_FOR_atomic_fetch_nandqi = 12209,
|
||
|
CODE_FOR_atomic_fetch_nandhi = 12210,
|
||
|
CODE_FOR_atomic_fetch_nandsi = 12211,
|
||
|
CODE_FOR_atomic_nand_fetchqi = 12212,
|
||
|
CODE_FOR_atomic_nand_fetchhi = 12213,
|
||
|
CODE_FOR_atomic_nand_fetchsi = 12214,
|
||
|
CODE_FOR_atomic_fetch_anddi = 12215,
|
||
|
CODE_FOR_atomic_fetch_ordi = 12216,
|
||
|
CODE_FOR_atomic_fetch_xordi = 12217,
|
||
|
CODE_FOR_atomic_fetch_andti = 12218,
|
||
|
CODE_FOR_atomic_fetch_orti = 12219,
|
||
|
CODE_FOR_atomic_fetch_xorti = 12220,
|
||
|
CODE_FOR_atomic_and_fetchdi = 12221,
|
||
|
CODE_FOR_atomic_or_fetchdi = 12222,
|
||
|
CODE_FOR_atomic_xor_fetchdi = 12223,
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||
|
CODE_FOR_atomic_and_fetchti = 12224,
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||
|
CODE_FOR_atomic_or_fetchti = 12225,
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||
|
CODE_FOR_atomic_xor_fetchti = 12226,
|
||
|
CODE_FOR_atomic_fetch_nanddi = 12227,
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||
|
CODE_FOR_atomic_fetch_nandti = 12228,
|
||
|
CODE_FOR_atomic_nand_fetchdi = 12229,
|
||
|
CODE_FOR_atomic_nand_fetchti = 12230,
|
||
|
CODE_FOR_atomic_bit_test_and_sethi = 12231,
|
||
|
CODE_FOR_atomic_bit_test_and_setsi = 12232,
|
||
|
CODE_FOR_atomic_bit_test_and_setdi = 12233,
|
||
|
CODE_FOR_atomic_bit_test_and_complementhi = 12234,
|
||
|
CODE_FOR_atomic_bit_test_and_complementsi = 12235,
|
||
|
CODE_FOR_atomic_bit_test_and_complementdi = 12236,
|
||
|
CODE_FOR_atomic_bit_test_and_resethi = 12237,
|
||
|
CODE_FOR_atomic_bit_test_and_resetsi = 12238,
|
||
|
CODE_FOR_atomic_bit_test_and_resetdi = 12239,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0qi = 12240,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0qi = 12241,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0hi = 12242,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0hi = 12243,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0si = 12244,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0si = 12245,
|
||
|
CODE_FOR_atomic_add_fetch_cmp_0di = 12246,
|
||
|
CODE_FOR_atomic_sub_fetch_cmp_0di = 12247,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0qi = 12248,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0qi = 12249,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0qi = 12250,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0hi = 12251,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0hi = 12252,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0hi = 12253,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0si = 12254,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0si = 12255,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0si = 12256,
|
||
|
CODE_FOR_atomic_and_fetch_cmp_0di = 12257,
|
||
|
CODE_FOR_atomic_or_fetch_cmp_0di = 12258,
|
||
|
CODE_FOR_atomic_xor_fetch_cmp_0di = 12259
|
||
|
};
|
||
|
|
||
|
const unsigned int NUM_INSN_CODES = 12260;
|
||
|
#endif /* GCC_INSN_CODES_H */
|